From nobody Thu Nov 13 06:06:18 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1578033702; cv=none; d=zohomail.com; s=zohoarc; b=kP7AZcZFPtwwcuFXT5wB4xbOBzQmPz2mr/D0QeWirrsEqXeonbA2p52JmHR9/T+LeJ5fFhgPSWLBo4I/UAcd1TW5XgN6j/RqMMjA6GtcqDBAdZDexWEbcrPM+Sm2gLD/ghMvuvGiVRsSOoGEQwdRwJySQY/H0jMRvO9yi1MyecU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1578033702; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LYQiH0CmPicmDIuXIr/0QTS4j0m9e9vMf+6RFSbN8gs=; b=F01Q8Umpq7Ut9fJnbTpJXKDmsqsZqsI+WzjPLYKGhGAGfH///FpKc5t/qsBJb4nv1idRGqxMcXXFbueeGu1Ry2XHSOjdQCIhTPD+WXoKzmUUb3m4RfcKVqIS6h/8hyoJC6K0SleDq3uMIHe21h2+sZNFPXJbCTU/h7XBaKiOs7c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1578033701924264.3657111124178; Thu, 2 Jan 2020 22:41:41 -0800 (PST) Received: from localhost ([::1]:49214 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1inGeS-0006vD-7R for importer@patchew.org; Fri, 03 Jan 2020 01:41:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:35795) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1inGcH-00056r-GZ for qemu-devel@nongnu.org; Fri, 03 Jan 2020 01:39:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1inGcE-0000Ih-O7 for qemu-devel@nongnu.org; Fri, 03 Jan 2020 01:39:24 -0500 Received: from ozlabs.org ([203.11.71.1]:60353) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1inGcD-00007Y-Bm; Fri, 03 Jan 2020 01:39:22 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 47pwH83FV7z9sNH; Fri, 3 Jan 2020 17:39:16 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1578033556; bh=hKHBL40fvquvop2W00XL2m4WOhOqI+ZG7iI5VyXxM7g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cd6MaTDzfHZesWdkrzZUIw12RjTy99Kgx2OvBorgf1Snqm6ZX8UJk37oHs5Easgdg xwdkUNDdGPJVUV6zH6LTts6ZDAuaqqJEnscgAso1ut8vfgnrL9x5WobSfIz/2ynMcI mZa5bz1PqgYTAPOz6pT1QBczUxokvU03OB6imh14= From: David Gibson To: qemu-devel@nongnu.org, philmd@redhat.com, clg@kaod.org, groug@kaod.org Subject: [RFC 2/4] ppc: Remove stub of PPC970 HID4 implementation Date: Fri, 3 Jan 2020 17:39:09 +1100 Message-Id: <20200103063911.180977-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200103063911.180977-1-david@gibson.dropbear.id.au> References: <20200103063911.180977-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aik@ozlabs.ru, qemu-ppc@nongnu.org, Mark Cave-Ayland , paulus@samba.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" The PowerPC 970 CPU was a cut-down POWER4, which had hypervisor capability. However, it can be (and often was) strapped into "Apple mode", where the hypervisor capabilities were disabled (essentially putting it always in hypervisor mode). That's actually the only mode of the 970 we support in qemu, and we're unlikely to change that any time soon. However, we do have a partial implementation of the 970's HID4 register which affects things only relevant for hypervisor mode. That stub is also really ugly, since it attempts to duplicate the effects of HID4 by re-encoding it into the LPCR register used in newer CPUs, but in a really confusing way. Just get rid of it. Signed-off-by: David Gibson --- target/ppc/mmu-hash64.c | 28 +--------------------------- target/ppc/translate_init.inc.c | 17 ++++++----------- 2 files changed, 7 insertions(+), 38 deletions(-) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index da8966ccf5..a881876647 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -1091,33 +1091,6 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong va= l) =20 /* Filter out bits */ switch (env->mmu_model) { - case POWERPC_MMU_64B: /* 970 */ - if (val & 0x40) { - lpcr |=3D LPCR_LPES0; - } - if (val & 0x8000000000000000ull) { - lpcr |=3D LPCR_LPES1; - } - if (val & 0x20) { - lpcr |=3D (0x4ull << LPCR_RMLS_SHIFT); - } - if (val & 0x4000000000000000ull) { - lpcr |=3D (0x2ull << LPCR_RMLS_SHIFT); - } - if (val & 0x2000000000000000ull) { - lpcr |=3D (0x1ull << LPCR_RMLS_SHIFT); - } - env->spr[SPR_RMOR] =3D ((lpcr >> 41) & 0xffffull) << 26; - - /* - * XXX We could also write LPID from HID4 here - * but since we don't tag any translation on it - * it doesn't actually matter - * - * XXX For proper emulation of 970 we also need - * to dig HRMOR out of HID5 - */ - break; case POWERPC_MMU_2_03: /* P5p */ lpcr =3D val & (LPCR_RMLS | LPCR_ILE | LPCR_LPES0 | LPCR_LPES1 | @@ -1154,6 +1127,7 @@ void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) } break; default: + g_assert_not_reached(); ; } env->spr[SPR_LPCR] =3D lpcr; diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.in= c.c index d33d65dff7..436d0d5a51 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -7884,25 +7884,20 @@ static void spr_write_lpcr(DisasContext *ctx, int s= prn, int gprn) { gen_helper_store_lpcr(cpu_env, cpu_gpr[gprn]); } - -static void spr_write_970_hid4(DisasContext *ctx, int sprn, int gprn) -{ -#if defined(TARGET_PPC64) - spr_write_generic(ctx, sprn, gprn); - gen_helper_store_lpcr(cpu_env, cpu_gpr[gprn]); -#endif -} - #endif /* !defined(CONFIG_USER_ONLY) */ =20 static void gen_spr_970_lpar(CPUPPCState *env) { #if !defined(CONFIG_USER_ONLY) /* Logical partitionning */ - /* PPC970: HID4 is effectively the LPCR */ + /* PPC970: HID4 covers things later controlled by the LPCR and + * RMOR in later CPUs, but with a different encoding. We only + * support the 970 in "Apple mode" which has all hypervisor + * facilities disabled by strapping, so we can basically just + * ignore it */ spr_register(env, SPR_970_HID4, "HID4", SPR_NOACCESS, SPR_NOACCESS, - &spr_read_generic, &spr_write_970_hid4, + &spr_read_generic, &spr_write_generic, 0x00000000); #endif } --=20 2.24.1