From nobody Mon Feb 9 00:55:20 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1577657058; cv=none; d=zohomail.com; s=zohoarc; b=kLuxZ+gtEAEuDunT6fECXI5uLCg8/+YUi8nnC4jnCwblZT5MwR4VjbGfaVohkdx5YsJmsC4dvfdZYzO/Cgd5pFh8YIUX0cqjlkLV5R3UZEQ7ExKb4ejL4aybYk+FsueSi5aBXlaw8R5kk6AqojtCuzr7MER/o7x+rlyNTk17fqo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1577657058; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To; bh=7Ou9vxdbcZz9S1NhW4ejjR9PVwKvsdppSdHeDXKBIdQ=; b=GqgkmxPvlVEwYpecIn3Vi03xIBJqhabkbgH05CI8VC+8YhwVJNIx6RTnBi+tCswfp7Txnhs50v15QxSDgbzI/1/zbHNzDmH830y9JiISPKrGEB1OUIl7kdKWW6NuZF7EjUbW6RU5xZhBd09F5J/p+GG1D3b5OCi7KcrcVZaGN8c= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1577657058180851.5807004557706; Sun, 29 Dec 2019 14:04:18 -0800 (PST) Received: from localhost ([::1]:55410 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ilgfY-0003dT-TT for importer@patchew.org; Sun, 29 Dec 2019 17:04:16 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33869) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ilgUu-0007gm-8N for qemu-devel@nongnu.org; Sun, 29 Dec 2019 16:53:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ilgUs-0003wU-Kq for qemu-devel@nongnu.org; Sun, 29 Dec 2019 16:53:16 -0500 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:44125) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ilgUs-0003tq-DC for qemu-devel@nongnu.org; Sun, 29 Dec 2019 16:53:14 -0500 Received: by mail-wr1-x442.google.com with SMTP id q10so31188393wrm.11 for ; Sun, 29 Dec 2019 13:53:14 -0800 (PST) Received: from 8c859074c0ff.ant.amazon.com.com (bzq-79-183-93-3.red.bezeqint.net. [79.183.93.3]) by smtp.gmail.com with ESMTPSA id 25sm18182850wmi.32.2019.12.29.13.53.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 29 Dec 2019 13:53:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7Ou9vxdbcZz9S1NhW4ejjR9PVwKvsdppSdHeDXKBIdQ=; b=EXfnOO0G9O/DbNANTpCWuPkcTRvU1hj6UdqUuaUuC4HCDikBn6dng5RT7QhM7Swl9I cHAvbwmJbVpFXDkQV1u6QjIWGz6mu3BbJDWrTy1G/99CFdiiT2LrBDaijlaNl+V7Vpp7 Pjh4mGzdip9DqWN9CeCSY/mjho8H0xhAwJiDByiWAuZmzZxry2A6BuPwOPb5/FSjw79Y Bq/foJ4V9XHlkPooitlyeWo4mQwk4TterA4Ez9GbNo3O0YMT0scvUZjy0vzKcgAnDA++ 9trZmsZcSGWHNAuzfa8VEVh0n3ACSu+WJTU0OJPjS35BiXAipCWuedUg1m64MzfH5/t+ FNxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7Ou9vxdbcZz9S1NhW4ejjR9PVwKvsdppSdHeDXKBIdQ=; b=fgMzBn/U9W7zVrL2uV4l02iUkVc7ZsTs7zh36U1tjPG6NvoC+pfMaAZ7C87XehzmXg /MiSBZ6hwe5scsjgliwbT/uHfoDRminj4JwnMhbi+ZD0tIN6y/ZoptPQb6NuuFj0g9o9 bR2houXr7tVMSMDPs4QtHRZkQ/FEbmuxhDWS6HwDCGU8qPdIGQxty+K4Ro0LZajWfscd QkjA4JR9us6R1UWkZJ0CTAQD9zeljcTpMPlWeFcPCqzGK8j3FXmipsIpwIOFVwnpiBJr ET0XubNdgJCYzdnmnlwfhM8dU4jzCNAASGJj7NBhUE0tYsMIivJM2uS81vEJ42d4yDQe dzEw== X-Gm-Message-State: APjAAAUlrpXToDarzJJviYPKLjbfLB04cVXYObLciOmvDq/rrMyiuUvG E/Hm+VAEOX6KT5hWLspIvVuqMKWwoPkeDQ== X-Google-Smtp-Source: APXvYqydtFkyRHP/2B0gRdrMr7AOOfpIrUMj7eocQ4DYuPFBLZzIWHU/HUYge3xOAIbmORL1jqA+5w== X-Received: by 2002:a05:6000:1187:: with SMTP id g7mr7827634wrx.109.1577656393156; Sun, 29 Dec 2019 13:53:13 -0800 (PST) From: Michael Rolnik To: qemu-devel@nongnu.org Subject: [PATCH v40 13/21] hw/avr: Add dummy mask device Date: Sun, 29 Dec 2019 23:51:50 +0200 Message-Id: <20191229215158.5788-14-mrolnik@gmail.com> X-Mailer: git-send-email 2.17.2 (Apple Git-113) In-Reply-To: <20191229215158.5788-1-mrolnik@gmail.com> References: <20191229215158.5788-1-mrolnik@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, Michael Rolnik , me@xcancerberox.com.ar, richard.henderson@linaro.org, dovgaluk@ispras.ru, imammedo@redhat.com, philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is a simple device of just one register, whenver this register is written it calls qemu_set_irq function for each of 8 bits/IRQs.. It is used to implement AVR Power Reduction Signed-off-by: Michael Rolnik --- include/hw/misc/avr_mask.h | 47 ++++++++++++++++ hw/misc/avr_mask.c | 112 +++++++++++++++++++++++++++++++++++++ hw/misc/Kconfig | 3 + hw/misc/Makefile.objs | 2 + 4 files changed, 164 insertions(+) create mode 100644 include/hw/misc/avr_mask.h create mode 100644 hw/misc/avr_mask.c diff --git a/include/hw/misc/avr_mask.h b/include/hw/misc/avr_mask.h new file mode 100644 index 0000000000..d3e21972d8 --- /dev/null +++ b/include/hw/misc/avr_mask.h @@ -0,0 +1,47 @@ +/* + * AVR Power Reduction + * + * Copyright (c) 2019 Michael Rolnik + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#ifndef HW_avr_mask_H +#define HW_avr_mask_H + +#include "hw/sysbus.h" +#include "chardev/char-fe.h" +#include "hw/hw.h" + + +#define TYPE_AVR_MASK "avr-mask" +#define AVR_MASK(obj) OBJECT_CHECK(AVRMaskState, (obj), TYPE_AVR_MASK) + +typedef struct { + /* */ + SysBusDevice parent_obj; + + /* */ + MemoryRegion iomem; + + uint8_t val; + qemu_irq irq[8]; +} AVRMaskState; + +#endif /* HW_avr_mask_H */ diff --git a/hw/misc/avr_mask.c b/hw/misc/avr_mask.c new file mode 100644 index 0000000000..3af82ed9c1 --- /dev/null +++ b/hw/misc/avr_mask.c @@ -0,0 +1,112 @@ +/* + * AVR Power Reduction + * + * Copyright (c) 2019 Michael Rolnik + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ + +#include "qemu/osdep.h" +#include "hw/misc/avr_mask.h" +#include "qemu/log.h" +#include "hw/qdev-properties.h" +#include "hw/irq.h" + +#define DB_PRINT(fmt, args...) /* Nothing */ +/*#define DB_PRINT(fmt, args...) printf("%s: " fmt "\n", __func__, ## args= )*/ + +static void avr_mask_reset(DeviceState *dev) +{ + AVRMaskState *s =3D AVR_MASK(dev); + + s->val =3D 0x00; + + for (int i =3D 0; i < 8; i++) { + qemu_set_irq(s->irq[i], 0); + } +} + +static uint64_t avr_mask_read(void *opaque, hwaddr offset, unsigned size) +{ + assert(size =3D=3D 1); + assert(offset =3D=3D 0); + AVRMaskState *s =3D opaque; + + return (uint64_t)s->val; +} + +static void avr_mask_write(void *opaque, hwaddr offset, + uint64_t val64, unsigned size) +{ + assert(size =3D=3D 1); + assert(offset =3D=3D 0); + AVRMaskState *s =3D opaque; + uint8_t val8 =3D val64; + + DB_PRINT("write %d to offset %d", val8, (uint8_t)offset); + + s->val =3D val8; + for (int i =3D 0; i < 8; i++) { + qemu_set_irq(s->irq[i], (val8 & (1 << i)) !=3D 0); + } +} + +static const MemoryRegionOps avr_mask_ops =3D { + .read =3D avr_mask_read, + .write =3D avr_mask_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, + .impl =3D {.max_access_size =3D 1} +}; + +static void avr_mask_init(Object *dev) +{ + AVRMaskState *s =3D AVR_MASK(dev); + SysBusDevice *busdev =3D SYS_BUS_DEVICE(dev); + + memory_region_init_io(&s->iomem, dev, &avr_mask_ops, s, TYPE_AVR_MASK, + 0x01); + sysbus_init_mmio(busdev, &s->iomem); + + for (int i =3D 0; i < 8; i++) { + sysbus_init_irq(busdev, &s->irq[i]); + } + s->val =3D 0x00; +} + +static void avr_mask_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->reset =3D avr_mask_reset; +} + +static const TypeInfo avr_mask_info =3D { + .name =3D TYPE_AVR_MASK, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(AVRMaskState), + .class_init =3D avr_mask_class_init, + .instance_init =3D avr_mask_init, +}; + +static void avr_mask_register_types(void) +{ + type_register_static(&avr_mask_info); +} + +type_init(avr_mask_register_types) diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index 2164646553..e79841e3a4 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -125,4 +125,7 @@ config MAC_VIA select MOS6522 select ADB =20 +config AVR_MASK + bool + source macio/Kconfig diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs index ba898a5781..3a8093be6a 100644 --- a/hw/misc/Makefile.objs +++ b/hw/misc/Makefile.objs @@ -82,3 +82,5 @@ common-obj-$(CONFIG_NRF51_SOC) +=3D nrf51_rng.o obj-$(CONFIG_MAC_VIA) +=3D mac_via.o =20 common-obj-$(CONFIG_GRLIB) +=3D grlib_ahb_apb_pnp.o + +obj-$(CONFIG_AVR_MASK) +=3D avr_mask.o --=20 2.17.2 (Apple Git-113)