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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id x10sm20976131wrp.58.2019.12.16.03.09.41 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Dec 2019 03:09:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=7nY5MqSyOV50wVoDXR+NSInZ+hJVrBD1WXiJuwo9v6M=; b=DaTHXOzJumC0+IcAuAXHHzc5YR2JvQ03z29muaqEuFIMMa4XAvO1cvek2isbIiTI+M r2yFUcqmpR5E1BkuxeU2wS6cDI3RSHQ89DlK7+YwsLvw4uplmBitxZOirj4QlYCBkA67 /Pb7pOD/0rZK8GjCChA/hLJP7sZVsU7llUynA7tueQ67B9S5679nL2T5oF/7R8sCuBBS ZY/O6Fi9OBNdFkK/wlNw20Es4eRaPx9ELtltj86NGuft2h89AhvGeVr5S1hDVKGEdKUA d/ydaWseicgKVzsIoMcTJ6DwBFieqXGGNiQZWRo9/dcyOQAA3CpNclfCkQEHaXszptwx h+jg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7nY5MqSyOV50wVoDXR+NSInZ+hJVrBD1WXiJuwo9v6M=; b=YChoOQy5FMrIH50VN5lXHJnQOeo97foF8l+4kZu+FKKT3vKt9Jji0mLKrJ2o0V9wfk anGZrbuggXdfIYpeYOq2fZxGYEEBG2wjmMy9EwoLKMxlRf25aMmJuaF4FXSli2R5u5tz BsOQx01yUOrqKIoZTN0SRNTP8+3lxS+QOPbeO68iBLukmuVYrJei5XhLip87ddzV1CMV K1SNyALdeWZjgVGdgaxs+0UCutsA7bnjU5Gq/ibBlav30MxSX8+ACsksa+SY9cd/wzk5 8+F8RXl/Xy3llYJLZeVfwousEgvbybNW6y2A2KVTL1z1QlUF6n7sfQt9jLBK71LOJShE +9xg== X-Gm-Message-State: APjAAAX7Z/uNCV2+Wq2/bsjjbh6Pz8X6oQHmUnuq5LVlgYlI5eMYFeaN vJIXNSFUyxaukQvYGQxpqaTsPF9R7TuSQw== X-Google-Smtp-Source: APXvYqxTSC0TlX65wQsLhVwQMJp5QkI8blFtiHBoodqWTa/QNmBJbdipasDkt95igfFK/D6UK96vsw== X-Received: by 2002:a1c:a795:: with SMTP id q143mr28405617wme.52.1576494582509; Mon, 16 Dec 2019 03:09:42 -0800 (PST) From: Peter Maydell To: qemu-devel@nongnu.org Subject: [PULL 33/34] hw/arm/virt: Simplify by moving the gic in the machine state Date: Mon, 16 Dec 2019 11:09:03 +0000 Message-Id: <20191216110904.30815-34-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191216110904.30815-1-peter.maydell@linaro.org> References: <20191216110904.30815-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::330 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) From: Philippe Mathieu-Daud=C3=A9 Make the gic a field in the machine state, and instead of filling an array of qemu_irq and passing it around, directly call qdev_get_gpio_in() on the gic field. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Luc Michel Message-id: 20191209090306.20433-1-philmd@redhat.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- include/hw/arm/virt.h | 1 + hw/arm/virt.c | 109 +++++++++++++++++++++--------------------- 2 files changed, 55 insertions(+), 55 deletions(-) diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 0b41083e9d5..38f0c33c77c 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -136,6 +136,7 @@ typedef struct { uint32_t iommu_phandle; int psci_conduit; hwaddr highest_gpa; + DeviceState *gic; DeviceState *acpi_dev; Notifier powerdown_notifier; } VirtMachineState; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index bf4b1cbfb86..6f2a45d1b4c 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -531,7 +531,7 @@ static void fdt_add_pmu_nodes(const VirtMachineState *v= ms) } } =20 -static inline DeviceState *create_acpi_ged(VirtMachineState *vms, qemu_irq= *pic) +static inline DeviceState *create_acpi_ged(VirtMachineState *vms) { DeviceState *dev; MachineState *ms =3D MACHINE(vms); @@ -547,14 +547,14 @@ static inline DeviceState *create_acpi_ged(VirtMachin= eState *vms, qemu_irq *pic) =20 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_ACPI_GED].bas= e); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, vms->memmap[VIRT_PCDIMM_ACPI].= base); - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[irq]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(vms->gic, = irq)); =20 qdev_init_nofail(dev); =20 return dev; } =20 -static void create_its(VirtMachineState *vms, DeviceState *gicdev) +static void create_its(VirtMachineState *vms) { const char *itsclass =3D its_class_name(); DeviceState *dev; @@ -566,7 +566,7 @@ static void create_its(VirtMachineState *vms, DeviceSta= te *gicdev) =20 dev =3D qdev_create(NULL, itsclass); =20 - object_property_set_link(OBJECT(dev), OBJECT(gicdev), "parent-gicv3", + object_property_set_link(OBJECT(dev), OBJECT(vms->gic), "parent-gicv3", &error_abort); qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, vms->memmap[VIRT_GIC_ITS].base= ); @@ -574,7 +574,7 @@ static void create_its(VirtMachineState *vms, DeviceSta= te *gicdev) fdt_add_its_gic_node(vms); } =20 -static void create_v2m(VirtMachineState *vms, qemu_irq *pic) +static void create_v2m(VirtMachineState *vms) { int i; int irq =3D vms->irqmap[VIRT_GIC_V2M]; @@ -587,17 +587,17 @@ static void create_v2m(VirtMachineState *vms, qemu_ir= q *pic) qdev_init_nofail(dev); =20 for (i =3D 0; i < NUM_GICV2M_SPIS; i++) { - sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pic[irq + i]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, + qdev_get_gpio_in(vms->gic, irq + i)); } =20 fdt_add_v2m_gic_node(vms); } =20 -static void create_gic(VirtMachineState *vms, qemu_irq *pic) +static void create_gic(VirtMachineState *vms) { MachineState *ms =3D MACHINE(vms); /* We create a standalone GIC */ - DeviceState *gicdev; SysBusDevice *gicbusdev; const char *gictype; int type =3D vms->gic_version, i; @@ -606,15 +606,15 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) =20 gictype =3D (type =3D=3D 3) ? gicv3_class_name() : gic_class_name(); =20 - gicdev =3D qdev_create(NULL, gictype); - qdev_prop_set_uint32(gicdev, "revision", type); - qdev_prop_set_uint32(gicdev, "num-cpu", smp_cpus); + vms->gic =3D qdev_create(NULL, gictype); + qdev_prop_set_uint32(vms->gic, "revision", type); + qdev_prop_set_uint32(vms->gic, "num-cpu", smp_cpus); /* Note that the num-irq property counts both internal and external * interrupts; there are always 32 of the former (mandated by GIC spec= ). */ - qdev_prop_set_uint32(gicdev, "num-irq", NUM_IRQS + 32); + qdev_prop_set_uint32(vms->gic, "num-irq", NUM_IRQS + 32); if (!kvm_irqchip_in_kernel()) { - qdev_prop_set_bit(gicdev, "has-security-extensions", vms->secure); + qdev_prop_set_bit(vms->gic, "has-security-extensions", vms->secure= ); } =20 if (type =3D=3D 3) { @@ -624,25 +624,25 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) =20 nb_redist_regions =3D virt_gicv3_redist_region_count(vms); =20 - qdev_prop_set_uint32(gicdev, "len-redist-region-count", + qdev_prop_set_uint32(vms->gic, "len-redist-region-count", nb_redist_regions); - qdev_prop_set_uint32(gicdev, "redist-region-count[0]", redist0_cou= nt); + qdev_prop_set_uint32(vms->gic, "redist-region-count[0]", redist0_c= ount); =20 if (nb_redist_regions =3D=3D 2) { uint32_t redist1_capacity =3D vms->memmap[VIRT_HIGH_GIC_REDIST2].size / GICV3_REDIST= _SIZE; =20 - qdev_prop_set_uint32(gicdev, "redist-region-count[1]", + qdev_prop_set_uint32(vms->gic, "redist-region-count[1]", MIN(smp_cpus - redist0_count, redist1_capacity)); } } else { if (!kvm_irqchip_in_kernel()) { - qdev_prop_set_bit(gicdev, "has-virtualization-extensions", + qdev_prop_set_bit(vms->gic, "has-virtualization-extensions", vms->virt); } } - qdev_init_nofail(gicdev); - gicbusdev =3D SYS_BUS_DEVICE(gicdev); + qdev_init_nofail(vms->gic); + gicbusdev =3D SYS_BUS_DEVICE(vms->gic); sysbus_mmio_map(gicbusdev, 0, vms->memmap[VIRT_GIC_DIST].base); if (type =3D=3D 3) { sysbus_mmio_map(gicbusdev, 1, vms->memmap[VIRT_GIC_REDIST].base); @@ -678,23 +678,23 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) =20 for (irq =3D 0; irq < ARRAY_SIZE(timer_irq); irq++) { qdev_connect_gpio_out(cpudev, irq, - qdev_get_gpio_in(gicdev, + qdev_get_gpio_in(vms->gic, ppibase + timer_irq[irq= ])); } =20 if (type =3D=3D 3) { - qemu_irq irq =3D qdev_get_gpio_in(gicdev, + qemu_irq irq =3D qdev_get_gpio_in(vms->gic, ppibase + ARCH_GIC_MAINT_IRQ); qdev_connect_gpio_out_named(cpudev, "gicv3-maintenance-interru= pt", 0, irq); } else if (vms->virt) { - qemu_irq irq =3D qdev_get_gpio_in(gicdev, + qemu_irq irq =3D qdev_get_gpio_in(vms->gic, ppibase + ARCH_GIC_MAINT_IRQ); sysbus_connect_irq(gicbusdev, i + 4 * smp_cpus, irq); } =20 qdev_connect_gpio_out_named(cpudev, "pmu-interrupt", 0, - qdev_get_gpio_in(gicdev, ppibase + qdev_get_gpio_in(vms->gic, ppibase + VIRTUAL_PMU_IRQ)); =20 sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_= IRQ)); @@ -706,20 +706,16 @@ static void create_gic(VirtMachineState *vms, qemu_ir= q *pic) qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ)); } =20 - for (i =3D 0; i < NUM_IRQS; i++) { - pic[i] =3D qdev_get_gpio_in(gicdev, i); - } - fdt_add_gic_node(vms); =20 if (type =3D=3D 3 && vms->its) { - create_its(vms, gicdev); + create_its(vms); } else if (type =3D=3D 2) { - create_v2m(vms, pic); + create_v2m(vms); } } =20 -static void create_uart(const VirtMachineState *vms, qemu_irq *pic, int ua= rt, +static void create_uart(const VirtMachineState *vms, int uart, MemoryRegion *mem, Chardev *chr) { char *nodename; @@ -735,7 +731,7 @@ static void create_uart(const VirtMachineState *vms, qe= mu_irq *pic, int uart, qdev_init_nofail(dev); memory_region_add_subregion(mem, base, sysbus_mmio_get_region(s, 0)); - sysbus_connect_irq(s, 0, pic[irq]); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(vms->gic, irq)); =20 nodename =3D g_strdup_printf("/pl011@%" PRIx64, base); qemu_fdt_add_subnode(vms->fdt, nodename); @@ -767,7 +763,7 @@ static void create_uart(const VirtMachineState *vms, qe= mu_irq *pic, int uart, g_free(nodename); } =20 -static void create_rtc(const VirtMachineState *vms, qemu_irq *pic) +static void create_rtc(const VirtMachineState *vms) { char *nodename; hwaddr base =3D vms->memmap[VIRT_RTC].base; @@ -775,7 +771,7 @@ static void create_rtc(const VirtMachineState *vms, qem= u_irq *pic) int irq =3D vms->irqmap[VIRT_RTC]; const char compat[] =3D "arm,pl031\0arm,primecell"; =20 - sysbus_create_simple("pl031", base, pic[irq]); + sysbus_create_simple("pl031", base, qdev_get_gpio_in(vms->gic, irq)); =20 nodename =3D g_strdup_printf("/pl031@%" PRIx64, base); qemu_fdt_add_subnode(vms->fdt, nodename); @@ -803,7 +799,7 @@ static void virt_powerdown_req(Notifier *n, void *opaqu= e) } } =20 -static void create_gpio(const VirtMachineState *vms, qemu_irq *pic) +static void create_gpio(const VirtMachineState *vms) { char *nodename; DeviceState *pl061_dev; @@ -812,7 +808,8 @@ static void create_gpio(const VirtMachineState *vms, qe= mu_irq *pic) int irq =3D vms->irqmap[VIRT_GPIO]; const char compat[] =3D "arm,pl061\0arm,primecell"; =20 - pl061_dev =3D sysbus_create_simple("pl061", base, pic[irq]); + pl061_dev =3D sysbus_create_simple("pl061", base, + qdev_get_gpio_in(vms->gic, irq)); =20 uint32_t phandle =3D qemu_fdt_alloc_phandle(vms->fdt); nodename =3D g_strdup_printf("/pl061@%" PRIx64, base); @@ -846,7 +843,7 @@ static void create_gpio(const VirtMachineState *vms, qe= mu_irq *pic) g_free(nodename); } =20 -static void create_virtio_devices(const VirtMachineState *vms, qemu_irq *p= ic) +static void create_virtio_devices(const VirtMachineState *vms) { int i; hwaddr size =3D vms->memmap[VIRT_MMIO].size; @@ -882,7 +879,8 @@ static void create_virtio_devices(const VirtMachineStat= e *vms, qemu_irq *pic) int irq =3D vms->irqmap[VIRT_MMIO] + i; hwaddr base =3D vms->memmap[VIRT_MMIO].base + i * size; =20 - sysbus_create_simple("virtio-mmio", base, pic[irq]); + sysbus_create_simple("virtio-mmio", base, + qdev_get_gpio_in(vms->gic, irq)); } =20 /* We add dtb nodes in reverse order so that they appear in the finish= ed @@ -1131,7 +1129,7 @@ static void create_pcie_irq_map(const VirtMachineStat= e *vms, 0x7 /* PCI irq */); } =20 -static void create_smmu(const VirtMachineState *vms, qemu_irq *pic, +static void create_smmu(const VirtMachineState *vms, PCIBus *bus) { char *node; @@ -1154,7 +1152,8 @@ static void create_smmu(const VirtMachineState *vms, = qemu_irq *pic, qdev_init_nofail(dev); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i =3D 0; i < NUM_SMMU_IRQS; i++) { - sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pic[irq + i]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, + qdev_get_gpio_in(vms->gic, irq + i)); } =20 node =3D g_strdup_printf("/smmuv3@%" PRIx64, base); @@ -1181,7 +1180,7 @@ static void create_smmu(const VirtMachineState *vms, = qemu_irq *pic, g_free(node); } =20 -static void create_pcie(VirtMachineState *vms, qemu_irq *pic) +static void create_pcie(VirtMachineState *vms) { hwaddr base_mmio =3D vms->memmap[VIRT_PCIE_MMIO].base; hwaddr size_mmio =3D vms->memmap[VIRT_PCIE_MMIO].size; @@ -1241,7 +1240,8 @@ static void create_pcie(VirtMachineState *vms, qemu_i= rq *pic) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, base_pio); =20 for (i =3D 0; i < GPEX_NUM_IRQS; i++) { - sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, pic[irq + i]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, + qdev_get_gpio_in(vms->gic, irq + i)); gpex_set_irq_num(GPEX_HOST(dev), i, irq + i); } =20 @@ -1301,7 +1301,7 @@ static void create_pcie(VirtMachineState *vms, qemu_i= rq *pic) if (vms->iommu) { vms->iommu_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); =20 - create_smmu(vms, pic, pci->bus); + create_smmu(vms, pci->bus); =20 qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map", 0x0, vms->iommu_phandle, 0x0, 0x10000); @@ -1310,7 +1310,7 @@ static void create_pcie(VirtMachineState *vms, qemu_i= rq *pic) g_free(nodename); } =20 -static void create_platform_bus(VirtMachineState *vms, qemu_irq *pic) +static void create_platform_bus(VirtMachineState *vms) { DeviceState *dev; SysBusDevice *s; @@ -1326,8 +1326,8 @@ static void create_platform_bus(VirtMachineState *vms= , qemu_irq *pic) =20 s =3D SYS_BUS_DEVICE(dev); for (i =3D 0; i < PLATFORM_BUS_NUM_IRQS; i++) { - int irqn =3D vms->irqmap[VIRT_PLATFORM_BUS] + i; - sysbus_connect_irq(s, i, pic[irqn]); + int irq =3D vms->irqmap[VIRT_PLATFORM_BUS] + i; + sysbus_connect_irq(s, i, qdev_get_gpio_in(vms->gic, irq)); } =20 memory_region_add_subregion(sysmem, @@ -1509,7 +1509,6 @@ static void machvirt_init(MachineState *machine) VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(machine); MachineClass *mc =3D MACHINE_GET_CLASS(machine); const CPUArchIdList *possible_cpus; - qemu_irq pic[NUM_IRQS]; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *secure_sysmem =3D NULL; int n, virt_max_cpus; @@ -1712,27 +1711,27 @@ static void machvirt_init(MachineState *machine) =20 virt_flash_fdt(vms, sysmem, secure_sysmem ?: sysmem); =20 - create_gic(vms, pic); + create_gic(vms); =20 fdt_add_pmu_nodes(vms); =20 - create_uart(vms, pic, VIRT_UART, sysmem, serial_hd(0)); + create_uart(vms, VIRT_UART, sysmem, serial_hd(0)); =20 if (vms->secure) { create_secure_ram(vms, secure_sysmem); - create_uart(vms, pic, VIRT_SECURE_UART, secure_sysmem, serial_hd(1= )); + create_uart(vms, VIRT_SECURE_UART, secure_sysmem, serial_hd(1)); } =20 vms->highmem_ecam &=3D vms->highmem && (!firmware_loaded || aarch64); =20 - create_rtc(vms, pic); + create_rtc(vms); =20 - create_pcie(vms, pic); + create_pcie(vms); =20 if (has_ged && aarch64 && firmware_loaded && acpi_enabled) { - vms->acpi_dev =3D create_acpi_ged(vms, pic); + vms->acpi_dev =3D create_acpi_ged(vms); } else { - create_gpio(vms, pic); + create_gpio(vms); } =20 /* connect powerdown request */ @@ -1743,12 +1742,12 @@ static void machvirt_init(MachineState *machine) * (which will be automatically plugged in to the transports). If * no backend is created the transport will just sit harmlessly idle. */ - create_virtio_devices(vms, pic); + create_virtio_devices(vms); =20 vms->fw_cfg =3D create_fw_cfg(vms, &address_space_memory); rom_set_fw(vms->fw_cfg); =20 - create_platform_bus(vms, pic); + create_platform_bus(vms); =20 vms->bootinfo.ram_size =3D machine->ram_size; vms->bootinfo.nb_cpus =3D smp_cpus; --=20 2.20.1