From nobody Mon Apr 29 05:57:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1576175416; cv=none; d=zohomail.com; s=zohoarc; b=k4PHr/mapYoF+8isQzxdv2HSUDggRtn+N21MVXhBFRe/YfrPIM1DbcCIwgdwfwVLzpGAmQLWXouiT17P8J21/2ZHIPVUrVPa7mULhe4sKoB2XthfkeC85jEhUm8Q9KOCJ+1I6zJ5U7u+7bl5JqV0owIdMg+Kei+RU2N3nEz3O28= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1576175416; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=VSHnNeve0nJFno0tiuZhETFw3aDOpI+ZqpQb8S6dcfM=; b=Ee39Ze5CEJQCYUBLXwIQEuWg6bGWuh2GcJKF4MVvRlHxB2CA/Q5xeQGOcdryI02r/cXnDoDB71UFGegAvzMOoPCtWJ3vvsA3NsbDEaT1yvHXPsz5ku1F5t+M6ngH63MQkvZUFr6E8JrFhosTIcjBYCktvtLnKn3a+rTnB39jFIc= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 157617541679814.814772172985386; Thu, 12 Dec 2019 10:30:16 -0800 (PST) Received: from localhost ([::1]:35766 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifTE6-0001KB-49 for importer@patchew.org; Thu, 12 Dec 2019 13:30:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:45451) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ifSLR-0002Ki-MP for qemu-devel@nongnu.org; Thu, 12 Dec 2019 12:33:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ifSLO-0002vc-Ot for qemu-devel@nongnu.org; Thu, 12 Dec 2019 12:33:45 -0500 Received: from us-smtp-2.mimecast.com ([207.211.31.81]:43525 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ifSLO-0002qS-JD for qemu-devel@nongnu.org; Thu, 12 Dec 2019 12:33:42 -0500 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-391-7gC1GShBNBaKdNrdlOwHRQ-1; Thu, 12 Dec 2019 12:33:36 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 71FBEDB20; Thu, 12 Dec 2019 17:33:33 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0511C19756; Thu, 12 Dec 2019 17:33:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1576172017; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VSHnNeve0nJFno0tiuZhETFw3aDOpI+ZqpQb8S6dcfM=; b=bZQiSgGWeIN4iwLOkEn0b91z9AxeSx8xMtztKEmbHnpW2mM0nf/SUZNYFlG5v4GNFwKTGT GBbq7v2O/ugOWiIJa8rrMsd7cIM6eFE4s/cJIEDgN08/Nyj1rH+JjE2eaw9L5FD2sbJ1O8 nt0IC5yLP+WYsUlVA+RBg+gT2E3q0tw= From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH v2 1/5] hw: add compat machines for 5.0 Date: Thu, 12 Dec 2019 18:33:16 +0100 Message-Id: <20191212173320.11610-2-drjones@redhat.com> In-Reply-To: <20191212173320.11610-1-drjones@redhat.com> References: <20191212173320.11610-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-MC-Unique: 7gC1GShBNBaKdNrdlOwHRQ-1 X-Mimecast-Spam-Score: 0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Cornelia Huck , bijan.mottahedeh@oracle.com, "Michael S. Tsirkin" , maz@kernel.org, Richard Henderson , David Hildenbrand , richard.henderson@linaro.org, Halil Pasic , Christian Borntraeger , "open list:S390 TCG CPUs" , "open list:sPAPR" , David Gibson , guoheyi@huawei.com, Paolo Bonzini , msys.mizuma@gmail.com, Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Add 5.0 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by: Andrew Jones Acked-by: David Gibson Reviewed-by: David Hildenbrand --- Hi Eduardo, If we need to do something special for i440fx and q35, as 9aec2e52ce9d ("hw: add compat machines for 4.2") implies, then I'll need guidance as to what. --- hw/arm/virt.c | 9 ++++++++- hw/core/machine.c | 3 +++ hw/i386/pc.c | 3 +++ hw/i386/pc_piix.c | 14 +++++++++++++- hw/i386/pc_q35.c | 13 ++++++++++++- hw/ppc/spapr.c | 15 +++++++++++++-- hw/s390x/s390-virtio-ccw.c | 15 ++++++++++++++- include/hw/boards.h | 3 +++ include/hw/i386/pc.h | 3 +++ 9 files changed, 72 insertions(+), 6 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index d4bedc260712..cb7041e9677a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2147,10 +2147,17 @@ static void machvirt_machine_init(void) } type_init(machvirt_machine_init); =20 +static void virt_machine_5_0_options(MachineClass *mc) +{ +} +DEFINE_VIRT_MACHINE_AS_LATEST(5, 0) + static void virt_machine_4_2_options(MachineClass *mc) { + virt_machine_5_0_options(mc); + compat_props_add(mc->compat_props, hw_compat_4_2, hw_compat_4_2_len); } -DEFINE_VIRT_MACHINE_AS_LATEST(4, 2) +DEFINE_VIRT_MACHINE(4, 2) =20 static void virt_machine_4_1_options(MachineClass *mc) { diff --git a/hw/core/machine.c b/hw/core/machine.c index 1689ad3bf8af..21fe2d974817 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -27,6 +27,9 @@ #include "hw/pci/pci.h" #include "hw/mem/nvdimm.h" =20 +GlobalProperty hw_compat_4_2[] =3D {}; +const size_t hw_compat_4_2_len =3D G_N_ELEMENTS(hw_compat_4_2); + GlobalProperty hw_compat_4_1[] =3D { { "virtio-pci", "x-pcie-flr-init", "off" }, }; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index ac08e6360437..58867f987d88 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -103,6 +103,9 @@ =20 struct hpet_fw_config hpet_cfg =3D {.count =3D UINT8_MAX}; =20 +GlobalProperty pc_compat_4_2[] =3D {}; +const size_t pc_compat_4_2_len =3D G_N_ELEMENTS(pc_compat_4_2); + GlobalProperty pc_compat_4_1[] =3D {}; const size_t pc_compat_4_1_len =3D G_N_ELEMENTS(pc_compat_4_1); =20 diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 1bd70d1abbc4..aa2c6147a7ea 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -424,7 +424,7 @@ static void pc_i440fx_machine_options(MachineClass *m) machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE); } =20 -static void pc_i440fx_4_2_machine_options(MachineClass *m) +static void pc_i440fx_5_0_machine_options(MachineClass *m) { PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); pc_i440fx_machine_options(m); @@ -433,6 +433,18 @@ static void pc_i440fx_4_2_machine_options(MachineClass= *m) pcmc->default_cpu_version =3D 1; } =20 +DEFINE_I440FX_MACHINE(v5_0, "pc-i440fx-5.0", NULL, + pc_i440fx_5_0_machine_options) + +static void pc_i440fx_4_2_machine_options(MachineClass *m) +{ + pc_i440fx_5_0_machine_options(m); + m->alias =3D NULL; + m->is_default =3D 0; + compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); + compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); +} + DEFINE_I440FX_MACHINE(v4_2, "pc-i440fx-4.2", NULL, pc_i440fx_4_2_machine_options); =20 diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index 385e5cffb167..ddd485d608c0 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -348,7 +348,7 @@ static void pc_q35_machine_options(MachineClass *m) m->max_cpus =3D 288; } =20 -static void pc_q35_4_2_machine_options(MachineClass *m) +static void pc_q35_5_0_machine_options(MachineClass *m) { PCMachineClass *pcmc =3D PC_MACHINE_CLASS(m); pc_q35_machine_options(m); @@ -356,6 +356,17 @@ static void pc_q35_4_2_machine_options(MachineClass *m) pcmc->default_cpu_version =3D 1; } =20 +DEFINE_Q35_MACHINE(v5_0, "pc-q35-5.0", NULL, + pc_q35_5_0_machine_options); + +static void pc_q35_4_2_machine_options(MachineClass *m) +{ + pc_q35_5_0_machine_options(m); + m->alias =3D NULL; + compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len); + compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len); +} + DEFINE_Q35_MACHINE(v4_2, "pc-q35-4.2", NULL, pc_q35_4_2_machine_options); =20 diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index e076f6023c73..3ae7db156303 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -4491,15 +4491,26 @@ static const TypeInfo spapr_machine_info =3D { } \ type_init(spapr_machine_register_##suffix) =20 +/* + * pseries-5.0 + */ +static void spapr_machine_5_0_class_options(MachineClass *mc) +{ + /* Defaults for the latest behaviour inherited from the base class */ +} + +DEFINE_SPAPR_MACHINE(5_0, "5.0", true); + /* * pseries-4.2 */ static void spapr_machine_4_2_class_options(MachineClass *mc) { - /* Defaults for the latest behaviour inherited from the base class */ + spapr_machine_5_0_class_options(mc); + compat_props_add(mc->compat_props, hw_compat_4_2, hw_compat_4_2_len); } =20 -DEFINE_SPAPR_MACHINE(4_2, "4.2", true); +DEFINE_SPAPR_MACHINE(4_2, "4.2", false); =20 /* * pseries-4.1 diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index d3edeef0ad92..a40f79e20733 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -639,14 +639,27 @@ bool css_migration_enabled(void) } = \ type_init(ccw_machine_register_##suffix) =20 + +static void ccw_machine_5_0_instance_options(MachineState *machine) +{ +} + +static void ccw_machine_5_0_class_options(MachineClass *mc) +{ +} +DEFINE_CCW_MACHINE(5_0, "5.0", true); + static void ccw_machine_4_2_instance_options(MachineState *machine) { + ccw_machine_5_0_instance_options(machine); } =20 static void ccw_machine_4_2_class_options(MachineClass *mc) { + ccw_machine_5_0_class_options(mc); + compat_props_add(mc->compat_props, hw_compat_4_2, hw_compat_4_2_len); } -DEFINE_CCW_MACHINE(4_2, "4.2", true); +DEFINE_CCW_MACHINE(4_2, "4.2", false); =20 static void ccw_machine_4_1_instance_options(MachineState *machine) { diff --git a/include/hw/boards.h b/include/hw/boards.h index de45087f34cb..24cbeecbaecc 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -329,6 +329,9 @@ struct MachineState { } \ type_init(machine_initfn##_register_types) =20 +extern GlobalProperty hw_compat_4_2[]; +extern const size_t hw_compat_4_2_len; + extern GlobalProperty hw_compat_4_1[]; extern const size_t hw_compat_4_1_len; =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 1f86eba3f998..61a998de4665 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -237,6 +237,9 @@ void pc_system_firmware_init(PCMachineState *pcms, Memo= ryRegion *rom_memory); void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid, const CPUArchIdList *apic_ids, GArray *entry); =20 +extern GlobalProperty pc_compat_4_2[]; +extern const size_t pc_compat_4_2_len; + extern GlobalProperty pc_compat_4_1[]; extern const size_t pc_compat_4_1_len; =20 --=20 2.21.0 From nobody Mon Apr 29 05:57:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1576175064; cv=none; d=zohomail.com; s=zohoarc; b=KexO3GaYijZx5Px9fGG5f+cA+YWj2ILrFuS8e7KVqFj6bZEGBZheGjSMttrGTVHPA1Jx98TydOlJq37CSacDRZQ+aI/hj57GhmKXA+nd5OqMwYwQDfbxOFVR0i/UaGxfAfB/tEpJIjmQCy7sTCA4FTlMZa/ZdJjNqqjCS0fcCgg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; 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Thu, 12 Dec 2019 17:33:35 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id C6A2419C4F; Thu, 12 Dec 2019 17:33:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1576172020; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=r69RStoSm0rMO8wwtIxPtrqT52+0T861lC3busDYwak=; b=Wtcl+Le6v0hhSRxyATrCtT8df+xLyJB0vS+Bnkx+nkxUKxSLjofZbTKR86yl3VMEX9Avb7 A0/7IYgTVr+aBNESmy6y0qk7vWmC2hUixEpbkuQ09TRocAPgBsB7qf3/ZBwwknaGR4Z2uH f7RtG+4MMslpRUfRi/O89xEw+nPnp/s= From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH v2 2/5] target/arm/kvm64: kvm64 cpus have timer registers Date: Thu, 12 Dec 2019 18:33:17 +0100 Message-Id: <20191212173320.11610-3-drjones@redhat.com> In-Reply-To: <20191212173320.11610-1-drjones@redhat.com> References: <20191212173320.11610-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-MC-Unique: ByIa6DMzPIaUClIcA_SxXw-1 X-Mimecast-Spam-Score: 0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 205.139.110.61 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org, richard.henderson@linaro.org, guoheyi@huawei.com, msys.mizuma@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Add the missing GENERIC_TIMER feature to kvm64 cpus. We don't currently use these registers when KVM is enabled, but it's probably best we add the feature flag for consistency and potential future use. There's also precedent, as we add the PMU feature flag to KVM enabled guests, even though we don't use those registers either. This change was originally posted as a hunk of a different, never merged patch from Bijan Mottahedeh. Signed-off-by: Andrew Jones Reviewed-by: Richard Henderson --- target/arm/kvm64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 876184b8fe4d..5cafcb7d36dd 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -605,6 +605,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *= ahcf) set_feature(&features, ARM_FEATURE_NEON); set_feature(&features, ARM_FEATURE_AARCH64); set_feature(&features, ARM_FEATURE_PMU); + set_feature(&features, ARM_FEATURE_GENERIC_TIMER); =20 ahcf->features =3D features; =20 --=20 2.21.0 From nobody Mon Apr 29 05:57:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 12 Dec 2019 12:33:44 -0500 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-151-qPAblt0SOpKv5S9d8zcKsQ-1; Thu, 12 Dec 2019 12:33:39 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id C0F7D800D4E; Thu, 12 Dec 2019 17:33:37 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 01B4819C4F; Thu, 12 Dec 2019 17:33:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1576172023; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=n/IbXa6/cRTFnZUB1PA5FcfNgMBIt9Opu+eYgctHLuE=; b=YTiHxGj9IOv2hQUYyb0sbwNLxStp0G3Jn0FN4qOqOfositoZgDAKfLBEowMi4YETAxTEXD uwyhaDkx7u0VYC6ExKNBW2jUFBeHq5PjjJtXw1X+dtoyNULL8DjjDzaUkWTgLyA2Gwgs56 HXPDhrzqqjdfeAIMOuu1bHb1PaAxGkY= From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH v2 3/5] target/arm/kvm: Implement virtual time adjustment Date: Thu, 12 Dec 2019 18:33:18 +0100 Message-Id: <20191212173320.11610-4-drjones@redhat.com> In-Reply-To: <20191212173320.11610-1-drjones@redhat.com> References: <20191212173320.11610-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-MC-Unique: qPAblt0SOpKv5S9d8zcKsQ-1 X-Mimecast-Spam-Score: 0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org, richard.henderson@linaro.org, guoheyi@huawei.com, msys.mizuma@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" When a VM is stopped (guest is paused) guest virtual time should stop counting. Otherwise, when the VM is resumed it will experience time jumps and its kernel may report soft lockups. Not counting virtual time while the VM is stopped has the side effect of making the guest's time appear to lag when compared with real time, and even with time derived from the physical counter. For this reason, this change, which is enabled by default, comes with a KVM CPU feature allowing it to be disabled, restoring legacy behavior. This patch only provides the implementation of the virtual time adjustment. A subsequent patch will provide the CPU property allowing the change to be enabled and disabled. Reported-by: Bijan Mottahedeh Signed-off-by: Andrew Jones --- target/arm/cpu.h | 9 +++++++++ target/arm/kvm.c | 48 ++++++++++++++++++++++++++++++++++++++++++++ target/arm/kvm32.c | 3 +++ target/arm/kvm64.c | 3 +++ target/arm/kvm_arm.h | 23 +++++++++++++++++++++ 5 files changed, 86 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 83a809d4bac4..a79ea74125b3 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -821,6 +821,15 @@ struct ARMCPU { /* KVM init features for this CPU */ uint32_t kvm_init_features[7]; =20 + /* KVM CPU features */ + bool kvm_adjvtime; + + /* VCPU virtual counter value used with kvm_adjvtime */ + uint64_t kvm_vtime; + + /* True if the run state is, or transitioning from, RUN_STATE_PAUSED */ + bool runstate_paused; + /* Uniprocessor system with MP extensions */ bool mp_is_up; =20 diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 5b82cefef608..a55fe7d7aefd 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -348,6 +348,24 @@ void kvm_arm_register_device(MemoryRegion *mr, uint64_= t devid, uint64_t group, memory_region_ref(kd->mr); } =20 +void kvm_arm_vm_state_change(void *opaque, int running, RunState state) +{ + CPUState *cs =3D opaque; + ARMCPU *cpu =3D ARM_CPU(cs); + + if (running) { + if (cpu->kvm_adjvtime && cpu->runstate_paused) { + kvm_arm_set_virtual_time(cs, cpu->kvm_vtime); + } + cpu->runstate_paused =3D false; + } else if (state =3D=3D RUN_STATE_PAUSED) { + cpu->runstate_paused =3D true; + if (cpu->kvm_adjvtime) { + kvm_arm_get_virtual_time(cs, &cpu->kvm_vtime); + } + } +} + static int compare_u64(const void *a, const void *b) { if (*(uint64_t *)a > *(uint64_t *)b) { @@ -579,6 +597,36 @@ int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu) return 0; } =20 +void kvm_arm_get_virtual_time(CPUState *cs, uint64_t *cnt) +{ + struct kvm_one_reg reg =3D { + .id =3D KVM_REG_ARM_TIMER_CNT, + .addr =3D (uintptr_t)cnt, + }; + int ret; + + ret =3D kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, ®); + if (ret) { + error_report("Failed to get KVM_REG_ARM_TIMER_CNT"); + abort(); + } +} + +void kvm_arm_set_virtual_time(CPUState *cs, uint64_t cnt) +{ + struct kvm_one_reg reg =3D { + .id =3D KVM_REG_ARM_TIMER_CNT, + .addr =3D (uintptr_t)&cnt, + }; + int ret; + + ret =3D kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); + if (ret) { + error_report("Failed to set KVM_REG_ARM_TIMER_CNT"); + abort(); + } +} + int kvm_put_vcpu_events(ARMCPU *cpu) { CPUARMState *env =3D &cpu->env; diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c index 32bf8d6757c4..3a8b437eef0b 100644 --- a/target/arm/kvm32.c +++ b/target/arm/kvm32.c @@ -16,6 +16,7 @@ #include "qemu-common.h" #include "cpu.h" #include "qemu/timer.h" +#include "sysemu/runstate.h" #include "sysemu/kvm.h" #include "kvm_arm.h" #include "internals.h" @@ -198,6 +199,8 @@ int kvm_arch_init_vcpu(CPUState *cs) return -EINVAL; } =20 + qemu_add_vm_change_state_handler(kvm_arm_vm_state_change, cs); + /* Determine init features for this CPU */ memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features)); if (cpu->start_powered_off) { diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 5cafcb7d36dd..e486eaf1f944 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -23,6 +23,7 @@ #include "qemu/host-utils.h" #include "qemu/main-loop.h" #include "exec/gdbstub.h" +#include "sysemu/runstate.h" #include "sysemu/kvm.h" #include "sysemu/kvm_int.h" #include "kvm_arm.h" @@ -735,6 +736,8 @@ int kvm_arch_init_vcpu(CPUState *cs) return -EINVAL; } =20 + qemu_add_vm_change_state_handler(kvm_arm_vm_state_change, cs); + /* Determine init features for this CPU */ memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features)); if (cpu->start_powered_off) { diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 8e14d400e8ab..16b53e45377d 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -232,6 +232,24 @@ void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *= map); */ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu); =20 +/** + * void kvm_arm_get_virtual_time: + * @cs: CPUState + * @cnt: the virtual counter to fill in + * + * Gets the VCPU's virtual counter and stores it in @cnt. + */ +void kvm_arm_get_virtual_time(CPUState *cs, uint64_t *cnt); + +/** + * void kvm_arm_set_virtual_time: + * @cs: CPUState + * @cnt: new virtual counter value + * + * Sets the VCPU's virtual counter to @cnt. + */ +void kvm_arm_set_virtual_time(CPUState *cs, uint64_t cnt); + /** * kvm_arm_aarch32_supported: * @cs: CPUState @@ -288,6 +306,8 @@ void kvm_arm_pmu_set_irq(CPUState *cs, int irq); void kvm_arm_pmu_init(CPUState *cs); int kvm_arm_set_irq(int cpu, int irqtype, int irq, int level); =20 +void kvm_arm_vm_state_change(void *opaque, int running, RunState state); + #else =20 static inline void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) @@ -324,6 +344,9 @@ static inline int kvm_arm_vgic_probe(void) return 0; } =20 +static inline void kvm_arm_get_virtual_time(CPUState *cs, uint64_t *cnt) {} +static inline void kvm_arm_set_virtual_time(CPUState *cs, uint64_t cnt) {} + static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) {} static inline void kvm_arm_pmu_init(CPUState *cs) {} =20 --=20 2.21.0 From nobody Mon Apr 29 05:57:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 12 Dec 2019 12:33:59 -0500 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-429-pGsM3uK6M5qBd83KTUfzeQ-1; Thu, 12 Dec 2019 12:33:45 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 13860100550E; Thu, 12 Dec 2019 17:33:43 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 84FDC19C4F; Thu, 12 Dec 2019 17:33:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1576172038; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SPLS5NIhOUYnpOd47+R+TTvsglOjsh+VvePSphXpSOc=; b=Ch+LcReGakefmhPK5s4+y8sxEoPMbeae+7vunFOtBaI1RN/Ll477iy0RU6AuO6CRxYAw2J GUMeRyZ8lKZ7dzhcoHU9Obqmoki4Sif4uku3GgmXI2nzJ+vib3p2unkJGZ/AcGSCA2cIXQ nchhuTdvug94vCXSMI+ZN+zZskuaIc8= From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH v2 4/5] tests/arm-cpu-features: Check feature default values Date: Thu, 12 Dec 2019 18:33:19 +0100 Message-Id: <20191212173320.11610-5-drjones@redhat.com> In-Reply-To: <20191212173320.11610-1-drjones@redhat.com> References: <20191212173320.11610-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-MC-Unique: pGsM3uK6M5qBd83KTUfzeQ-1 X-Mimecast-Spam-Score: 0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org, richard.henderson@linaro.org, Eric Auger , guoheyi@huawei.com, msys.mizuma@gmail.com, Beata Michalska Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" If we know what the default value should be then we can test for that as well as the feature existence. Signed-off-by: Andrew Jones Reviewed-by: Richard Henderson --- tests/arm-cpu-features.c | 44 ++++++++++++++++++++++++++++++++-------- 1 file changed, 35 insertions(+), 9 deletions(-) diff --git a/tests/arm-cpu-features.c b/tests/arm-cpu-features.c index 6e99aa951e74..06ed05e934e6 100644 --- a/tests/arm-cpu-features.c +++ b/tests/arm-cpu-features.c @@ -159,6 +159,32 @@ static bool resp_get_feature(QDict *resp, const char *= feature) qobject_unref(_resp); \ }) =20 +#define assert_has_feature_enabled(qts, cpu_type, feature) \ +({ \ + QDict *_resp, *_props; \ + \ + _resp =3D do_query_no_props(qts, cpu_type); \ + g_assert(_resp); \ + g_assert(resp_has_props(_resp)); \ + _props =3D resp_get_props(_resp); \ + g_assert(qdict_get(_props, feature)); \ + g_assert(qdict_get_bool(_props, feature)); \ + qobject_unref(_resp); \ +}) + +#define assert_has_feature_disabled(qts, cpu_type, feature) \ +({ \ + QDict *_resp, *_props; \ + \ + _resp =3D do_query_no_props(qts, cpu_type); \ + g_assert(_resp); \ + g_assert(resp_has_props(_resp)); \ + _props =3D resp_get_props(_resp); \ + g_assert(qdict_get(_props, feature)); \ + g_assert(!qdict_get_bool(_props, feature)); \ + qobject_unref(_resp); \ +}) + static void assert_type_full(QTestState *qts) { const char *error; @@ -405,16 +431,16 @@ static void test_query_cpu_model_expansion(const void= *data) assert_error(qts, "host", "The CPU type 'host' requires KVM", NULL); =20 /* Test expected feature presence/absence for some cpu types */ - assert_has_feature(qts, "max", "pmu"); - assert_has_feature(qts, "cortex-a15", "pmu"); + assert_has_feature_enabled(qts, "max", "pmu"); + assert_has_feature_enabled(qts, "cortex-a15", "pmu"); assert_has_not_feature(qts, "cortex-a15", "aarch64"); =20 if (g_str_equal(qtest_get_arch(), "aarch64")) { - assert_has_feature(qts, "max", "aarch64"); - assert_has_feature(qts, "max", "sve"); - assert_has_feature(qts, "max", "sve128"); - assert_has_feature(qts, "cortex-a57", "pmu"); - assert_has_feature(qts, "cortex-a57", "aarch64"); + assert_has_feature_enabled(qts, "max", "aarch64"); + assert_has_feature_enabled(qts, "max", "sve"); + assert_has_feature_enabled(qts, "max", "sve128"); + assert_has_feature_enabled(qts, "cortex-a57", "pmu"); + assert_has_feature_enabled(qts, "cortex-a57", "aarch64"); =20 sve_tests_default(qts, "max"); =20 @@ -451,8 +477,8 @@ static void test_query_cpu_model_expansion_kvm(const vo= id *data) QDict *resp; char *error; =20 - assert_has_feature(qts, "host", "aarch64"); - assert_has_feature(qts, "host", "pmu"); + assert_has_feature_enabled(qts, "host", "aarch64"); + assert_has_feature_enabled(qts, "host", "pmu"); =20 assert_error(qts, "cortex-a15", "We cannot guarantee the CPU type 'cortex-a15' works " --=20 2.21.0 From nobody Mon Apr 29 05:57:30 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; 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Thu, 12 Dec 2019 12:33:49 -0500 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-423-qCLQr4uSMVWCSCAc0HmYAg-1; Thu, 12 Dec 2019 12:33:46 -0500 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 4742418543A0; Thu, 12 Dec 2019 17:33:45 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7A2621C955; Thu, 12 Dec 2019 17:33:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1576172029; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=p89rsIiZEknzKudPE9sULObTiNHU6cO6PEn+xslTix4=; b=P3ndChPyKWPYAfk8sqWxdZZIHGwtkBIa5Jn7W87ojAm6K5f/aHODDCB5euJgDBeGpG+DBp GrY56Faclx4/Ub9UzgGCvknzoQYfY7EDKtt4pouVrOhLfKOgqPwQubPgMiiu3KX1hDv1KA p+cIf98MS1ozMkb7EC1s9FDhUsrqS6M= From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH v2 5/5] target/arm/cpu: Add the kvm-no-adjvtime CPU property Date: Thu, 12 Dec 2019 18:33:20 +0100 Message-Id: <20191212173320.11610-6-drjones@redhat.com> In-Reply-To: <20191212173320.11610-1-drjones@redhat.com> References: <20191212173320.11610-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-MC-Unique: qCLQr4uSMVWCSCAc0HmYAg-1 X-Mimecast-Spam-Score: 0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 207.211.31.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org, richard.henderson@linaro.org, guoheyi@huawei.com, msys.mizuma@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" kvm-no-adjvtime is a KVM specific CPU property and a first of its kind. To accommodate it we also add kvm_arm_add_vcpu_properties() and a KVM specific CPU properties description to the CPU features document. Signed-off-by: Andrew Jones --- docs/arm-cpu-features.rst | 31 ++++++++++++++++++++++++++++++- hw/arm/virt.c | 8 ++++++++ include/hw/arm/virt.h | 1 + target/arm/cpu.c | 2 ++ target/arm/cpu64.c | 1 + target/arm/kvm.c | 28 ++++++++++++++++++++++++++++ target/arm/kvm_arm.h | 11 +++++++++++ target/arm/monitor.c | 1 + tests/arm-cpu-features.c | 4 ++++ 9 files changed, 86 insertions(+), 1 deletion(-) diff --git a/docs/arm-cpu-features.rst b/docs/arm-cpu-features.rst index 1b367e22e16e..641ec9cb8f4a 100644 --- a/docs/arm-cpu-features.rst +++ b/docs/arm-cpu-features.rst @@ -31,7 +31,9 @@ supporting the feature or only supporting the feature und= er certain configurations. For example, the `aarch64` CPU feature, which, when disabled, enables the optional AArch32 CPU feature, is only supported when using the KVM accelerator and when running on a host CPU type that -supports the feature. +supports the feature. While `aarch64` currently only works with KVM, +it could work with TCG. CPU features that are specific to KVM are +prefixed with "kvm-" and are described in "KVM VCPU Features". =20 CPU Feature Probing =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D @@ -171,6 +173,33 @@ disabling many SVE vector lengths would be quite verbo= se, the `sve` CPU properties have special semantics (see "SVE CPU Property Parsing Semantics"). =20 +KVM VCPU Features +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +KVM VCPU features are CPU features that are specific to KVM, such as +paravirt features or features that enable CPU virtualization extensions. +The features' CPU properties are only available when KVM is enabled and +are named with the prefix "kvm-". KVM VCPU features may be probed, +enabled, and disabled in the same way as other CPU features. Below is the +list of KVM VCPU features and their descriptions. + + kvm-no-adjvtime When disabled, each time the VM transitions + back to running state from the paused state the + VCPU's vitual counter is updated to ensure the + stopped time is not counted. This avoids time + jumps surprising guest OSes and applications, + as long as they use the virtual counter for + timekeeping, but has the side effect of the + virtual and physical counters diverging. All + timekeeping based on the virtual counter will + appear to lag behind any timekeeping that does + not subtract VM stopped time. The guest may + resynchronize its virtual counter with other + time sources as needed. Enabling this KVM VCPU + feature provides the legacy behavior, which is + to also count stopped time with the virtual + counter. + SVE CPU Properties =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index cb7041e9677a..e9a08eb883bf 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1664,6 +1664,11 @@ static void machvirt_init(MachineState *machine) } } =20 + if (vmc->kvm_no_adjvtime && + object_property_find(cpuobj, "kvm-no-adjvtime", NULL)) { + object_property_set_bool(cpuobj, true, "kvm-no-adjvtime", NULL= ); + } + if (vmc->no_pmu && object_property_find(cpuobj, "pmu", NULL)) { object_property_set_bool(cpuobj, false, "pmu", NULL); } @@ -2154,8 +2159,11 @@ DEFINE_VIRT_MACHINE_AS_LATEST(5, 0) =20 static void virt_machine_4_2_options(MachineClass *mc) { + VirtMachineClass *vmc =3D VIRT_MACHINE_CLASS(OBJECT_CLASS(mc)); + virt_machine_5_0_options(mc); compat_props_add(mc->compat_props, hw_compat_4_2, hw_compat_4_2_len); + vmc->kvm_no_adjvtime =3D true; } DEFINE_VIRT_MACHINE(4, 2) =20 diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 0b41083e9d5c..80e00161b8f2 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -109,6 +109,7 @@ typedef struct { bool smbios_old_sys_ver; bool no_highmem_ecam; bool no_ged; /* Machines < 4.2 has no support for ACPI GED device */ + bool kvm_no_adjvtime; } VirtMachineClass; =20 typedef struct { diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 7a4ac9339bf9..53c73c25a67f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2482,6 +2482,7 @@ static void arm_max_initfn(Object *obj) =20 if (kvm_enabled()) { kvm_arm_set_cpu_features_from_host(cpu); + kvm_arm_add_vcpu_properties(obj); } else { cortex_a15_initfn(obj); =20 @@ -2673,6 +2674,7 @@ static void arm_host_initfn(Object *obj) if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { aarch64_add_sve_properties(obj); } + kvm_arm_add_vcpu_properties(obj); arm_cpu_post_init(obj); } =20 diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index a39d6fcea34f..3cd416db8089 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -605,6 +605,7 @@ static void aarch64_max_initfn(Object *obj) =20 if (kvm_enabled()) { kvm_arm_set_cpu_features_from_host(cpu); + kvm_arm_add_vcpu_properties(obj); } else { uint64_t t; uint32_t u; diff --git a/target/arm/kvm.c b/target/arm/kvm.c index a55fe7d7aefd..7666b250ab96 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -17,6 +17,8 @@ #include "qemu/timer.h" #include "qemu/error-report.h" #include "qemu/main-loop.h" +#include "qom/object.h" +#include "qapi/error.h" #include "sysemu/sysemu.h" #include "sysemu/kvm.h" #include "sysemu/kvm_int.h" @@ -179,6 +181,32 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) env->features =3D arm_host_cpu_features.features; } =20 +static bool kvm_no_adjvtime_get(Object *obj, Error **errp) +{ + return !ARM_CPU(obj)->kvm_adjvtime; +} + +static void kvm_no_adjvtime_set(Object *obj, bool value, Error **errp) +{ + ARM_CPU(obj)->kvm_adjvtime =3D !value; +} + +/* KVM VCPU properties should be prefixed with "kvm-". */ +void kvm_arm_add_vcpu_properties(Object *obj) +{ + if (!kvm_enabled()) { + return; + } + + ARM_CPU(obj)->kvm_adjvtime =3D true; + object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get, + kvm_no_adjvtime_set, &error_abort); + object_property_set_description(obj, "kvm-no-adjvtime", + "Set on to disable the adjustment of " + "the virtual counter. VM stopped time " + "will be counted.", &error_abort); +} + bool kvm_arm_pmu_supported(CPUState *cpu) { KVMState *s =3D KVM_STATE(current_machine->accelerator); diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index 16b53e45377d..7d76f26beaca 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -232,6 +232,15 @@ void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *= map); */ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu); =20 +/** + * void kvm_arm_add_vcpu_properties: + * @obj: The CPU object to add the properties to + * + * Add all KVM specific CPU properties to the CPU object. These + * are the CPU properties with "kvm-" prefixed names. + */ +void kvm_arm_add_vcpu_properties(Object *obj); + /** * void kvm_arm_get_virtual_time: * @cs: CPUState @@ -319,6 +328,8 @@ static inline void kvm_arm_set_cpu_features_from_host(A= RMCPU *cpu) cpu->host_cpu_probe_failed =3D true; } =20 +static inline void kvm_arm_add_vcpu_properties(Object *obj) {} + static inline bool kvm_arm_aarch32_supported(CPUState *cs) { return false; diff --git a/target/arm/monitor.c b/target/arm/monitor.c index fa054f8a369c..9725dfff16d4 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -103,6 +103,7 @@ static const char *cpu_model_advertised_features[] =3D { "sve128", "sve256", "sve384", "sve512", "sve640", "sve768", "sve896", "sve1024", "sve1152", "sve1280", "sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048", + "kvm-no-adjvtime", NULL }; =20 diff --git a/tests/arm-cpu-features.c b/tests/arm-cpu-features.c index 06ed05e934e6..738e49447377 100644 --- a/tests/arm-cpu-features.c +++ b/tests/arm-cpu-features.c @@ -435,6 +435,8 @@ static void test_query_cpu_model_expansion(const void *= data) assert_has_feature_enabled(qts, "cortex-a15", "pmu"); assert_has_not_feature(qts, "cortex-a15", "aarch64"); =20 + assert_has_not_feature(qts, "max", "kvm-no-adjvtime"); + if (g_str_equal(qtest_get_arch(), "aarch64")) { assert_has_feature_enabled(qts, "max", "aarch64"); assert_has_feature_enabled(qts, "max", "sve"); @@ -469,6 +471,8 @@ static void test_query_cpu_model_expansion_kvm(const vo= id *data) return; } =20 + assert_has_feature_disabled(qts, "host", "kvm-no-adjvtime"); + if (g_str_equal(qtest_get_arch(), "aarch64")) { bool kvm_supports_sve; char max_name[8], name[8]; --=20 2.21.0