From nobody Mon Feb 9 22:19:14 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1575875801; cv=none; d=zohomail.com; s=zohoarc; b=VfYNbzhKhnDrs+EcAMcG2ImgtmrMcTTc8fhXWrkeLF4z/mHYOv5wdIWt7exrpLT45ebdjof643ySEGBatjVX0YzWyARga/SGnIHqSIYooote+HBoS6B52VNb3hfdD8NCTz30cDhkTLZshZ3paTbib7kfMQbMYWR1xfdvauCcQ7U= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1575875801; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=iTjAhl3rtK1K5r4qUFbgYmq9CePYgz/C7iz+YVTMMHM=; b=b9Oe0jH5YqVhBDVSB4dABkK8NC3m9eB5RM+qWeaYlHf5qVJ7YFbtYvb+B9AgyzwfDCC8YxYPWm+7ZYZZSs9RLTloc8e/9GkpctEYi76D1pbptcbGb//4R7qSnqGE9DbneHNj4/4Q/biD1FE1+u56MGOCdn+syxsRcEgWL8xwZoA= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 157587580126072.45447768055067; Sun, 8 Dec 2019 23:16:41 -0800 (PST) Received: from localhost ([::1]:36834 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ieDHb-0006Yj-U0 for importer@patchew.org; Mon, 09 Dec 2019 02:16:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44129) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ieDEJ-0002GM-8u for qemu-devel@nongnu.org; Mon, 09 Dec 2019 02:13:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ieDEH-0002lo-Oa for qemu-devel@nongnu.org; Mon, 09 Dec 2019 02:13:15 -0500 Received: from mga11.intel.com ([192.55.52.93]:5946) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ieDEH-0002aC-DG for qemu-devel@nongnu.org; Mon, 09 Dec 2019 02:13:13 -0500 Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Dec 2019 23:13:13 -0800 Received: from tao-optiplex-7060.sh.intel.com ([10.239.159.36]) by orsmga007.jf.intel.com with ESMTP; 08 Dec 2019 23:13:11 -0800 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,294,1571727600"; d="scan'208";a="202738844" From: Tao Xu To: ehabkost@redhat.com, pbonzini@redhat.com, rth@twiddle.net Subject: [PATCH v2 4/4] target/i386: Add notes for versioned CPU models Date: Mon, 9 Dec 2019 15:13:03 +0800 Message-Id: <20191209071303.24303-5-tao3.xu@intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191209071303.24303-1-tao3.xu@intel.com> References: <20191209071303.24303-1-tao3.xu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Add which features are added or removed in this version. Remove the changed model-id in versioned CPU models. Signed-off-by: Tao Xu --- Changes in v2: - correct the note of Cascadelake v3 (Xiaoyao) --- target/i386/cpu.c | 50 +++++++++++++++++++++++------------------------ 1 file changed, 25 insertions(+), 25 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7b3bd6d4db..4717862cee 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2281,10 +2281,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Nehalem-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Intel Core i7 9xx (Nehalem Core i7, IBRS update)" }, { /* end of list */ } } }, @@ -2362,10 +2361,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Westmere-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Westmere E56xx/L56xx/X56xx (IBRS update)" }, { /* end of list */ } } }, @@ -2448,10 +2446,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "SandyBridge-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Intel Xeon E312xx (Sandy Bridge, IBRS update)" }, { /* end of list */ } } }, @@ -2540,10 +2537,9 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "IvyBridge-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)" }, { /* end of list */ } } }, @@ -2637,17 +2633,18 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Haswell-noTSX", + .note =3D "no TSX", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, { "stepping", "1" }, - { "model-id", "Intel Core Processor (Haswell, no TSX)"= , }, { /* end of list */ } }, }, { .version =3D 3, .alias =3D "Haswell-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { /* Restore TSX features removed by -v2 above */ { "hle", "on" }, @@ -2658,21 +2655,18 @@ static X86CPUDefinition builtin_x86_defs[] =3D { */ { "stepping", "4" }, { "spec-ctrl", "on" }, - { "model-id", - "Intel Core Processor (Haswell, IBRS)" }, { /* end of list */ } } }, { .version =3D 4, .alias =3D "Haswell-noTSX-IBRS", + .note =3D "no TSX, IBRS", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, /* spec-ctrl was already enabled by -v3 above */ { "stepping", "1" }, - { "model-id", - "Intel Core Processor (Haswell, no TSX, IBRS)" }, { /* end of list */ } } }, @@ -2768,35 +2762,33 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Broadwell-noTSX", + .note =3D "no TSX", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, - { "model-id", "Intel Core Processor (Broadwell, no TSX= )", }, { /* end of list */ } }, }, { .version =3D 3, .alias =3D "Broadwell-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { /* Restore TSX features removed by -v2 above */ { "hle", "on" }, { "rtm", "on" }, { "spec-ctrl", "on" }, - { "model-id", - "Intel Core Processor (Broadwell, IBRS)" }, { /* end of list */ } } }, { .version =3D 4, .alias =3D "Broadwell-noTSX-IBRS", + .note =3D "no TSX, IBRS", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, /* spec-ctrl was already enabled by -v3 above */ - { "model-id", - "Intel Core Processor (Broadwell, no TSX, IBRS)" }, { /* end of list */ } } }, @@ -2896,17 +2888,17 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "IBRS", .alias =3D "Skylake-Client-IBRS", .props =3D (PropValue[]) { { "spec-ctrl", "on" }, - { "model-id", - "Intel Core Processor (Skylake, IBRS)" }, { /* end of list */ } } }, { .version =3D 3, .alias =3D "Skylake-Client-noTSX-IBRS", + .note =3D "no TSX, IBRS", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, @@ -3017,19 +3009,19 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "Skylake-Server-IBRS", + .note =3D "IBRS", .props =3D (PropValue[]) { /* clflushopt was not added to Skylake-Server-IBRS */ /* TODO: add -v3 including clflushopt */ { "clflushopt", "off" }, { "spec-ctrl", "on" }, - { "model-id", - "Intel Xeon Processor (Skylake, IBRS)" }, { /* end of list */ } } }, { .version =3D 3, .alias =3D "Skylake-Server-noTSX-IBRS", + .note =3D "no TSX, IBRS", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, @@ -3141,6 +3133,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .versions =3D (X86CPUVersionDefinition[]) { { .version =3D 1 }, { .version =3D 2, + .note =3D "ARCH_CAPABILITIES", .props =3D (PropValue[]) { { "arch-capabilities", "on" }, { "rdctl-no", "on" }, @@ -3152,6 +3145,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { }, { .version =3D 3, .alias =3D "Cascadelake-Server-noTSX", + .note =3D "ARCH_CAPABILITIES, no TSX", .props =3D (PropValue[]) { { "hle", "off" }, { "rtm", "off" }, @@ -3264,6 +3258,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no TSX", .alias =3D "Icelake-Client-noTSX", .props =3D (PropValue[]) { { "hle", "off" }, @@ -3381,6 +3376,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no TSX", .alias =3D "Icelake-Server-noTSX", .props =3D (PropValue[]) { { "hle", "off" }, @@ -3488,6 +3484,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no MPX, no MONITOR", .props =3D (PropValue[]) { { "monitor", "off" }, { "mpx", "off" }, @@ -3617,14 +3614,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no MPX", .props =3D (PropValue[]) { { "mpx", "off" }, - { "model-id", "Intel Atom Processor (Snowridge, no MPX= )" }, { /* end of list */ }, }, }, { .version =3D 3, + .note =3D "no MPX, no MONITOR", .props =3D (PropValue[]) { /* mpx was already removed by -v2 above */ { "monitor", "off" }, @@ -3746,6 +3744,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no MONITOR", .props =3D (PropValue[]) { { "monitor", "off" }, { /* end of list */ }, @@ -3870,15 +3869,15 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 2, .alias =3D "EPYC-IBPB", + .note =3D "IBPB", .props =3D (PropValue[]) { { "ibpb", "on" }, - { "model-id", - "AMD EPYC Processor (with IBPB)" }, { /* end of list */ } } }, { .version =3D 3, + .note =3D "IBPB, no MONITOR", .props =3D (PropValue[]) { /* ibpb was already enabled by -v2 above */ { "monitor", "off" }, @@ -3941,6 +3940,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { { .version =3D 1 }, { .version =3D 2, + .note =3D "no MONITOR", .props =3D (PropValue[]) { { "monitor", "off" }, { /* end of list */ }, --=20 2.20.1