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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id q22sm873695pfg.170.2019.12.02.18.30.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 02 Dec 2019 18:30:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=k0XWWezVOhFzaYm0qz5tHBxEXRK+lD5naHKLwWqhpHI=; b=aiqfWNARXyYW1/8OallmGR59GeT1kMy70QH+mVXvlf6z3mxGUsjV/0NFlv8LehWnGM 60PbnV+bpa23kpyBRPu1apbnhzVsCXluJZXGNE0mdLrI15gP8sJHW+AnECa1ZqfUnU4c kJYjotMwAruV4yacXRCnrnTDLQPj/TQunGi5yaeMwuf/EXleaIXN+SD7e4JgHZEPaTlF 6RK24uwym9UVLGXS2WIAnyb/Kc6vWCsk0ApMGA+a+vkYLBxm5ERzIfbD1jdhp6/POVat kcIwbGrfHV2ZUbI/Jao5JX0/bbvdqobwFvgRBkIJAvsDcwAFK4Yx2K85lW/iYll/wBg0 SjQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=k0XWWezVOhFzaYm0qz5tHBxEXRK+lD5naHKLwWqhpHI=; b=YM3M6hhjkl3XfzJRvCr/UUnD28LTdNDIuOvWWUidDBTtPiy//jsjZAazOjpblugQJL L7Nw/JQ3MU5BZuOG7HeLo08WsI2DtJ+Ey1nkOQGZ4ZTF5UjnbCeZA/dGNZnmRnbMmclo EJGF4PqAzPvJmo+AQ06YlTDc5nFzDdgIC82idQInovypbkhfSML91qU9scHYgBePXCo0 pcp4M4rC5yBGxAqiUmq1CbZQMhRzWJ4CKk6XRoXyCWJJvkEivZ0yM2N6en2+HAQKWyPD BIBHwJXfJ1iKhsYRpxELSl75k0FE8Kvt/Mbo3pW1bMzbvupSHBDSXAAV4e3jbY/eNTcW R9CA== X-Gm-Message-State: APjAAAWQyNY+XobMjnTsUoLbxey+MyqeNgmrN/un/iIEups/8ffXORMe fPx5gZOSoJE1RaPtV4lZVDNBDsmI+nQ= X-Google-Smtp-Source: APXvYqxe7OPYGL9jUAmy+H8UzhHfvbqMiUL2MZtjGC1DbPgBF/JOmSHDVWSZ9/F8AJSd3mVGaRBCCA== X-Received: by 2002:a17:902:43:: with SMTP id 61mr2772112pla.88.1575340227615; Mon, 02 Dec 2019 18:30:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 38/40] target/arm: Pass more cpu state to arm_excp_unmasked Date: Mon, 2 Dec 2019 18:29:35 -0800 Message-Id: <20191203022937.1474-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191203022937.1474-1-richard.henderson@linaro.org> References: <20191203022937.1474-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Avoid redundant computation of cpu state by passing it in from the caller, which has already computed it for itself. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/arm/cpu.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a36344d4c7..7a1177b883 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -411,14 +411,13 @@ static void arm_cpu_reset(CPUState *s) } =20 static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, - unsigned int target_el) + unsigned int target_el, + unsigned int cur_el, bool secure, + uint64_t hcr_el2) { CPUARMState *env =3D cs->env_ptr; - unsigned int cur_el =3D arm_current_el(env); - bool secure =3D arm_is_secure(env); bool pstate_unmasked; int8_t unmasked =3D 0; - uint64_t hcr_el2; =20 /* * Don't take exceptions if they target a lower EL. @@ -429,8 +428,6 @@ static inline bool arm_excp_unmasked(CPUState *cs, unsi= gned int excp_idx, return false; } =20 - hcr_el2 =3D arm_hcr_el2_eff(env); - switch (excp_idx) { case EXCP_FIQ: pstate_unmasked =3D !(env->daif & PSTATE_F); @@ -535,6 +532,7 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt= _request) CPUARMState *env =3D cs->env_ptr; uint32_t cur_el =3D arm_current_el(env); bool secure =3D arm_is_secure(env); + uint64_t hcr_el2 =3D arm_hcr_el2_eff(env); uint32_t target_el; uint32_t excp_idx; bool ret =3D false; @@ -542,7 +540,8 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt= _request) if (interrupt_request & CPU_INTERRUPT_FIQ) { excp_idx =3D EXCP_FIQ; target_el =3D arm_phys_excp_target_el(cs, excp_idx, cur_el, secure= ); - if (arm_excp_unmasked(cs, excp_idx, target_el)) { + if (arm_excp_unmasked(cs, excp_idx, target_el, + cur_el, secure, hcr_el2)) { cs->exception_index =3D excp_idx; env->exception.target_el =3D target_el; cc->do_interrupt(cs); @@ -552,7 +551,8 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt= _request) if (interrupt_request & CPU_INTERRUPT_HARD) { excp_idx =3D EXCP_IRQ; target_el =3D arm_phys_excp_target_el(cs, excp_idx, cur_el, secure= ); - if (arm_excp_unmasked(cs, excp_idx, target_el)) { + if (arm_excp_unmasked(cs, excp_idx, target_el, + cur_el, secure, hcr_el2)) { cs->exception_index =3D excp_idx; env->exception.target_el =3D target_el; cc->do_interrupt(cs); @@ -562,7 +562,8 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt= _request) if (interrupt_request & CPU_INTERRUPT_VIRQ) { excp_idx =3D EXCP_VIRQ; target_el =3D 1; - if (arm_excp_unmasked(cs, excp_idx, target_el)) { + if (arm_excp_unmasked(cs, excp_idx, target_el, + cur_el, secure, hcr_el2)) { cs->exception_index =3D excp_idx; env->exception.target_el =3D target_el; cc->do_interrupt(cs); @@ -572,7 +573,8 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt= _request) if (interrupt_request & CPU_INTERRUPT_VFIQ) { excp_idx =3D EXCP_VFIQ; target_el =3D 1; - if (arm_excp_unmasked(cs, excp_idx, target_el)) { + if (arm_excp_unmasked(cs, excp_idx, target_el, + cur_el, secure, hcr_el2)) { cs->exception_index =3D excp_idx; env->exception.target_el =3D target_el; cc->do_interrupt(cs); --=20 2.17.1