From nobody Sat Apr 27 00:53:16 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1575295530; cv=none; d=zohomail.com; s=zohoarc; b=ToaAiVNUwqJnew9wSYVfjXcD2hAtaS5DhCs2sfLGRU7PeDTGj0ynRxe1Wxm2SdrePcKytL18ZIm/qRB6m/h+5M41mrjlbQknuyOLAk7t9boqx8mo219Y8M8ts5N/NColxjryGxj1pNNsK+msTUdGkt/8+GyNcnRTyhV3dmcwYYQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1575295530; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=eGrx8fTs4ugvZC4EHKjRkbjZC7YTaZ6xXpVXibKmA1U=; b=GyvokLYHMKWDIWe9aSpZDz8BnOwPk1aeL3L1KwDZT7sFIQd/C3d0vtl26xsOLfVqqonZhR8FOSuKr2AzfF/Q3SP62Fm9tLHCPiOt2yn2NcSZ8FYVOjbW8VkFiCrQS1SI7xrniiteAM6SRZ5OaabSHWF5LhYRH8T9ENP1g4hZCpo= ARC-Authentication-Results: i=1; mx.zohomail.com; spf=pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1575295530312978.9535181419914; Mon, 2 Dec 2019 06:05:30 -0800 (PST) Received: from localhost ([::1]:36286 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ibmKP-0002ia-50 for importer@patchew.org; Mon, 02 Dec 2019 09:05:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34120) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ibmHA-0007PL-Om for qemu-devel@nongnu.org; Mon, 02 Dec 2019 09:02:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ibmH9-0005D4-GF for qemu-devel@nongnu.org; Mon, 02 Dec 2019 09:02:08 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:22400) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ibmH9-0005Bb-8Y for qemu-devel@nongnu.org; Mon, 02 Dec 2019 09:02:07 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xB2Dv8fU083809 for ; Mon, 2 Dec 2019 09:02:06 -0500 Received: from e06smtp07.uk.ibm.com (e06smtp07.uk.ibm.com [195.75.94.103]) by mx0a-001b2d01.pphosted.com with ESMTP id 2wknu9v6dv-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Mon, 02 Dec 2019 09:02:06 -0500 Received: from localhost by e06smtp07.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 2 Dec 2019 14:02:00 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id xB2E1wOp61210794 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 2 Dec 2019 14:01:58 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8E8314C059; Mon, 2 Dec 2019 14:01:58 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4AB9F4C044; Mon, 2 Dec 2019 14:01:57 +0000 (GMT) Received: from localhost.localdomain (unknown [9.145.35.210]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Mon, 2 Dec 2019 14:01:57 +0000 (GMT) From: Janosch Frank To: qemu-devel@nongnu.org Subject: [PATCH v2 3/3] s390x: Fix cpu normal reset ri clearing Date: Mon, 2 Dec 2019 09:01:46 -0500 X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191202140146.3910-1-frankja@linux.ibm.com> References: <20191202140146.3910-1-frankja@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 x-cbid: 19120214-0028-0000-0000-000003C36D10 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19120214-0029-0000-0000-0000248682CC Message-Id: <20191202140146.3910-4-frankja@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-12-02_02:2019-11-29,2019-12-02 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 bulkscore=0 adultscore=0 mlxlogscore=999 phishscore=0 spamscore=0 lowpriorityscore=0 impostorscore=0 suspectscore=1 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1912020127 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, david@redhat.com, cohuck@redhat.com, borntraeger@de.ibm.com, qemu-s390x@nongnu.org, mihajlov@linux.ibm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" As it turns out we need to clear the ri controls and PSW enablement bit to be architecture compliant. Signed-off-by: Janosch Frank Reviewed-by: Christian Borntraeger --- target/s390x/cpu.c | 5 +++++ target/s390x/cpu.h | 7 ++++++- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 906285888e..c192e6b3b9 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -131,6 +131,11 @@ static void s390_cpu_reset(CPUState *s, cpu_reset_type= type) &env->fpu_status); /* fall through */ case S390_CPU_RESET_NORMAL: + env->psw.mask &=3D ~PSW_MASK_RI; + memset(&env->start_normal_reset_fields, 0, + offsetof(CPUS390XState, end_reset_fields) - + offsetof(CPUS390XState, start_normal_reset_fields)); + env->pfault_token =3D -1UL; env->bpbc =3D false; break; diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index d5e18b096e..7f5fa1d35b 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -58,7 +58,6 @@ struct CPUS390XState { */ uint64_t vregs[32][2] QEMU_ALIGNED(16); /* vector registers */ uint32_t aregs[16]; /* access registers */ - uint8_t riccb[64]; /* runtime instrumentation control */ uint64_t gscb[4]; /* guarded storage control */ uint64_t etoken; /* etoken */ uint64_t etoken_extension; /* etoken extension */ @@ -114,6 +113,10 @@ struct CPUS390XState { uint64_t gbea; uint64_t pp; =20 + /* Fields up to this point are not cleared by normal CPU reset */ + struct {} start_normal_reset_fields; + uint8_t riccb[64]; /* runtime instrumentation control */ + /* Fields up to this point are cleared by a CPU reset */ struct {} end_reset_fields; =20 @@ -252,6 +255,7 @@ extern const VMStateDescription vmstate_s390_cpu; #undef PSW_SHIFT_ASC #undef PSW_MASK_CC #undef PSW_MASK_PM +#undef PSW_MASK_RI #undef PSW_SHIFT_MASK_PM #undef PSW_MASK_64 #undef PSW_MASK_32 @@ -274,6 +278,7 @@ extern const VMStateDescription vmstate_s390_cpu; #define PSW_MASK_CC 0x0000300000000000ULL #define PSW_MASK_PM 0x00000F0000000000ULL #define PSW_SHIFT_MASK_PM 40 +#define PSW_MASK_RI 0x0000008000000000ULL #define PSW_MASK_64 0x0000000100000000ULL #define PSW_MASK_32 0x0000000080000000ULL #define PSW_MASK_ESA_ADDR 0x000000007fffffffULL --=20 2.20.1