From nobody Wed Nov 12 20:48:19 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1573475836; cv=none; d=zoho.com; s=zohoarc; b=iCT17obxt5tSNcIzY99SNOmjiqwCBYdd2tGK/KTAirYUS7MhK6zXcXsVg0OC4h5HExjKgI7rIxHki+atfciUyvJ+tzfYFK97SdgA2QBCs9A8oFzj8GuOLGPkVbcyCaBf7wIsUSKJVnB+rT6evLJUnIA0myWmKjVApaAXkvbuwf4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1573475836; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LHjOpQzlQIMN3WidJiocCpyFbbuKZPbuE14d1T03WVo=; b=aXS3x4leic0oLVxzunujMsXYzooMH+zHmy3+f52pT0pysZpj/SmIRsfDTyiV4bGfPjdW1kbzD5nMy7MYeYNJeiz/pPyN3opX36k/H+5ifVaNaO9Vjn0NQon6NDuB55Y7AYGO5EDxZMilAGDQe6+IR+SMatUIcbifBjo6r6HbVEU= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1573475836192763.3399806922755; Mon, 11 Nov 2019 04:37:16 -0800 (PST) Received: from localhost ([::1]:51904 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iU8wU-00045U-UT for importer@patchew.org; Mon, 11 Nov 2019 07:37:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36956) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iU8lk-0007hA-RP for qemu-devel@nongnu.org; Mon, 11 Nov 2019 07:26:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iU8lf-0003Qp-Iz for qemu-devel@nongnu.org; Mon, 11 Nov 2019 07:26:08 -0500 Received: from charlie.dont.surf ([128.199.63.193]:52158) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iU8lc-0003Nf-IF; Mon, 11 Nov 2019 07:26:00 -0500 Received: from apples.localdomain (unknown [194.62.217.57]) by charlie.dont.surf (Postfix) with ESMTPSA id 9CD64BF80B; Mon, 11 Nov 2019 12:25:58 +0000 (UTC) From: Klaus Jensen To: qemu-block@nongnu.org Subject: [PATCH v3 05/21] nvme: allow completion queues in the cmb Date: Mon, 11 Nov 2019 13:25:29 +0100 Message-Id: <20191111122545.252478-6-its@irrelevant.dk> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191111122545.252478-1-its@irrelevant.dk> References: <20191111122545.252478-1-its@irrelevant.dk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 128.199.63.193 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Javier Gonzalez , qemu-devel@nongnu.org, Max Reitz , Ross Lagerwall , Paul Durrant , Keith Busch , Stephen Bates Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Allow completion queues in the controller memory buffer. This also inlines the nvme_addr_{read,write} functions and adds an nvme_addr_is_cmb helper. Signed-off-by: Klaus Jensen --- hw/block/nvme.c | 38 +++++++++++++++++++++++++++++--------- 1 file changed, 29 insertions(+), 9 deletions(-) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 16f0fba10b08..daa2367b0863 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -52,14 +52,34 @@ =20 static void nvme_process_sq(void *opaque); =20 -static void nvme_addr_read(NvmeCtrl *n, hwaddr addr, void *buf, int size) +static inline bool nvme_addr_is_cmb(NvmeCtrl *n, hwaddr addr) { - if (n->cmbsz && addr >=3D n->ctrl_mem.addr && - addr < (n->ctrl_mem.addr + int128_get64(n->ctrl_mem.size))= ) { - memcpy(buf, (void *)&n->cmbuf[addr - n->ctrl_mem.addr], size); - } else { - pci_dma_read(&n->parent_obj, addr, buf, size); + hwaddr low =3D n->ctrl_mem.addr; + hwaddr hi =3D n->ctrl_mem.addr + int128_get64(n->ctrl_mem.size); + + return addr >=3D low && addr < hi; +} + +static inline void nvme_addr_read(NvmeCtrl *n, hwaddr addr, void *buf, + int size) +{ + if (n->cmbsz && nvme_addr_is_cmb(n, addr)) { + memcpy(buf, (void *) &n->cmbuf[addr - n->ctrl_mem.addr], size); + return; } + + pci_dma_read(&n->parent_obj, addr, buf, size); +} + +static inline void nvme_addr_write(NvmeCtrl *n, hwaddr addr, void *buf, + int size) +{ + if (n->cmbsz && nvme_addr_is_cmb(n, addr)) { + memcpy((void *) &n->cmbuf[addr - n->ctrl_mem.addr], buf, size); + return; + } + + pci_dma_write(&n->parent_obj, addr, buf, size); } =20 static int nvme_check_sqid(NvmeCtrl *n, uint16_t sqid) @@ -281,6 +301,7 @@ static void nvme_post_cqes(void *opaque) =20 QTAILQ_FOREACH_SAFE(req, &cq->req_list, entry, next) { NvmeSQueue *sq; + NvmeCqe *cqe =3D &req->cqe; hwaddr addr; =20 if (nvme_cq_full(cq)) { @@ -294,8 +315,7 @@ static void nvme_post_cqes(void *opaque) req->cqe.sq_head =3D cpu_to_le16(sq->head); addr =3D cq->dma_addr + cq->tail * n->cqe_size; nvme_inc_cq_tail(cq); - pci_dma_write(&n->parent_obj, addr, (void *)&req->cqe, - sizeof(req->cqe)); + nvme_addr_write(n, addr, (void *) cqe, sizeof(*cqe)); QTAILQ_INSERT_TAIL(&sq->req_list, req, entry); } if (cq->tail !=3D cq->head) { @@ -1401,7 +1421,7 @@ static void nvme_realize(PCIDevice *pci_dev, Error **= errp) NVME_CMBLOC_SET_OFST(n->bar.cmbloc, 0); =20 NVME_CMBSZ_SET_SQS(n->bar.cmbsz, 1); - NVME_CMBSZ_SET_CQS(n->bar.cmbsz, 0); + NVME_CMBSZ_SET_CQS(n->bar.cmbsz, 1); NVME_CMBSZ_SET_LISTS(n->bar.cmbsz, 0); NVME_CMBSZ_SET_RDS(n->bar.cmbsz, 1); NVME_CMBSZ_SET_WDS(n->bar.cmbsz, 1); --=20 2.24.0