From nobody Tue Feb 10 06:08:08 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1571754449; cv=none; d=zoho.com; s=zohoarc; b=eF37VSxvrben4J8sbU8oaXQ8yy7S9pUqAxN2wnmq9fErX2GzCkh/WZO+h2A2loZf65ayXcKd9YdP9L0H+sEVOJK7NMwEJSfDT+m3GIw+xi+KFECtWNQ8CmZxvvrsJX8J7a+AMAVu7fgK9Vi6K/C9L4y32ELXMaEEGPbT0DT4x68= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571754449; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=APbJHtp1oV1r8HLRkcQAlcyuNH8KYhQWE2V+8H+/Xic=; b=YA1ZUfdNcn1G88UbDjhsaPNuhM0ndf/gjKpfWTltp/E5yn9Hz8wazBTaxN/0WoUWiOn6LMifPNDj6uzM0Dz6dt5YNGLxkmCLRPLTByZ4O4gFNyVM/sgaTQODHKRGivoIVOFBu54Hlq/5PWDEaLF7K22K6tdZRzr+t/RHGFQ+fKo= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571754449542258.93383849848476; Tue, 22 Oct 2019 07:27:29 -0700 (PDT) Received: from localhost ([::1]:59036 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iMv8C-0002qG-5f for importer@patchew.org; Tue, 22 Oct 2019 10:27:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39414) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iMuRc-00088S-39 for qemu-devel@nongnu.org; Tue, 22 Oct 2019 09:43:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iMuRa-0005rt-Rr for qemu-devel@nongnu.org; Tue, 22 Oct 2019 09:43:27 -0400 Received: from 16.mo7.mail-out.ovh.net ([46.105.72.216]:36404) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iMuRa-0005rK-LR for qemu-devel@nongnu.org; Tue, 22 Oct 2019 09:43:26 -0400 Received: from player761.ha.ovh.net (unknown [10.109.143.223]) by mo7.mail-out.ovh.net (Postfix) with ESMTP id 11A26136091 for ; Tue, 22 Oct 2019 15:43:24 +0200 (CEST) Received: from kaod.org (deibp9eh1--blueice1n4.emea.ibm.com [195.212.29.166]) (Authenticated sender: clg@kaod.org) by player761.ha.ovh.net (Postfix) with ESMTPSA id 2C3EAB4760B5; Tue, 22 Oct 2019 13:43:15 +0000 (UTC) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Subject: [PATCH v4 2/6] ppc/pnv: Introduce a PnvCore reset handler Date: Tue, 22 Oct 2019 15:42:50 +0200 Message-Id: <20191022134254.28692-3-clg@kaod.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191022134254.28692-1-clg@kaod.org> References: <20191022134254.28692-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 539306055943293926 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedufedrkeejgdeijecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.72.216 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" in which individual CPUs are reset. It will ease the introduction of future change reseting the interrupt presenter from the CPU reset handler. Signed-off-by: C=C3=A9dric Le Goater --- hw/ppc/pnv_core.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index b1a7489e7abf..9f981a4940e6 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -40,9 +40,8 @@ static const char *pnv_core_cpu_typename(PnvCore *pc) return cpu_type; } =20 -static void pnv_cpu_reset(void *opaque) +static void pnv_core_cpu_reset(PowerPCCPU *cpu) { - PowerPCCPU *cpu =3D opaque; CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; =20 @@ -192,8 +191,17 @@ static void pnv_realize_vcpu(PowerPCCPU *cpu, PnvChip = *chip, Error **errp) =20 /* Set time-base frequency to 512 MHz */ cpu_ppc_tb_init(env, PNV_TIMEBASE_FREQ); +} + +static void pnv_core_reset(void *dev) +{ + CPUCore *cc =3D CPU_CORE(dev); + PnvCore *pc =3D PNV_CORE(dev); + int i; =20 - qemu_register_reset(pnv_cpu_reset, cpu); + for (i =3D 0; i < cc->nr_threads; i++) { + pnv_core_cpu_reset(pc->threads[i]); + } } =20 static void pnv_core_realize(DeviceState *dev, Error **errp) @@ -244,6 +252,8 @@ static void pnv_core_realize(DeviceState *dev, Error **= errp) snprintf(name, sizeof(name), "xscom-core.%d", cc->core_id); pnv_xscom_region_init(&pc->xscom_regs, OBJECT(dev), pcc->xscom_ops, pc, name, PNV_XSCOM_EX_SIZE); + + qemu_register_reset(pnv_core_reset, pc); return; =20 err: @@ -259,7 +269,6 @@ static void pnv_unrealize_vcpu(PowerPCCPU *cpu) { PnvCPUState *pnv_cpu =3D pnv_cpu_state(cpu); =20 - qemu_unregister_reset(pnv_cpu_reset, cpu); object_unparent(OBJECT(pnv_cpu_state(cpu)->intc)); cpu_remove_sync(CPU(cpu)); cpu->machine_data =3D NULL; @@ -273,6 +282,8 @@ static void pnv_core_unrealize(DeviceState *dev, Error = **errp) CPUCore *cc =3D CPU_CORE(dev); int i; =20 + qemu_unregister_reset(pnv_core_reset, pc); + for (i =3D 0; i < cc->nr_threads; i++) { pnv_unrealize_vcpu(pc->threads[i]); } --=20 2.21.0