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[109.65.50.254]) by smtp.gmail.com with ESMTPSA id q66sm16951271wme.39.2019.10.21.15.37.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Oct 2019 15:37:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Uuc4CXhLnYu2+mnmkWjlJdepUILpKRdWETfK1zQgNwY=; b=IU65+22WtgWnIU7dFSzSVKYZiK18iTSEpyFbyXdceF21afQ+ElIzSlw0oNv2Qch7s5 tRyP+iIJgAbU6xBv8Nb8KMyjJbvMsIhpACiWhBghH62i0Yf3IB4eKItNhT8hm+15B28A d8Q8K5pDubO2ouFRygxJRHlVBOJAhFSytNYazDN/+uZ7oYYnQ/VYRW0uw/kkPJUWErNe EcuTSan5B3tC+JeNuLkW2EJoLUUL5p9LSxz4EKd6NeamPRqTDxigcakA+/HBY5/9vKZL aF/wG5EW9kVxzdhqizPThVyqXF6x2O2rt5SoN5urBhoI8tN4vfOIK7iUbpwicmhdYIQF NcmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Uuc4CXhLnYu2+mnmkWjlJdepUILpKRdWETfK1zQgNwY=; b=mgAEZCiMwRVb7rLdUtx5gnVPUEy83ITS3UKjrqElEofGoND094NN++vMBxREEbGbxO jzCRKvrVhV/uUNftXhSBvP3lQ8+7zdQN5U2P8dXCW0TwKHMSyE4J1tpMKBVYONSF3cp8 MgTF2Lg30IscSo3aLWt9mCPah9nNt2JmJuaTlG8fQgVGhZqum2zL0eacGP+et0N3KuRP HdqPqZd9iRN5C5AS9SDWjIXYkPvn746fw0uXNJwJESpVM/f1JrpM27z511SaUMK211nJ tOOBDr+GGuH63S9HRRCCzGKvpKBLbKcHeOt8DQSRs4YGtcfVS/UC5JqnlWryhWl7XkZK aedg== X-Gm-Message-State: APjAAAVuhXEnIbddIvRk9hIOCVaTV2RPjT3eXRRG40LPzHxAob2Y7t7r iY8x0oZv5iuHbYuBWhvn1s7NePHFA1el/w== X-Google-Smtp-Source: APXvYqyIeX7GDvoQVDUsalCStFfQx1ZQbmv0IgqNIr4QIn4fHsnOU5bCkC25yo4XKcgEv1WzB2ny/g== X-Received: by 2002:adf:e28f:: with SMTP id v15mr463897wri.130.1571697476241; Mon, 21 Oct 2019 15:37:56 -0700 (PDT) From: Michael Rolnik To: qemu-devel@nongnu.org Subject: [PATCH v33 12/13] target/avr: Register AVR support with the rest of QEMU, the build system, and the WMAINTAINERS file Date: Tue, 22 Oct 2019 01:37:10 +0300 Message-Id: <20191021223711.66955-13-mrolnik@gmail.com> X-Mailer: git-send-email 2.17.2 (Apple Git-113) In-Reply-To: <20191021223711.66955-1-mrolnik@gmail.com> References: <20191021223711.66955-1-mrolnik@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: thuth@redhat.com, Michael Rolnik , richard.henderson@linaro.org, dovgaluk@ispras.ru, imammedo@redhat.com, philmd@redhat.com, aleksandar.m.mail@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Michael Rolnik --- MAINTAINERS | 9 +++++++++ arch_init.c | 2 ++ configure | 7 +++++++ default-configs/avr-softmmu.mak | 5 +++++ include/disas/dis-asm.h | 6 ++++++ include/sysemu/arch_init.h | 1 + qapi/machine.json | 3 ++- target/avr/Makefile.objs | 33 +++++++++++++++++++++++++++++++++ tests/machine-none-test.c | 1 + 9 files changed, 66 insertions(+), 1 deletion(-) create mode 100644 default-configs/avr-softmmu.mak create mode 100644 target/avr/Makefile.objs diff --git a/MAINTAINERS b/MAINTAINERS index 250ce8e7a1..bb0a3dc05e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -163,6 +163,15 @@ S: Maintained F: hw/arm/smmu* F: include/hw/arm/smmu* =20 +AVR TCG CPUs +M: Michael Rolnik +S: Maintained +F: target/avr/ +F: hw/misc/avr_mask.c +F: hw/char/avr_usart.c +F: hw/timer/avr_timer16.c +F: hw/avr/ + CRIS TCG CPUs M: Edgar E. Iglesias S: Maintained diff --git a/arch_init.c b/arch_init.c index 0a1531124c..fb308aa802 100644 --- a/arch_init.c +++ b/arch_init.c @@ -85,6 +85,8 @@ int graphic_depth =3D 32; #define QEMU_ARCH QEMU_ARCH_UNICORE32 #elif defined(TARGET_XTENSA) #define QEMU_ARCH QEMU_ARCH_XTENSA +#elif defined(TARGET_AVR) +#define QEMU_ARCH QEMU_ARCH_AVR #endif =20 const uint32_t arch_type =3D QEMU_ARCH; diff --git a/configure b/configure index 145fcabbb3..b2a5ad4225 100755 --- a/configure +++ b/configure @@ -7457,6 +7457,10 @@ case "$target_name" in mttcg=3D"yes" gdb_xml_files=3D"aarch64-core.xml aarch64-fpu.xml arm-core.xml arm-vfp= .xml arm-vfp3.xml arm-neon.xml" ;; + avr) + gdb_xml_files=3D"avr-cpu.xml" + target_compiler=3D$cross_cc_avr + ;; cris) ;; hppa) @@ -7676,6 +7680,9 @@ for i in $ARCH $TARGET_BASE_ARCH ; do disas_config "ARM_A64" fi ;; + avr) + disas_config "AVR" + ;; cris) disas_config "CRIS" ;; diff --git a/default-configs/avr-softmmu.mak b/default-configs/avr-softmmu.= mak new file mode 100644 index 0000000000..d1e1c28118 --- /dev/null +++ b/default-configs/avr-softmmu.mak @@ -0,0 +1,5 @@ +# Default configuration for avr-softmmu + +# Boards: +# +CONFIG_AVR_SAMPLE=3Dy diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h index e9c7dd8eb4..8bedce17ac 100644 --- a/include/disas/dis-asm.h +++ b/include/disas/dis-asm.h @@ -211,6 +211,12 @@ enum bfd_architecture #define bfd_mach_m32r 0 /* backwards compatibility */ bfd_arch_mn10200, /* Matsushita MN10200 */ bfd_arch_mn10300, /* Matsushita MN10300 */ + bfd_arch_avr, /* Atmel AVR microcontrollers. */ +#define bfd_mach_avr1 1 +#define bfd_mach_avr2 2 +#define bfd_mach_avr3 3 +#define bfd_mach_avr4 4 +#define bfd_mach_avr5 5 bfd_arch_cris, /* Axis CRIS */ #define bfd_mach_cris_v0_v10 255 #define bfd_mach_cris_v32 32 diff --git a/include/sysemu/arch_init.h b/include/sysemu/arch_init.h index 62c6fe4cf1..893df26ce2 100644 --- a/include/sysemu/arch_init.h +++ b/include/sysemu/arch_init.h @@ -24,6 +24,7 @@ enum { QEMU_ARCH_NIOS2 =3D (1 << 17), QEMU_ARCH_HPPA =3D (1 << 18), QEMU_ARCH_RISCV =3D (1 << 19), + QEMU_ARCH_AVR =3D (1 << 20), }; =20 extern const uint32_t arch_type; diff --git a/qapi/machine.json b/qapi/machine.json index ca26779f1a..1fa2917ba9 100644 --- a/qapi/machine.json +++ b/qapi/machine.json @@ -21,11 +21,12 @@ # is true even for "qemu-system-x86_64". # # ppcemb: dropped in 3.1 +# avr: since 4.2 # # Since: 3.0 ## { 'enum' : 'SysEmuTarget', - 'data' : [ 'aarch64', 'alpha', 'arm', 'cris', 'hppa', 'i386', 'lm32', + 'data' : [ 'aarch64', 'alpha', 'arm', 'avr', 'cris', 'hppa', 'i386', 'lm= 32', 'm68k', 'microblaze', 'microblazeel', 'mips', 'mips64', 'mips64el', 'mipsel', 'moxie', 'nios2', 'or1k', 'ppc', 'ppc64', 'riscv32', 'riscv64', 's390x', 'sh4', diff --git a/target/avr/Makefile.objs b/target/avr/Makefile.objs new file mode 100644 index 0000000000..2976affd95 --- /dev/null +++ b/target/avr/Makefile.objs @@ -0,0 +1,33 @@ +# +# QEMU AVR CPU +# +# Copyright (c) 2019 Michael Rolnik +# +# This library is free software; you can redistribute it and/or +# modify it under the terms of the GNU Lesser General Public +# License as published by the Free Software Foundation; either +# version 2.1 of the License, or (at your option) any later version. +# +# This library is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +# Lesser General Public License for more details. +# +# You should have received a copy of the GNU Lesser General Public +# License along with this library; if not, see +# +# + +DECODETREE =3D $(SRC_PATH)/scripts/decodetree.py +decode-y =3D $(SRC_PATH)/target/avr/insn.decode + +target/avr/decode_insn.inc.c: $(decode-y) $(DECODETREE) + $(call quiet-command, \ + $(PYTHON) $(DECODETREE) -o $@ --decode decode_insn --insnwidth 16 $<, \ + "GEN", $(TARGET_DIR)$@) + +target/avr/translate.o: target/avr/decode_insn.inc.c + +obj-y +=3D translate.o cpu.o helper.o +obj-y +=3D gdbstub.o +obj-$(CONFIG_SOFTMMU) +=3D machine.o diff --git a/tests/machine-none-test.c b/tests/machine-none-test.c index 5953d31755..3e5c74e73e 100644 --- a/tests/machine-none-test.c +++ b/tests/machine-none-test.c @@ -27,6 +27,7 @@ static struct arch2cpu cpus_map[] =3D { /* tested targets list */ { "arm", "cortex-a15" }, { "aarch64", "cortex-a57" }, + { "avr", "avr6-avr-cpu" }, { "x86_64", "qemu64,apic-id=3D0" }, { "i386", "qemu32,apic-id=3D0" }, { "alpha", "ev67" }, --=20 2.17.2 (Apple Git-113)