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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id d20sm7857534pfq.88.2019.10.18.10.44.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2019 10:44:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v4LDoKiCDj8UEOXKdxGeWLogI6gqriKirwE9ruJcfe0=; b=pWIoIHOzUUgQIGhlSzHdOdcPTYTWLBK97r2ZWl9k015vOd2yzVVP+iljAdQzhj4WBj el2sVOFN3Gxe2v1gpdI7NJrlWBsEvCZuegNIlLif6TVPt70MZpkCtOsYmv4mAl7Il+hV xZFZyk4eP5/ytJB6oC1coEAbB1yMSBYqOoX+Pb8Ck9Q7tzvc9xIalZtyB2eolkQq/XzB ZAWsZMOdGojYoCjCNRBoj4KEPRRBmuo7qQyCej+Ka6usaFP0NC4vUVqjWYtNKfGRmfLK iEGsBErXfpg6lrZzzTftIiNkSSRf8M2kmwSxILqxBPlDXBQee/aggExOmwN2Wuo2a1aY 9eAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v4LDoKiCDj8UEOXKdxGeWLogI6gqriKirwE9ruJcfe0=; b=EbV8N4XRdnQs9w60Eja+BC+g6DSihvDSf+LWDmYcPoEVewPC7eyfCxl5fn5624k60S 0BAI76JBqtU6PQeVUvsJzMfc+bYy1ucDIznWDvwB0jaqPx5kSPWkj/8aRricaXNxKkPb 3O/0b3aHtoXLbiF4WmHi8DQMR3vQNSciwj/H+TiCQVWQSx2soAs+QxmKXf/RUtDqcR2t jFoXVfdMC+tc0qESU61uGLsZNQCNQAqJ8vWYw8B1SwtgAcOEmgv9NSv9luB1BnHuPYHE 7rhMO1p9UimC7OZTVniBSUjXkRTE9k0ACsz9Hu74CJH27GmPGFeJ/MkoKvF0NFkKeSsa SQOQ== X-Gm-Message-State: APjAAAVAYVPQonJS7NduviscQtTGGwWycqM7Som9eZrzrNN6FZz6BFnt 89veoCD7dc+KgHRdxUGPy/PafAwCqAM= X-Google-Smtp-Source: APXvYqylbdzzZzn2VCWxl4WoOB9V4Pt26whNtCeqdGiQFyJypjkj3Ld9hAQ8eNIFhW+ZlrjujThUbA== X-Received: by 2002:aa7:908b:: with SMTP id i11mr8245647pfa.186.1571420684462; Fri, 18 Oct 2019 10:44:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v8 10/22] target/arm: Simplify set of PSTATE_SS in cpu_get_tb_cpu_state Date: Fri, 18 Oct 2019 10:44:19 -0700 Message-Id: <20191018174431.1784-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191018174431.1784-1-richard.henderson@linaro.org> References: <20191018174431.1784-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Hoist the variable load for PSTATE into the existing test vs is_a64. Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson --- target/arm/helper.c | 20 ++++++++------------ 1 file changed, 8 insertions(+), 12 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index e2a62cf19a..398e5f5d6d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11197,7 +11197,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_= ulong *pc, ARMMMUIdx mmu_idx =3D arm_mmu_idx(env); int current_el =3D arm_current_el(env); int fp_el =3D fp_exception_el(env, current_el); - uint32_t flags; + uint32_t flags, pstate_for_ss; =20 if (is_a64(env)) { *pc =3D env->pc; @@ -11205,6 +11205,7 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_= ulong *pc, if (cpu_isar_feature(aa64_bti, env_archcpu(env))) { flags =3D FIELD_DP32(flags, TBFLAG_A64, BTYPE, env->btype); } + pstate_for_ss =3D env->pstate; } else { *pc =3D env->regs[15]; =20 @@ -11257,9 +11258,11 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target= _ulong *pc, || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) { flags =3D FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1); } + pstate_for_ss =3D env->uncached_cpsr; } =20 - /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine + /* + * The SS_ACTIVE and PSTATE_SS bits correspond to the state machine * states defined in the ARM ARM for software singlestep: * SS_ACTIVE PSTATE.SS State * 0 x Inactive (the TB flag for SS is always 0) @@ -11267,16 +11270,9 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target= _ulong *pc, * 1 1 Active-not-pending * SS_ACTIVE is set in hflags; PSTATE_SS is computed every TB. */ - if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE)) { - if (is_a64(env)) { - if (env->pstate & PSTATE_SS) { - flags =3D FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1); - } - } else { - if (env->uncached_cpsr & PSTATE_SS) { - flags =3D FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1); - } - } + if (FIELD_EX32(flags, TBFLAG_ANY, SS_ACTIVE) && + (pstate_for_ss & PSTATE_SS)) { + flags =3D FIELD_DP32(flags, TBFLAG_ANY, PSTATE_SS, 1); } =20 *pflags =3D flags; --=20 2.17.1