From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571411988614100.5405592858649; Fri, 18 Oct 2019 08:19:48 -0700 (PDT) Received: from localhost ([::1]:41690 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLU2d-0006FB-Ep for importer@patchew.org; Fri, 18 Oct 2019 11:19:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39080) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrB-0006ja-H7 for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTr9-0000Gx-BO for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:07:57 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38600) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTr4-0000BT-HH; Fri, 18 Oct 2019 11:07:51 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 93BE896EF2; Fri, 18 Oct 2019 15:07:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411268; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=F3irESova0bUtEk9PvcjAtIyHLFR7jmj2YEFSdzJCuI=; b=AoHcAZZpD35kzi2KBmSMSq7XJZ7QRjBvIW8GdzVsHpcLRE+BleKeR80ctIEk1sCc8ZYi/1 9HDHQ92uU0EBd92HZELPQtJHpftZamMHHc3PH3JnFocEAzKnJDkinYfUFCu/aKhvq1PUPy WFD78i7FsKOjs0Ka6KoAU2mzgpjYyTI= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 01/13] add device_legacy_reset function to prepare for reset api change Date: Fri, 18 Oct 2019 17:06:18 +0200 Message-Id: <20191018150630.31099-2-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411269; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=F3irESova0bUtEk9PvcjAtIyHLFR7jmj2YEFSdzJCuI=; b=5EnMI3oM7x47REZV03POC4shCIk+3S1YEm94O1OoxEMlqpBwdJyzRxr7faIq5gIJ7smW5c yo031uGF3gFAFJxikIWU/BNQk7hOYsZLEcNW5V97nwxrtOfnlb4vgUWSFVcX5pMW+T4gnf uQz7JjgamRxNdGuG1TDW40TpnZzWtPw= ARC-Seal: i=1; s=mail; d=greensocs.com; t=1571411269; a=rsa-sha256; cv=none; b=Y5pVPzuBJ5NQOXxAuYo0Ahb07aH940P48NZhNym0Kf+J+k5i0Gt9y4OCut+LkyFoTarnH1 WDmRcesSzP9U7lNfSFbv1lqFHMdlsqwuSMP2Yk8VN3nY3sw+KDd8r+HXQ8mCRskkJ8XYVr WYS0Go8EB0Fjvnw63jq2ABaY1dvCQlw= ARC-Authentication-Results: i=1; beetle.greensocs.com; none Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 5.135.226.135 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , peter.maydell@linaro.org, Collin Walling , Dmitry Fleytman , "Michael S. Tsirkin" , Gerd Hoffmann , David Hildenbrand , Halil Pasic , Christian Borntraeger , david@gibson.dropbear.id.au, philmd@redhat.com, ehabkost@redhat.com, qemu-s390x@nongnu.org, qemu-arm@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , John Snow , Richard Henderson , Damien Hedde , berrange@redhat.com, cohuck@redhat.com, mark.burton@greensocs.com, edgari@xilinx.com, pbonzini@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Provide a temporary device_legacy_reset function doing what device_reset does to prepare for the transition with Resettable API. All occurrence of device_reset in the code tree are also replaced by device_legacy_reset. The new resettable API has different prototype and semantics (resetting child buses as well as the specified device). Subsequent commits will make the changeover for each call site individually; once that is complete device_legacy_reset() will be removed. Signed-off-by: Damien Hedde Reviewed-by: Peter Maydell Acked-by: David Gibson Acked-by: Cornelia Huck Reviewed-by: Richard Henderson --- Cc: Gerd Hoffmann Cc: Paolo Bonzini Cc: "Daniel P. Berrang=C3=A9" Cc: Eduardo Habkost Cc: Richard Henderson Cc: "Michael S. Tsirkin" Cc: Marcel Apfelbaum Cc: John Snow Cc: "C=C3=A9dric Le Goater" Cc: Collin Walling Cc: Cornelia Huck Cc: David Hildenbrand Cc: Halil Pasic Cc: Christian Borntraeger Cc: Dmitry Fleytman Cc: Fam Zheng --- hw/audio/intel-hda.c | 2 +- hw/core/qdev.c | 6 +++--- hw/hyperv/hyperv.c | 2 +- hw/i386/pc.c | 2 +- hw/ide/microdrive.c | 8 ++++---- hw/intc/spapr_xive.c | 2 +- hw/ppc/pnv_psi.c | 2 +- hw/ppc/spapr_pci.c | 2 +- hw/ppc/spapr_vio.c | 2 +- hw/s390x/s390-pci-inst.c | 2 +- hw/scsi/vmw_pvscsi.c | 2 +- hw/sd/omap_mmc.c | 2 +- hw/sd/pl181.c | 2 +- include/hw/qdev-core.h | 4 ++-- 14 files changed, 20 insertions(+), 20 deletions(-) diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c index 6ecd383540..27b71c57cf 100644 --- a/hw/audio/intel-hda.c +++ b/hw/audio/intel-hda.c @@ -1087,7 +1087,7 @@ static void intel_hda_reset(DeviceState *dev) QTAILQ_FOREACH(kid, &d->codecs.qbus.children, sibling) { DeviceState *qdev =3D kid->child; cdev =3D HDA_CODEC_DEVICE(qdev); - device_reset(DEVICE(cdev)); + device_legacy_reset(DEVICE(cdev)); d->state_sts |=3D (1 << cdev->cad); } intel_hda_update_irq(d); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index cbad6c1d55..60be2f2fef 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -274,7 +274,7 @@ HotplugHandler *qdev_get_hotplug_handler(DeviceState *d= ev) =20 static int qdev_reset_one(DeviceState *dev, void *opaque) { - device_reset(dev); + device_legacy_reset(dev); =20 return 0; } @@ -882,7 +882,7 @@ static void device_set_realized(Object *obj, bool value= , Error **errp) } } if (dev->hotplugged) { - device_reset(dev); + device_legacy_reset(dev); } dev->pending_deleted_event =3D false; =20 @@ -1104,7 +1104,7 @@ void device_class_set_parent_unrealize(DeviceClass *d= c, dc->unrealize =3D dev_unrealize; } =20 -void device_reset(DeviceState *dev) +void device_legacy_reset(DeviceState *dev) { DeviceClass *klass =3D DEVICE_GET_CLASS(dev); =20 diff --git a/hw/hyperv/hyperv.c b/hw/hyperv/hyperv.c index 6ebf31c310..cd9db3cb5c 100644 --- a/hw/hyperv/hyperv.c +++ b/hw/hyperv/hyperv.c @@ -140,7 +140,7 @@ void hyperv_synic_reset(CPUState *cs) SynICState *synic =3D get_synic(cs); =20 if (synic) { - device_reset(DEVICE(synic)); + device_legacy_reset(DEVICE(synic)); } } =20 diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 4b1904237e..50e64078e1 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2668,7 +2668,7 @@ static void pc_machine_reset(MachineState *machine) cpu =3D X86_CPU(cs); =20 if (cpu->apic_state) { - device_reset(cpu->apic_state); + device_legacy_reset(cpu->apic_state); } } } diff --git a/hw/ide/microdrive.c b/hw/ide/microdrive.c index b0272ea14b..6b30e36ed8 100644 --- a/hw/ide/microdrive.c +++ b/hw/ide/microdrive.c @@ -173,7 +173,7 @@ static void md_attr_write(PCMCIACardState *card, uint32= _t at, uint8_t value) case 0x00: /* Configuration Option Register */ s->opt =3D value & 0xcf; if (value & OPT_SRESET) { - device_reset(DEVICE(s)); + device_legacy_reset(DEVICE(s)); } md_interrupt_update(s); break; @@ -316,7 +316,7 @@ static void md_common_write(PCMCIACardState *card, uint= 32_t at, uint16_t value) case 0xe: /* Device Control */ s->ctrl =3D value; if (value & CTRL_SRST) { - device_reset(DEVICE(s)); + device_legacy_reset(DEVICE(s)); } md_interrupt_update(s); break; @@ -541,7 +541,7 @@ static int dscm1xxxx_attach(PCMCIACardState *card) md->attr_base =3D pcc->cis[0x74] | (pcc->cis[0x76] << 8); md->io_base =3D 0x0; =20 - device_reset(DEVICE(md)); + device_legacy_reset(DEVICE(md)); md_interrupt_update(md); =20 return 0; @@ -551,7 +551,7 @@ static int dscm1xxxx_detach(PCMCIACardState *card) { MicroDriveState *md =3D MICRODRIVE(card); =20 - device_reset(DEVICE(md)); + device_legacy_reset(DEVICE(md)); return 0; } =20 diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 04879abf2e..170e87c7aa 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -1510,7 +1510,7 @@ static target_ulong h_int_reset(PowerPCCPU *cpu, return H_PARAMETER; } =20 - device_reset(DEVICE(xive)); + device_legacy_reset(DEVICE(xive)); =20 if (kvm_irqchip_in_kernel()) { Error *local_err =3D NULL; diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index a997f16bb4..9d65784a52 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -705,7 +705,7 @@ static void pnv_psi_p9_mmio_write(void *opaque, hwaddr = addr, break; case PSIHB9_INTERRUPT_CONTROL: if (val & PSIHB9_IRQ_RESET) { - device_reset(DEVICE(&psi9->source)); + device_legacy_reset(DEVICE(&psi9->source)); } psi->regs[reg] =3D val; break; diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 01ff41d4c4..c1fe60b218 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -2014,7 +2014,7 @@ static int spapr_phb_children_reset(Object *child, vo= id *opaque) DeviceState *dev =3D (DeviceState *) object_dynamic_cast(child, TYPE_D= EVICE); =20 if (dev) { - device_reset(dev); + device_legacy_reset(dev); } =20 return 0; diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 554de9930d..f14944e900 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -304,7 +304,7 @@ int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *cr= q) static void spapr_vio_quiesce_one(SpaprVioDevice *dev) { if (dev->tcet) { - device_reset(DEVICE(dev->tcet)); + device_legacy_reset(DEVICE(dev->tcet)); } free_crq(dev); } diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 92c7e45df5..2f7a7d7bd1 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -243,7 +243,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_= t ra) stw_p(&ressetpci->hdr.rsp, CLP_RC_SETPCIFN_FHOP); goto out; } - device_reset(DEVICE(pbdev)); + device_legacy_reset(DEVICE(pbdev)); pbdev->fh &=3D ~FH_MASK_ENABLE; pbdev->state =3D ZPCI_FS_DISABLED; stl_p(&ressetpci->fh, pbdev->fh); diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index 452a3b63b2..7baab1532f 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -838,7 +838,7 @@ pvscsi_on_cmd_reset_device(PVSCSIState *s) =20 if (sdev !=3D NULL) { s->resetting++; - device_reset(&sdev->qdev); + device_legacy_reset(&sdev->qdev); s->resetting--; return PVSCSI_COMMAND_PROCESSING_SUCCEEDED; } diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c index c6e516b611..4088a8a80b 100644 --- a/hw/sd/omap_mmc.c +++ b/hw/sd/omap_mmc.c @@ -318,7 +318,7 @@ void omap_mmc_reset(struct omap_mmc_s *host) * into any bus, and we must reset it manually. When omap_mmc is * QOMified this must move into the QOM reset function. */ - device_reset(DEVICE(host->card)); + device_legacy_reset(DEVICE(host->card)); } =20 static uint64_t omap_mmc_read(void *opaque, hwaddr offset, diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c index 8033fe455d..2b3776a6a0 100644 --- a/hw/sd/pl181.c +++ b/hw/sd/pl181.c @@ -482,7 +482,7 @@ static void pl181_reset(DeviceState *d) /* Since we're still using the legacy SD API the card is not plugged * into any bus, and we must reset it manually. */ - device_reset(DEVICE(s->card)); + device_legacy_reset(DEVICE(s->card)); } =20 static void pl181_init(Object *obj) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index aa123f88cb..01963984f8 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -407,11 +407,11 @@ char *qdev_get_own_fw_dev_path_from_handler(BusState = *bus, DeviceState *dev); void qdev_machine_init(void); =20 /** - * @device_reset + * device_legacy_reset: * * Reset a single device (by calling the reset method). */ -void device_reset(DeviceState *dev); +void device_legacy_reset(DeviceState *dev); =20 void device_class_set_parent_reset(DeviceClass *dc, DeviceReset dev_reset, --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571411541215813.3307214243428; Fri, 18 Oct 2019 08:12:21 -0700 (PDT) Received: from localhost ([::1]:41610 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTvL-000122-7B for importer@patchew.org; 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bh=Zfp9zlChmuFK1Pa2AVwC8e4Fq2eoeBhB8UD5of7fOMs=; b=PBwy97xzkwO5a+WE8Uw44NrivQqmB6ffNzafEeuQfl8sehIeNzjrBr/GYcI+vFLhTATFFt l2WdumD/scex6A/CLEelHaClHtbN5ZPYPvkb4uNtqHWdrsk62RhpZsO5f03l9Qy7E7IuLW v1lDjra5z0hJWGKNRYlgJDxzKaMoZwU= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 02/13] hw/core/qdev: add trace events to help with resettable transition Date: Fri, 18 Oct 2019 17:06:19 +0200 Message-Id: <20191018150630.31099-3-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411270; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Zfp9zlChmuFK1Pa2AVwC8e4Fq2eoeBhB8UD5of7fOMs=; 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charset="utf-8" Adds trace events to reset procedure and when updating the parent bus of a device. Signed-off-by: Damien Hedde Reviewed-by: Cornelia Huck Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- hw/core/qdev.c | 27 ++++++++++++++++++++++++--- hw/core/trace-events | 9 +++++++++ 2 files changed, 33 insertions(+), 3 deletions(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 60be2f2fef..f230063189 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -38,6 +38,7 @@ #include "hw/boards.h" #include "hw/sysbus.h" #include "migration/vmstate.h" +#include "trace.h" =20 bool qdev_hotplug =3D false; static bool qdev_hot_added =3D false; @@ -98,7 +99,9 @@ void qdev_set_parent_bus(DeviceState *dev, BusState *bus) bool replugging =3D dev->parent_bus !=3D NULL; =20 if (replugging) { - /* Keep a reference to the device while it's not plugged into + trace_qdev_update_parent_bus(dev, dev->parent_bus, bus); + /* + * Keep a reference to the device while it's not plugged into * any bus, to avoid it potentially evaporating when it is * dereffed in bus_remove_child(). */ @@ -272,6 +275,18 @@ HotplugHandler *qdev_get_hotplug_handler(DeviceState *= dev) return hotplug_ctrl; } =20 +static int qdev_prereset(DeviceState *dev, void *opaque) +{ + trace_qdev_reset_tree(dev, object_get_typename(OBJECT(dev))); + return 0; +} + +static int qbus_prereset(BusState *bus, void *opaque) +{ + trace_qbus_reset_tree(bus, object_get_typename(OBJECT(bus))); + return 0; +} + static int qdev_reset_one(DeviceState *dev, void *opaque) { device_legacy_reset(dev); @@ -282,6 +297,7 @@ static int qdev_reset_one(DeviceState *dev, void *opaqu= e) static int qbus_reset_one(BusState *bus, void *opaque) { BusClass *bc =3D BUS_GET_CLASS(bus); + trace_qbus_reset(bus, object_get_typename(OBJECT(bus))); if (bc->reset) { bc->reset(bus); } @@ -290,7 +306,9 @@ static int qbus_reset_one(BusState *bus, void *opaque) =20 void qdev_reset_all(DeviceState *dev) { - qdev_walk_children(dev, NULL, NULL, qdev_reset_one, qbus_reset_one, NU= LL); + trace_qdev_reset_all(dev, object_get_typename(OBJECT(dev))); + qdev_walk_children(dev, qdev_prereset, qbus_prereset, + qdev_reset_one, qbus_reset_one, NULL); } =20 void qdev_reset_all_fn(void *opaque) @@ -300,7 +318,9 @@ void qdev_reset_all_fn(void *opaque) =20 void qbus_reset_all(BusState *bus) { - qbus_walk_children(bus, NULL, NULL, qdev_reset_one, qbus_reset_one, NU= LL); + trace_qbus_reset_all(bus, object_get_typename(OBJECT(bus))); + qbus_walk_children(bus, qdev_prereset, qbus_prereset, + qdev_reset_one, qbus_reset_one, NULL); } =20 void qbus_reset_all_fn(void *opaque) @@ -1108,6 +1128,7 @@ void device_legacy_reset(DeviceState *dev) { DeviceClass *klass =3D DEVICE_GET_CLASS(dev); =20 + trace_qdev_reset(dev, object_get_typename(OBJECT(dev))); if (klass->reset) { klass->reset(dev); } diff --git a/hw/core/trace-events b/hw/core/trace-events index fe47a9c8cb..1a669be0ea 100644 --- a/hw/core/trace-events +++ b/hw/core/trace-events @@ -1,2 +1,11 @@ # loader.c loader_write_rom(const char *name, uint64_t gpa, uint64_t size, bool isrom= ) "%s: @0x%"PRIx64" size=3D0x%"PRIx64" ROM=3D%d" + +# qdev.c +qdev_reset(void *obj, const char *objtype) "obj=3D%p(%s)" +qdev_reset_all(void *obj, const char *objtype) "obj=3D%p(%s)" +qdev_reset_tree(void *obj, const char *objtype) "obj=3D%p(%s)" +qbus_reset(void *obj, const char *objtype) "obj=3D%p(%s)" +qbus_reset_all(void *obj, const char *objtype) "obj=3D%p(%s)" +qbus_reset_tree(void *obj, const char *objtype) "obj=3D%p(%s)" +qdev_update_parent_bus(void *obj, void *oldp, void *newp) "obj=3D%p old_pa= rent=3D%p new_parent=3D%p" --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 18 Oct 2019 11:08:01 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38650) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTr5-0000C0-Ol; Fri, 18 Oct 2019 11:07:52 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 3E49696F51; Fri, 18 Oct 2019 15:07:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411270; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=pwhi/uzgewkp6apuMSLyeKjVzFR+jEBviLDTLa1uf+k=; b=gP0uOnw+b+b//355dm54WLDWApORagBpctJuyAhC6G+O/bfbxIaeqvqt+w4XZynEYlbZ63 kT/zreo3VBXCPio60Zz5WSrlwZYT2VHvBfHNEoYYPlUzRXIKizd0r7v38WPTgojoXpEEOe En3SM64Jt9iiUkcjjLvUCsjWw9LLodA= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 03/13] hw/core: create Resettable QOM interface Date: Fri, 18 Oct 2019 17:06:20 +0200 Message-Id: <20191018150630.31099-4-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; 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charset="utf-8" This commit defines an interface allowing multi-phase reset. This aims to solve a problem of the actual single-phase reset (built in DeviceClass and BusClass): reset behavior is dependent on the order in which reset handlers are called. In particular doing external side-effect (like setting an qemu_irq) is problematic because receiving object may not be reset yet. The Resettable interface divides the reset in 3 well defined phases. To reset an object tree, all 1st phases are executed then all 2nd then all 3rd. See the comments in include/hw/resettable.h for a more complete description. The interface defines 3 phases to let the future possibility of holding an object into reset for some time. The qdev/qbus reset in DeviceClass and BusClass will be modified in following commits to use this interface. A mechanism is provided to allow executing a transitional reset handler in place of the 2nd phase which is executed in children-then-parent order inside a tree. This will allow to transition devices and buses smoothly while keeping the exact current qdev/qbus reset behavior for now. Documentation will be added in a following commit. Signed-off-by: Damien Hedde --- In this patch only a single reset type is supported, but the interface allows for more to be defined. I had some thought about problems which may arise when having multiple reset types: - reset type propagation. Right now we propagate the same reset type to the children. I don't think it will work that with multiple types. For example, if we add pci_bus_reset type: a pci device will implement the reset type but not its children (they may have nothing to do with pci). This can be solved by changing the child_foreach method rules. We should say that child_foreach may change the type it propagates to its children (on a children by children basis). For example, the pci device may just propagate cold reset type to its children. For this we need to pass the type as parameter to child_foreach() method. - are all children concerned ? For a given reset type, some child may not need to be reset. As above we can handle that with child_foreach: an resettable object can propagate the reset only to a partial set of its child. For this we need to know the type when we release the reset, that's why I added it to resettable_release_reset() even if it is unused right now. I've also added an opaque parameter to child_foreach. I think we will need that to handle the change of parent because we will need to test if a child is concerned by a reset type: the opaque will allow to use a test callback and get some result. - several reset types at the same time. I don't another solution than saying we execute *enter* and *hold* phase for every reset type. *exit* will still be executed once for all at the end. It will be up for each object to cope with it if it handle multiple reset types. For *enter* is trivial, calling it twice in a row is no problem given that it should only reset internal state. For *hold* there may be some complication. - Obviously we will need to at least an interface class field to hold the supported reset types by the class. Also the reset state will need some modification. --- Makefile.objs | 1 + hw/core/Makefile.objs | 1 + hw/core/resettable.c | 230 ++++++++++++++++++++++++++++++++++++++++ hw/core/trace-events | 17 +++ include/hw/resettable.h | 199 ++++++++++++++++++++++++++++++++++ 5 files changed, 448 insertions(+) create mode 100644 hw/core/resettable.c create mode 100644 include/hw/resettable.h diff --git a/Makefile.objs b/Makefile.objs index abcbd89654..9c3fc37e29 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -191,6 +191,7 @@ trace-events-subdirs +=3D migration trace-events-subdirs +=3D net trace-events-subdirs +=3D ui endif +trace-events-subdirs +=3D hw/core trace-events-subdirs +=3D hw/display trace-events-subdirs +=3D qapi trace-events-subdirs +=3D qom diff --git a/hw/core/Makefile.objs b/hw/core/Makefile.objs index fd0550d1d9..18f5ddebce 100644 --- a/hw/core/Makefile.objs +++ b/hw/core/Makefile.objs @@ -1,6 +1,7 @@ # core qdev-related obj files, also used by *-user: common-obj-y +=3D qdev.o qdev-properties.o common-obj-y +=3D bus.o reset.o +common-obj-y +=3D resettable.o common-obj-$(CONFIG_SOFTMMU) +=3D qdev-fw.o common-obj-$(CONFIG_SOFTMMU) +=3D fw-path-provider.o # irq.o needed for qdev GPIO handling: diff --git a/hw/core/resettable.c b/hw/core/resettable.c new file mode 100644 index 0000000000..c5e11cff4f --- /dev/null +++ b/hw/core/resettable.c @@ -0,0 +1,230 @@ +/* + * Resettable interface. + * + * Copyright (c) 2019 GreenSocs SAS + * + * Authors: + * Damien Hedde + * + * This work is licensed under the terms of the GNU GPL, version 2 or late= r. + * See the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "qemu/module.h" +#include "hw/resettable.h" +#include "trace.h" + +/** + * resettable_phase_enter/hold/exit: + * Function executing a phase recursively in a resettable object and its + * children. + */ +static void resettable_phase_enter(Object *obj, void *opaque, ResetType ty= pe); +static void resettable_phase_hold(Object *obj, void *opaque, ResetType typ= e); +static void resettable_phase_exit(Object *obj, void *opaque, ResetType typ= e); + +/** + * enter_phase_in_progress: + * Flag telling whether we are currently in an enter phase where side + * effects are forbidden. This flag allows us to catch if reset is called + * again during during this phase. + */ +static bool enter_phase_in_progress; + +void resettable_reset(Object *obj, ResetType type) +{ + trace_resettable_reset(obj, type); + resettable_assert_reset(obj, type); + resettable_release_reset(obj, type); +} + +void resettable_assert_reset(Object *obj, ResetType type) +{ + assert(!enter_phase_in_progress); + /* TODO: change that assert when adding support for other reset types = */ + assert(type =3D=3D RESET_TYPE_COLD); + trace_resettable_reset_assert_begin(obj, type); + enter_phase_in_progress =3D true; + resettable_phase_enter(obj, NULL, type); + enter_phase_in_progress =3D false; + resettable_phase_hold(obj, NULL, type); + trace_resettable_reset_assert_end(obj); +} + +void resettable_release_reset(Object *obj, ResetType type) +{ + assert(!enter_phase_in_progress); + /* TODO: change that assert when adding support for other reset types = */ + assert(type =3D=3D RESET_TYPE_COLD); + trace_resettable_reset_release_begin(obj, type); + resettable_phase_exit(obj, NULL, type); + trace_resettable_reset_release_end(obj); +} + +bool resettable_is_in_reset(Object *obj) +{ + ResettableClass *rc =3D RESETTABLE_GET_CLASS(obj); + ResettableState *s =3D rc->get_state(obj); + + return (s->count > 0); +} + +/** + * resettable_child_foreach: + * helper to avoid checking the existence of the method. + */ +static void resettable_child_foreach(ResettableClass *rc, Object *obj, + ResettableChildCallback cb, + void *opaque, ResetType type) +{ + if (rc->child_foreach) { + rc->child_foreach(obj, cb, opaque, type); + } +} + +/** + * resettable_get_tr_func: + * helper to fetch transitional reset callback if any. + */ +static ResettableTrFunction resettable_get_tr_func(ResettableClass *rc, + Object *obj) +{ + ResettableTrFunction tr_func =3D NULL; + if (rc->get_transitional_function) { + tr_func =3D rc->get_transitional_function(obj); + } + return tr_func; +} + +static void resettable_phase_enter(Object *obj, void *opaque, ResetType ty= pe) +{ + ResettableClass *rc =3D RESETTABLE_GET_CLASS(obj); + ResettableState *s =3D rc->get_state(obj); + const char *obj_typename =3D object_get_typename(obj); + bool action_needed =3D false; + + /* exit phase has to finish properly before entering back in reset */ + assert(!s->exit_phase_in_progress); + + trace_resettable_phase_enter_begin(obj, obj_typename, s->count, type); + + /* Only take action if we really enter reset for the 1st time. */ + /* + * TODO: if adding more ResetType support, some additional checks + * are probably needed here. + */ + if (s->count++ =3D=3D 0) { + action_needed =3D true; + } + /* + * We limit the count to an arbitrary "big" value. The value is big + * enough not to be triggered nominally. + * The assert will stop an infinite loop if there is a cycle in the + * reset tree. The loop goes through resettable_foreach_child below + * which at some point will call us again. + */ + assert(s->count <=3D 50); + + /* + * handle the children even if action_needed is at false so that + * children counts are incremented too + */ + resettable_child_foreach(rc, obj, resettable_phase_enter, NULL, type); + + /* execute enter phase for the object if needed */ + if (action_needed) { + trace_resettable_phase_enter_exec(obj, obj_typename, type, + !!rc->phases.enter); + if (rc->phases.enter && !resettable_get_tr_func(rc, obj)) { + rc->phases.enter(obj, type); + } + s->hold_phase_pending =3D true; + } + trace_resettable_phase_enter_end(obj, obj_typename, s->count); +} + +static void resettable_phase_hold(Object *obj, void *opaque, ResetType typ= e) +{ + ResettableClass *rc =3D RESETTABLE_GET_CLASS(obj); + ResettableState *s =3D rc->get_state(obj); + const char *obj_typename =3D object_get_typename(obj); + + /* exit phase has to finish properly before entering back in reset */ + assert(!s->exit_phase_in_progress); + + trace_resettable_phase_hold_begin(obj, obj_typename, s->count, type); + + /* handle children first */ + resettable_child_foreach(rc, obj, resettable_phase_hold, NULL, type); + + /* exec hold phase */ + if (s->hold_phase_pending) { + s->hold_phase_pending =3D false; + ResettableTrFunction tr_func =3D resettable_get_tr_func(rc, obj); + trace_resettable_phase_hold_exec(obj, obj_typename, !!rc->phases.h= old); + if (tr_func) { + trace_resettable_transitional_function(obj, obj_typename); + tr_func(obj); + } else if (rc->phases.hold) { + rc->phases.hold(obj); + } + } + trace_resettable_phase_hold_end(obj, obj_typename, s->count); +} + +static void resettable_phase_exit(Object *obj, void *opaque, ResetType typ= e) +{ + ResettableClass *rc =3D RESETTABLE_GET_CLASS(obj); + ResettableState *s =3D rc->get_state(obj); + const char *obj_typename =3D object_get_typename(obj); + + assert(!s->exit_phase_in_progress); + trace_resettable_phase_exit_begin(obj, obj_typename, s->count, type); + + /* exit_phase_in_progress ensure this phase is 'atomic' */ + s->exit_phase_in_progress =3D true; + resettable_child_foreach(rc, obj, resettable_phase_exit, NULL, type); + + assert(s->count > 0); + if (s->count =3D=3D 1) { + trace_resettable_phase_exit_exec(obj, obj_typename, !!rc->phases.e= xit); + if (rc->phases.exit && !resettable_get_tr_func(rc, obj)) { + rc->phases.exit(obj); + } + s->count =3D 0; + } + s->exit_phase_in_progress =3D false; + trace_resettable_phase_exit_end(obj, obj_typename, s->count); +} + +void resettable_class_set_parent_phases(ResettableClass *rc, + ResettableEnterPhase enter, + ResettableHoldPhase hold, + ResettableExitPhase exit, + ResettablePhases *parent_phases) +{ + *parent_phases =3D rc->phases; + if (enter) { + rc->phases.enter =3D enter; + } + if (hold) { + rc->phases.hold =3D hold; + } + if (exit) { + rc->phases.exit =3D exit; + } +} + +static const TypeInfo resettable_interface_info =3D { + .name =3D TYPE_RESETTABLE_INTERFACE, + .parent =3D TYPE_INTERFACE, + .class_size =3D sizeof(ResettableClass), +}; + +static void reset_register_types(void) +{ + type_register_static(&resettable_interface_info); +} + +type_init(reset_register_types) diff --git a/hw/core/trace-events b/hw/core/trace-events index 1a669be0ea..66081d0fb4 100644 --- a/hw/core/trace-events +++ b/hw/core/trace-events @@ -9,3 +9,20 @@ qbus_reset(void *obj, const char *objtype) "obj=3D%p(%s)" qbus_reset_all(void *obj, const char *objtype) "obj=3D%p(%s)" qbus_reset_tree(void *obj, const char *objtype) "obj=3D%p(%s)" qdev_update_parent_bus(void *obj, void *oldp, void *newp) "obj=3D%p old_pa= rent=3D%p new_parent=3D%p" + +# resettable.c +resettable_reset(void *obj, int cold) "obj=3D%p cold=3D%d" +resettable_reset_assert_begin(void *obj, int cold) "obj=3D%p cold=3D%d" +resettable_reset_assert_end(void *obj) "obj=3D%p" +resettable_reset_release_begin(void *obj, int cold) "obj=3D%p cold=3D%d" +resettable_reset_release_end(void *obj) "obj=3D%p" +resettable_phase_enter_begin(void *obj, const char *objtype, uint32_t coun= t, int type) "obj=3D%p(%s) count=3D%" PRIu32 " type=3D%d" +resettable_phase_enter_exec(void *obj, const char *objtype, int type, int = has_method) "obj=3D%p(%s) type=3D%d method=3D%d" +resettable_phase_enter_end(void *obj, const char *objtype, uint32_t count)= "obj=3D%p(%s) count=3D%" PRIu32 +resettable_phase_hold_begin(void *obj, const char *objtype, uint32_t count= , int type) "obj=3D%p(%s) count=3D%" PRIu32 " type=3D%d" +resettable_phase_hold_exec(void *obj, const char *objtype, int has_method)= "obj=3D%p(%s) method=3D%d" +resettable_phase_hold_end(void *obj, const char *objtype, uint32_t count) = "obj=3D%p(%s) count=3D%" PRIu32 +resettable_phase_exit_begin(void *obj, const char *objtype, uint32_t count= , int type) "obj=3D%p(%s) count=3D%" PRIu32 " type=3D%d" +resettable_phase_exit_exec(void *obj, const char *objtype, int has_method)= "obj=3D%p(%s) method=3D%d" +resettable_phase_exit_end(void *obj, const char *objtype, uint32_t count) = "obj=3D%p(%s) count=3D%" PRIu32 +resettable_transitional_function(void *obj, const char *objtype) "obj=3D%p= (%s)" diff --git a/include/hw/resettable.h b/include/hw/resettable.h new file mode 100644 index 0000000000..6b24e1633b --- /dev/null +++ b/include/hw/resettable.h @@ -0,0 +1,199 @@ +#ifndef HW_RESETTABLE_H +#define HW_RESETTABLE_H + +#include "qom/object.h" + +#define TYPE_RESETTABLE_INTERFACE "resettable" + +#define RESETTABLE_CLASS(class) \ + OBJECT_CLASS_CHECK(ResettableClass, (class), TYPE_RESETTABLE_INTERFACE) + +#define RESETTABLE_GET_CLASS(obj) \ + OBJECT_GET_CLASS(ResettableClass, (obj), TYPE_RESETTABLE_INTERFACE) + +typedef struct ResettableState ResettableState; + +/** + * ResetType: + * Types of reset. + * + * + Cold: reset resulting from a power cycle of the object. + * + * TODO: Support has to be added to handle more types. In particular, + * ResettableState structure needs to be expanded. + */ +typedef enum ResetType { + RESET_TYPE_COLD, +} ResetType; + +/* + * ResettableClass: + * Interface for resettable objects. + * + * See docs/devel/reset.rst for more detailed information about + * how QEMU models reset. + * + * All objects which can be reset must implement this interface; + * it is usually provided by a base class such as DeviceClass or BusClass. + * Every Resettable object must maintain some state tracking the + * progress of a reset operation by providing a ResettableState structure. + * The functions defined in this module take care of updating the + * state of the reset. + * The base class implementation of the interface provides this + * state and implements the associated method: get_state. + * + * Concrete object implementations (typically specific devices + * such as a UART model) should provide the functions + * for the phases.enter, phases.hold and phases.exit methods, which + * they can set in their class init function, either directly or + * by calling resettable_class_set_parent_phases(). + * The phase methods are guaranteed to only only ever be called once + * for any reset event, in the order 'enter', 'hold', 'exit'. + * An object will always move quickly from 'enter' to 'hold' + * but might remain in 'hold' for an arbitrary period of time + * before eventually reset is deasserted and the 'exit' phase is called. + * Object implementations should be prepared for functions handling + * inbound connections from other devices (such as qemu_irq handler + * functions) to be called at any point during reset after their + * 'enter' method has been called. + * + * Users of a resettable object should not call these methods + * directly, but instead use the function resettable_reset(). + * + * @phases.enter: This phase is called when the object enters reset. It + * should reset local state of the object, but it must not do anything that + * has a side-effect on other objects, such as raising or lowering a qemu_= irq + * line or reading or writing guest memory. It takes the reset's type as + * argument. + * + * @phases.hold: This phase is called for entry into reset, once every obj= ect + * in the system which is being reset has had its @phases.enter method cal= led. + * At this point devices can do actions that affect other objects. + * + * @phases.exit: This phase is called when the object leaves the reset sta= te. + * Actions affecting other objects are permitted. + * + * @get_state: Mandatory method which must return a pointer to a + * ResettableState. + * + * @get_transitional_function: transitional method to handle Resettable ob= jects + * not yet fully moved to this interface. It will be removed as soon as is= not + * needed anymore. This method is optional and may return a pointer to a + * function to be used instead of the phases. In case the method exists and + * returns a non-NULL function pointer; it is executed as a replacement of= the + * 'hold' phase method taking the object as argument. The two other phase + * methods are not executed. + * + * @child_foreach: Executes a given callback on every Resettable child. Ch= ild + * in this context means a child in the qbus tree, so the children of a qb= us + * are the devices on it, and the children of a device are all the buses it + * owns. This is not the same as the QOM object hierarchy. The function ta= kes + * additional opaque and ResetType arguments which must be passed unmodifi= ed to + * the callback. + */ +typedef void (*ResettableEnterPhase)(Object *obj, ResetType type); +typedef void (*ResettableHoldPhase)(Object *obj); +typedef void (*ResettableExitPhase)(Object *obj); +typedef ResettableState * (*ResettableGetState)(Object *obj); +typedef void (*ResettableTrFunction)(Object *obj); +typedef ResettableTrFunction (*ResettableGetTrFunction)(Object *obj); +typedef void (*ResettableChildCallback)(Object *, void *opaque, + ResetType type); +typedef void (*ResettableChildForeach)(Object *obj, + ResettableChildCallback cb, + void *opaque, ResetType type); +typedef struct ResettableClass { + InterfaceClass parent_class; + + /* Phase methods */ + struct ResettablePhases { + ResettableEnterPhase enter; + ResettableHoldPhase hold; + ResettableExitPhase exit; + } phases; + + /* State access method */ + ResettableGetState get_state; + + /* Transitional method for legacy reset compatibility */ + ResettableGetTrFunction get_transitional_function; + + /* Hiearchy handling method */ + ResettableChildForeach child_foreach; +} ResettableClass; +typedef struct ResettablePhases ResettablePhases; + +/** + * ResettableState: + * Structure holding reset related state. The fields should not be accessed + * directly, the definition is here to allow further inclusion into other + * objects. + * + * @count: Number of reset level the object is into. It is incremented when + * the reset operation starts and decremented when it finishes. + * @hold_phase_pending: flag which indicates that we need to invoke the 'h= old' + * phase handler for this object. + * @exit_phase_in_progress: flag telling if currently in exit phase + */ +struct ResettableState { + uint32_t count; + bool hold_phase_pending; + bool exit_phase_in_progress; +}; + +/** + * resettable_reset: + * Trigger a reset on a object @obj of type @type. @obj must implement + * Resettable interface. + * + * Calling this function is equivalent to calling @resettable_assert_reset= () + * then @resettable_release_reset(). + */ +void resettable_reset(Object *obj, ResetType type); + +/** + * resettable_assert_reset: + * Put an object @obj into reset. @obj must implement Resettable interface. + * + * @resettable_release_reset() must eventually be called after this call. + * There must be one call to @resettable_release_reset() per call of + * @resettable_assert_reset(), with the same type argument. + * + * NOTE: Until support for migration is added, the @resettable_release_res= et() + * must not be delayed. It have to occur just after @resettable_assert_res= et() + * so that migration cannot be triggered in between. Prefer using + * @resettable_reset() for now. + */ +void resettable_assert_reset(Object *obj, ResetType type); + +/** + * resettable_release_reset: + * Release the object @obj from reset. @obj must implement Resettable inte= rface. + * + * See @resettable_assert_reset() description for details. + */ +void resettable_release_reset(Object *obj, ResetType type); + +/** + * resettable_is_in_reset: + * Return true if @obj is under reset. + * + * @obj must implement Resettable interface. + */ +bool resettable_is_in_reset(Object *obj); + +/** + * resettable_class_set_parent_phases: + * + * Save @rc current reset phases into @parent_phases and override @rc phas= es + * by the given new methods (@enter, @hold and @exit). + * Each phase is overridden only if the new one is not NULL allowing to + * override a subset of phases. + */ +void resettable_class_set_parent_phases(ResettableClass *rc, + ResettableEnterPhase enter, + ResettableHoldPhase hold, + ResettableExitPhase exit, + ResettablePhases *parent_phases); + +#endif --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571412249807498.8218485603926; Fri, 18 Oct 2019 08:24:09 -0700 (PDT) Received: from localhost ([::1]:41730 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLU6q-0001rL-45 for importer@patchew.org; Fri, 18 Oct 2019 11:24:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39174) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrE-0006mx-7B for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrC-0000Iv-2g for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:00 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38668) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTr6-0000CX-Dg; Fri, 18 Oct 2019 11:07:52 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id E71D596F52; Fri, 18 Oct 2019 15:07:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411271; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DrJX7O1hycYGcVhsAI3l8UAbeaCqX5CMwVucNEK0BOg=; b=OztOSSu1S3c7vtDE3sUiJzx7+0f48/wWSvIhoqdOKRuvOmqfxNHMpmNuKCQ8PYWXo0bYcW eJynRO9uyZ1Ea41qvkrVB35JIKp0nBsqTu9ZmgVUI4+odDDA5k9P96Ohje5ElcqER7ErII YiM5xxxFsktIf5HzqRwKv0rk/t69nGU= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 04/13] hw/core: add Resettable support to BusClass and DeviceClass Date: Fri, 18 Oct 2019 17:06:21 +0200 Message-Id: <20191018150630.31099-5-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; 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charset="utf-8" This commit adds support of Resettable interface to buses and devices: + ResettableState structure is added in the Bus/Device state + Resettable methods are implemented. + device/bus_is_in_reset function defined This commit allows to transition the objects to the new multi-phase interface without changing the reset behavior at all. Object single reset method can be split into the 3 different phases but the 3 phases are still executed in a row for a given object. From the qdev/qbus reset api point of view, nothing is changed. qdev_reset_all() and qbus_reset_all() are not modified as well as device_legacy_reset(). Transition of an object must be done from mother class to daughter classes. Care has been taken to allow the transition of a mother class without requiring the daughter classes to be transitioned at the same time. Note that SysBus and SysBusDevice class do not need any transition because they do not override the legacy reset method. Signed-off-by: Damien Hedde Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/core/bus.c | 97 ++++++++++++++++++++++++++++++++++++++++++ hw/core/qdev.c | 97 ++++++++++++++++++++++++++++++++++++++++++ include/hw/qdev-core.h | 27 ++++++++++++ tests/Makefile.include | 1 + 4 files changed, 222 insertions(+) diff --git a/hw/core/bus.c b/hw/core/bus.c index 7f3d2a3dbd..7c05e80db8 100644 --- a/hw/core/bus.c +++ b/hw/core/bus.c @@ -68,6 +68,28 @@ int qbus_walk_children(BusState *bus, return 0; } =20 +bool bus_is_in_reset(BusState *bus) +{ + return resettable_is_in_reset(OBJECT(bus)); +} + +static ResettableState *bus_get_reset_state(Object *obj) +{ + BusState *bus =3D BUS(obj); + return &bus->reset; +} + +static void bus_reset_child_foreach(Object *obj, ResettableChildCallback c= b, + void *opaque, ResetType type) +{ + BusState *bus =3D BUS(obj); + BusChild *kid; + + QTAILQ_FOREACH(kid, &bus->children, sibling) { + cb(OBJECT(kid->child), opaque, type); + } +} + static void qbus_realize(BusState *bus, DeviceState *parent, const char *n= ame) { const char *typename =3D object_get_typename(OBJECT(bus)); @@ -199,12 +221,83 @@ static char *default_bus_get_fw_dev_path(DeviceState = *dev) return g_strdup(object_get_typename(OBJECT(dev))); } =20 +/** + * bus_phases_reset: + * Transition reset method for buses to allow moving + * smoothly from legacy reset method to multi-phases + */ +static void bus_phases_reset(BusState *bus) +{ + ResettableClass *rc =3D RESETTABLE_GET_CLASS(bus); + + if (rc->phases.enter) { + rc->phases.enter(OBJECT(bus), RESET_TYPE_COLD); + } + if (rc->phases.hold) { + rc->phases.hold(OBJECT(bus)); + } + if (rc->phases.exit) { + rc->phases.exit(OBJECT(bus)); + } +} + +static void bus_transitional_reset(Object *obj) +{ + BusClass *bc =3D BUS_GET_CLASS(obj); + + /* + * This will call either @bus_phases_reset (for multi-phases transitio= ned + * buses) or a bus's specific method for not-yet transitioned buses. + * In both case, it does not reset children. + */ + if (bc->reset) { + bc->reset(BUS(obj)); + } +} + +/** + * bus_get_transitional_reset: + * check if the bus's class is ready for multi-phase + */ +static ResettableTrFunction bus_get_transitional_reset(Object *obj) +{ + BusClass *dc =3D BUS_GET_CLASS(obj); + if (dc->reset !=3D bus_phases_reset) { + /* + * dc->reset has been overridden by a subclass, + * the bus is not ready for multi phase yet. + */ + return bus_transitional_reset; + } + return NULL; +} + static void bus_class_init(ObjectClass *class, void *data) { BusClass *bc =3D BUS_CLASS(class); + ResettableClass *rc =3D RESETTABLE_CLASS(class); =20 class->unparent =3D bus_unparent; bc->get_fw_dev_path =3D default_bus_get_fw_dev_path; + + rc->get_state =3D bus_get_reset_state; + rc->child_foreach =3D bus_reset_child_foreach; + + /* + * @bus_phases_reset is put as the default reset method below, allowing + * to do the multi-phase transition from base classes to leaf classes.= It + * allows a legacy-reset Bus class to extend a multi-phases-reset + * Bus class for the following reason: + * + If a base class B has been moved to multi-phase, then it does not + * override this default reset method and may have defined phase met= hods. + * + A daughter class C (extending class B) which uses + * bus_class_set_parent_reset() (or similar means) to override the + * reset method will still work as expected. @bus_phases_reset funct= ion + * will be registered as the parent reset method and effectively call + * parent reset phases. + */ + bc->reset =3D bus_phases_reset; + rc->get_transitional_function =3D bus_get_transitional_reset; } =20 static void qbus_finalize(Object *obj) @@ -223,6 +316,10 @@ static const TypeInfo bus_info =3D { .instance_init =3D qbus_initfn, .instance_finalize =3D qbus_finalize, .class_init =3D bus_class_init, + .interfaces =3D (InterfaceInfo[]) { + { TYPE_RESETTABLE_INTERFACE }, + { } + }, }; =20 static void bus_register_types(void) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index f230063189..81784c73fb 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -329,6 +329,28 @@ void qbus_reset_all_fn(void *opaque) qbus_reset_all(bus); } =20 +bool device_is_in_reset(DeviceState *dev) +{ + return resettable_is_in_reset(OBJECT(dev)); +} + +static ResettableState *device_get_reset_state(Object *obj) +{ + DeviceState *dev =3D DEVICE(obj); + return &dev->reset; +} + +static void device_reset_child_foreach(Object *obj, ResettableChildCallbac= k cb, + void *opaque, ResetType type) +{ + DeviceState *dev =3D DEVICE(obj); + BusState *bus; + + QLIST_FOREACH(bus, &dev->child_bus, sibling) { + cb(OBJECT(bus), opaque, type); + } +} + /* can be used as ->unplug() callback for the simple cases */ void qdev_simple_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) @@ -1084,9 +1106,61 @@ static void device_unparent(Object *obj) } } =20 +/** + * device_phases_reset: + * Transition reset method for devices to allow moving + * smoothly from legacy reset method to multi-phases + */ +static void device_phases_reset(DeviceState *dev) +{ + ResettableClass *rc =3D RESETTABLE_GET_CLASS(dev); + + if (rc->phases.enter) { + rc->phases.enter(OBJECT(dev), RESET_TYPE_COLD); + } + if (rc->phases.hold) { + rc->phases.hold(OBJECT(dev)); + } + if (rc->phases.exit) { + rc->phases.exit(OBJECT(dev)); + } +} + +static void device_transitional_reset(Object *obj) +{ + DeviceClass *dc =3D DEVICE_GET_CLASS(obj); + + /* + * This will call either @device_phases_reset (for multi-phases transi= tioned + * devices) or a device's specific method for not-yet transitioned dev= ices. + * In both case, it does not reset children. + */ + if (dc->reset) { + dc->reset(DEVICE(obj)); + } +} + +/** + * device_get_transitional_reset: + * check if the device's class is ready for multi-phase + */ +static ResettableTrFunction device_get_transitional_reset(Object *obj) +{ + DeviceClass *dc =3D DEVICE_GET_CLASS(obj); + if (dc->reset !=3D device_phases_reset) { + /* + * dc->reset has been overridden by a subclass, + * the device is not ready for multi phase yet. + */ + return device_transitional_reset; + } + return NULL; +} + static void device_class_init(ObjectClass *class, void *data) { DeviceClass *dc =3D DEVICE_CLASS(class); + ResettableClass *rc =3D RESETTABLE_CLASS(class); =20 class->unparent =3D device_unparent; =20 @@ -1098,6 +1172,25 @@ static void device_class_init(ObjectClass *class, vo= id *data) */ dc->hotpluggable =3D true; dc->user_creatable =3D true; + + rc->get_state =3D device_get_reset_state; + rc->child_foreach =3D device_reset_child_foreach; + + /* + * @device_phases_reset is put as the default reset method below, allo= wing + * to do the multi-phase transition from base classes to leaf classes.= It + * allows a legacy-reset Device class to extend a multi-phases-reset + * Device class for the following reason: + * + If a base class B has been moved to multi-phase, then it does not + * override this default reset method and may have defined phase met= hods. + * + A daughter class C (extending class B) which uses + * device_class_set_parent_reset() (or similar means) to override the + * reset method will still work as expected. @device_phases_reset fu= nction + * will be registered as the parent reset method and effectively call + * parent reset phases. + */ + dc->reset =3D device_phases_reset; + rc->get_transitional_function =3D device_get_transitional_reset; } =20 void device_class_set_parent_reset(DeviceClass *dc, @@ -1156,6 +1249,10 @@ static const TypeInfo device_type_info =3D { .class_init =3D device_class_init, .abstract =3D true, .class_size =3D sizeof(DeviceClass), + .interfaces =3D (InterfaceInfo[]) { + { TYPE_RESETTABLE_INTERFACE }, + { } + }, }; =20 static void qdev_register_types(void) diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 01963984f8..2e3346600e 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -5,6 +5,7 @@ #include "qemu/bitmap.h" #include "qom/object.h" #include "hw/hotplug.h" +#include "hw/resettable.h" =20 enum { DEV_NVECTORS_UNSPECIFIED =3D -1, @@ -104,6 +105,11 @@ typedef struct DeviceClass { bool hotpluggable; =20 /* callbacks */ + /* + * Reset method here is deprecated and replaced by methods in the + * resettable class interface to implement a multi-phase reset. + * TODO: remove once every reset callback is unused + */ DeviceReset reset; DeviceRealize realize; DeviceUnrealize unrealize; @@ -128,6 +134,7 @@ struct NamedGPIOList { /** * DeviceState: * @realized: Indicates whether the device has been fully constructed. + * @reset: ResettableState for the device; handled by Resettable interface. * * This structure should not be accessed directly. We declare it here * so that it can be embedded in individual device state structures. @@ -149,6 +156,7 @@ struct DeviceState { int num_child_bus; int instance_id_alias; int alias_required_for_version; + ResettableState reset; }; =20 struct DeviceListener { @@ -195,6 +203,7 @@ typedef struct BusChild { /** * BusState: * @hotplug_handler: link to a hotplug handler associated with bus. + * @reset: ResettableState for the bus; handled by Resettable interface. */ struct BusState { Object obj; @@ -206,6 +215,7 @@ struct BusState { int num_children; QTAILQ_HEAD(, BusChild) children; QLIST_ENTRY(BusState) sibling; + ResettableState reset; }; =20 /** @@ -392,6 +402,18 @@ void qdev_reset_all_fn(void *opaque); void qbus_reset_all(BusState *bus); void qbus_reset_all_fn(void *opaque); =20 +/** + * device_is_in_reset: + * Return true if the device @dev is currently being reset. + */ +bool device_is_in_reset(DeviceState *dev); + +/** + * bus_is_in_reset: + * Return true if the bus @bus is currently being reset. + */ +bool bus_is_in_reset(BusState *bus); + /* This should go away once we get rid of the NULL bus hack */ BusState *sysbus_get_default(void); =20 @@ -413,6 +435,11 @@ void qdev_machine_init(void); */ void device_legacy_reset(DeviceState *dev); =20 +/** + * device_class_set_parent_reset: + * TODO: remove the function when DeviceClass's reset method + * is not used anymore. + */ void device_class_set_parent_reset(DeviceClass *dc, DeviceReset dev_reset, DeviceReset *parent_reset); diff --git a/tests/Makefile.include b/tests/Makefile.include index 3543451ed3..618ad55401 100644 --- a/tests/Makefile.include +++ b/tests/Makefile.include @@ -562,6 +562,7 @@ tests/fp/%: tests/test-qdev-global-props$(EXESUF): tests/test-qdev-global-props.o \ hw/core/qdev.o hw/core/qdev-properties.o hw/core/hotplug.o\ hw/core/bus.o \ + hw/core/resettable.o \ hw/core/irq.o \ hw/core/fw-path-provider.o \ hw/core/reset.o \ --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571411599341633.0257394339317; Fri, 18 Oct 2019 08:13:19 -0700 (PDT) Received: from localhost ([::1]:41620 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTwM-0001oX-4T for importer@patchew.org; Fri, 18 Oct 2019 11:13:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39112) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrC-0006ka-Ar for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:07:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrA-0000I5-TJ for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:07:58 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38684) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTr7-0000DH-6A; Fri, 18 Oct 2019 11:07:53 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 985CC96F53; Fri, 18 Oct 2019 15:07:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411272; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=viHjPgtc5HTCRsQlMywrp57XhUG1VOp0+kLWxpMlyqs=; b=A5S94pTw0UDr+7bCBWTCw6RNRzg4BRCxMf3Yvd5hzNDKaiz2WjH9pJUPNpSuiWK7Rz4SAm hUcVW8CKZV5x/gpe3vQB8dztdHy3XXwlsD35CEjoKL/geqKd3u5I39VpAJBvdKYLn1DlGZ DODUOGDTDvB5xB4ZQW/ONMRYJ6/BF5g= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 05/13] hw/core/resettable: add support for changing parent Date: Fri, 18 Oct 2019 17:06:22 +0200 Message-Id: <20191018150630.31099-6-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; 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charset="utf-8" Add a function resettable_change_parent() to do the required plumbing when changing the parent a of Resettable object. We need to make sure that the reset state of the object remains coherent with the reset state of the new parent. We make the 2 following hypothesis: + when an object is put in a parent under reset, the object goes in reset. + when an object is removed from a parent under reset, the object leaves reset. The added function avoid any glitch if both old and new parent are already in reset. Signed-off-by: Damien Hedde --- hw/core/resettable.c | 54 +++++++++++++++++++++++++++++++++++++++++ hw/core/trace-events | 1 + include/hw/resettable.h | 16 ++++++++++++ 3 files changed, 71 insertions(+) diff --git a/hw/core/resettable.c b/hw/core/resettable.c index c5e11cff4f..60d4285fcc 100644 --- a/hw/core/resettable.c +++ b/hw/core/resettable.c @@ -32,6 +32,14 @@ static void resettable_phase_exit(Object *obj, void *opa= que, ResetType type); */ static bool enter_phase_in_progress; =20 +/** + * exit_phase_in_progress: + * Flag telling whether we are currently in an enter phase where side + * effects are forbidden. This flag allows us to catch if + * resettable_change_parent() is called during exit phase. + */ +static unsigned exit_phase_in_progress; + void resettable_reset(Object *obj, ResetType type) { trace_resettable_reset(obj, type); @@ -58,7 +66,9 @@ void resettable_release_reset(Object *obj, ResetType type) /* TODO: change that assert when adding support for other reset types = */ assert(type =3D=3D RESET_TYPE_COLD); trace_resettable_reset_release_begin(obj, type); + exit_phase_in_progress +=3D 1; resettable_phase_exit(obj, NULL, type); + exit_phase_in_progress -=3D 1; trace_resettable_reset_release_end(obj); } =20 @@ -198,6 +208,50 @@ static void resettable_phase_exit(Object *obj, void *o= paque, ResetType type) trace_resettable_phase_exit_end(obj, obj_typename, s->count); } =20 +/* + * resettable_get_count: + * Get the count of the Resettable object @obj. Return 0 if @obj is NULL. + */ +static uint32_t resettable_get_count(Object *obj) +{ + if (obj) { + ResettableClass *rc =3D RESETTABLE_GET_CLASS(obj); + return rc->get_state(obj)->count; + } + return 0; +} + +void resettable_change_parent(Object *obj, Object *newp, Object *oldp) +{ + ResettableClass *rc =3D RESETTABLE_GET_CLASS(obj); + ResettableState *s =3D rc->get_state(obj); + uint32_t newp_count =3D resettable_get_count(newp); + uint32_t oldp_count =3D resettable_get_count(oldp); + + assert(!enter_phase_in_progress && !exit_phase_in_progress); + trace_resettable_change_parent(obj, oldp, oldp_count, newp, newp_count= ); + + /* + * At most one of the two 'for' loop will be executed below + * in order to cope with the diff between the two count. + */ + /* if newp is more reset than oldp */ + for (uint32_t i =3D oldp_count; i < newp_count; i++) { + resettable_assert_reset(obj, RESET_TYPE_COLD); + } + /* + * if obj is leaving a bus under reset, we need to ensure + * hold phase is not pending. + */ + if (oldp_count && s->hold_phase_pending) { + resettable_phase_hold(obj, NULL, RESET_TYPE_COLD); + } + /* if oldp is more reset than newp */ + for (uint32_t i =3D newp_count; i < oldp_count; i++) { + resettable_release_reset(obj, RESET_TYPE_COLD); + } +} + void resettable_class_set_parent_phases(ResettableClass *rc, ResettableEnterPhase enter, ResettableHoldPhase hold, diff --git a/hw/core/trace-events b/hw/core/trace-events index 66081d0fb4..6d03ef7ff9 100644 --- a/hw/core/trace-events +++ b/hw/core/trace-events @@ -16,6 +16,7 @@ resettable_reset_assert_begin(void *obj, int cold) "obj= =3D%p cold=3D%d" resettable_reset_assert_end(void *obj) "obj=3D%p" resettable_reset_release_begin(void *obj, int cold) "obj=3D%p cold=3D%d" resettable_reset_release_end(void *obj) "obj=3D%p" +resettable_change_parent(void *obj, void *o, uint32_t oc, void *n, uint32_= t nc) "obj=3D%p from=3D%p(%" PRIu32 ") to=3D%p(%" PRIu32 ")" resettable_phase_enter_begin(void *obj, const char *objtype, uint32_t coun= t, int type) "obj=3D%p(%s) count=3D%" PRIu32 " type=3D%d" resettable_phase_enter_exec(void *obj, const char *objtype, int type, int = has_method) "obj=3D%p(%s) type=3D%d method=3D%d" resettable_phase_enter_end(void *obj, const char *objtype, uint32_t count)= "obj=3D%p(%s) count=3D%" PRIu32 diff --git a/include/hw/resettable.h b/include/hw/resettable.h index 6b24e1633b..f6d379669f 100644 --- a/include/hw/resettable.h +++ b/include/hw/resettable.h @@ -182,6 +182,22 @@ void resettable_release_reset(Object *obj, ResetType t= ype); */ bool resettable_is_in_reset(Object *obj); =20 +/** + * resettable_change_parent: + * Indicate that the parent of Ressettable @obj change from @oldp to @newp. + * All 3 objects must implements resettable interface. @oldp or @newp may = be + * NULL. + * + * This function will adapt the reset state of @obj so that it is coherent + * with the reset state of @newp. It may trigger @resettable_assert_reset() + * or @resettable_release_reset(). It will do such things only if the reset + * state of @newp and @oldp are different. + * + * When using this function during reset, it must only be called during + * an hold phase method. Calling this during enter or exit phase is an err= or. + */ +void resettable_change_parent(Object *obj, Object *newp, Object *oldp); + /** * resettable_class_set_parent_phases: * --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571411941275221.82818361129785; Fri, 18 Oct 2019 08:19:01 -0700 (PDT) Received: from localhost ([::1]:41682 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLU1m-0005na-NK for importer@patchew.org; Fri, 18 Oct 2019 11:18:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39149) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrE-0006lf-9J for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrB-0000Ie-L5 for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:07:59 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38696) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTr7-0000Dd-Ru; Fri, 18 Oct 2019 11:07:54 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 43F9296F54; Fri, 18 Oct 2019 15:07:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411272; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6vGveMHLjzG3M9XbNsp7F2Gj1HQXW7Dw2jM2Twu2XEE=; b=qWEoTFz351lHwa00qgecQpLR87ZlhCBgZk5PdaDs/JxkrLy4WmdzJKZN6mUTQVMlocHFxj 2Igm3HuZBpINENBo/+r133kH1Ham6v6yhMEe+whhc06prgxy+wRFyPi/NK7IHk89BIobuG LVmU1Dlrj0eMv6NCL756tn1LEQ+pU2s= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 06/13] hw/core/qdev: handle parent bus change regarding resettable Date: Fri, 18 Oct 2019 17:06:23 +0200 Message-Id: <20191018150630.31099-7-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411272; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6vGveMHLjzG3M9XbNsp7F2Gj1HQXW7Dw2jM2Twu2XEE=; b=rtuhlzY5vEWPsHgKqSb8gxkp/4KKzilEu/e4CYnyO81zlGPI/mF6GQpMlzcZ4adY9ESB79 UvayK0Ni7pbny9NE7mZpDos3vEi0OFGQI5sKsfqYwMv/iKioqFJWovPErK41OEhQlGNU7Q TFHr8qujVWV8H5CZVZYW7krBmEfX4pA= ARC-Seal: i=1; s=mail; d=greensocs.com; t=1571411272; a=rsa-sha256; cv=none; b=loeaI8nBfTzxSv+OVhDob4D6JCsA5YoPoobpLb/JrdBlvbXiMbhiHDnqYVnUSbM7nXPBNA AricptmnI1k+3dkObdCuuotzTz9gwNh9jALzf9qs5EpCWFFgEEiFFoYeqaOdHz0XADuJ0y okoHknY8MyHZFwjlSwmf36LRyA2kw+c= ARC-Authentication-Results: i=1; beetle.greensocs.com; none Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 5.135.226.135 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , peter.maydell@linaro.org, berrange@redhat.com, ehabkost@redhat.com, cohuck@redhat.com, mark.burton@greensocs.com, qemu-s390x@nongnu.org, edgari@xilinx.com, qemu-arm@nongnu.org, pbonzini@redhat.com, philmd@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" In qdev_set_parent_bus(), when changing the parent bus of a realized device, if the source and destination buses are not in the same reset state, some adaptation are required. This patch adds needed call to resettable_change_parent() to make sure a device reset state stays coherent with its parent bus. The addition is a no-op if: 1. the device being parented is not realized. 2. the device is realized, but both buses are not under reset. Case 2 means that as long as qdev_set_parent_bus() is called during the machine realization procedure (which is before the machine reset so nothing is in reset), it is a no op. There are 49 call sites of qdev_set_parent_bus(). All but one fall into the no-op case: + 28 calls related to virtio (in hw/{s390x,display,virtio}/ {vhost,virtio}-xxx.c) to set a _vdev_/_vgpu_ composing device parent bus just before realizing the _vdev_/_vgpu_. + hw/qdev.c: when creating a device in qdev_try_create() + hw/sysbus.c: when initializing a device in the sysbus + hw/display/virtio-gpu-pci.c: before realizing VirtIOGPUPCIBase/vgpu + hw/display/virtio-vga.c: before realizing VirtIOVGABase/vgpu + hw/i386/amd_iommu.c: before realizing AMDVIState/pci + hw/misc/auxbus.c: when creating an AUXBus + hw/misc/auxbus.c: when creating an AUXBus child + hw/misc/macio/macio.c: when initializing a MACIOState child + hw/misc/macio/macio.c: before realizing NewWorldMacIOState/pmu + hw/misc/macio/macio.c: before realizing NewWorldMacIOState/cuda + hw/pci-host/designware.c: before realizing DesignwarePCIEHost/root + hw/pci-host/gpex.c: before realizing GPEXHost/root + hw/pci-host/prep.c: when initializaing PREPPCIState/pci_dev + hw/pci-host/q35.c: before realizing Q35PCIHost/mch + hw/pci-host/versatile.c: when initializing PCIVPBState/pci_dev + hw/pci-host/xilinx-pcie.c: before realizing XilinxPCIEHost/root + hw/s390x/event-facility.c: when creating SCLPEventFacility/ TYPE_SCLP_QUIESCE + hw/s390x/event-facility.c: ditto with SCLPEventFacility/ TYPE_SCLP_CPU_HOTPLUG + hw/s390x/sclp.c: Not trivial because it is called on a SLCPDevice just after realizing it. Ok because at this point the destination bus (sysbus) is not in reset; the realize step is before the machine reset. + hw/sd/core.c: Not OK. Used in sdbus_reparent_card(). See below. + hw/ssi/ssi.c: Used to put spi slave on spi bus and connect the cs line in ssi_auto_connect_slave(). Ok because this function is only used in realize step in hw/ssi/aspeed_smc.ci, hw/ssi/imx_spi.c, hw/ssi/mss-spi.c, hw/ssi/xilinx_spi.c and hw/ssi/xilinx_spips.c. + hw/xen/xen-legacy-backend.c: when creating a XenLegacyDevice device + qdev-monitor.c: in device hotplug creation procedure before realize Note that this commit alone will have no effect, right now there is no use of resettable API to reset anything. So a bus will never be tagged as in-reset by this same API. The one place where side-effect will occurs is in hw/sd/core.c in sdbus_reparent_card(). This function is only used in the raspi machines, including during the sysbus reset procedure. This case will be fixed by a following commit before globally enabling resettable API for sysbus reset. Signed-off-by: Damien Hedde Reviewed-by: Peter Maydell --- Exhaustive list of the 28 virtio caller to qdev_set_parent_bus(): + hw/display/virtio-gpu-pci.c -> VirtIOGPUPCIBase/vgpu realize + hw/display_virtio-vga.c -> VirtIOVGABase/vgpu realize + hw/s390x/vhost-vsock-ccw.c -> VHostVSockCCWState/vdev realize + hw/s390x/virtio-ccw-9p.c -> V9fsCCWState/vdev realize + hw/s390x/virtio-ccw-balloon.c -> VirtIOBalloonCcw/vdev realize + hw/s390x/virtio-ccw-blk.c -> VirtIOBlkCcw/vdev realize + hw/s390x/virtio-ccw-crypto.c -> VirtIOCryptoCcw/vdev realize + hw/s390x/virtio-ccw-gpu.c -> VirtIOGPUCcw/vdev realize + hw/s390x/virtio-ccw-input.c -> VirtIOInputCcw/vdev realize + hw/s390x/virtio-ccw-net.c -> VirtIONetCcw/vdev realize + hw/s390x/virtio-ccw-rng.c -> VirtIORNGCcw/vdev realize + hw/s390x/virtio-ccw-scsi.c -> VirtIOSCSICcw/vdev realize + hw/s390x/virtio-ccw-scsi.c -> VHostSCSICcw/vdev realize + hw/s390x/virtio-ccw-serial.c -> VirtioSerialCcw/vdev realize + hw/virtio/vhost-scsi-pci.c -> VHostSCSIPCI/vdev realize + hw/virtio/vhost-user-blk-pci.c -> VHostUserBlkPCI/vdev realize + hw/virtio/vhost-user-scsi-pci.c -> VHostUserSCSIPCI/vdev realize + hw/virtio/vhost-vsock-pci.c -> VHostVSockPCI/vdev realize + hw/virtio/virtio-9p-pci.c -> V9fsPCIState/vdev realize + hw/virtio/virtio-balloon-pci.c -> VirtIOBalloonPCI/vdev realize + hw/virtio/virtio-blk-pci.c -> VirtIOBlkPCI/vdev realize + hw/virtio/virtio-crypto-pci.c -> VirtIOCryptoPCI/vdev realize + hw/virtio/virtio-input-pci.c -> VirtIOInputPCI/vdev realize + hw/virtio/virtio-net-pci.c -> VirtIONetPCI/vdev realize + hw/virtio/virtio-pmem-pci.c -> VirtIOPMEMPCI/vdev realize + hw/virtio/virtio-rng-pci.c -> VirtIORngPCI/vdev realize + hw/virtio/virtio-scsi-pci.c -> VirtIOSCSIPCI/vdev realize + hw/virtio/virtio-serial-pci.c -> VirtIOSerialPCI/vdev realize --- hw/core/qdev.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 81784c73fb..3933f62d0c 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -96,23 +96,29 @@ static void bus_add_child(BusState *bus, DeviceState *c= hild) =20 void qdev_set_parent_bus(DeviceState *dev, BusState *bus) { - bool replugging =3D dev->parent_bus !=3D NULL; + BusState *old_parent_bus =3D dev->parent_bus; =20 - if (replugging) { + if (old_parent_bus) { trace_qdev_update_parent_bus(dev, dev->parent_bus, bus); /* * Keep a reference to the device while it's not plugged into * any bus, to avoid it potentially evaporating when it is * dereffed in bus_remove_child(). + * Also keep the ref of the parent bus until the end, so that + * we can safely call resettable_change_parent() below. */ object_ref(OBJECT(dev)); bus_remove_child(dev->parent_bus, dev); - object_unref(OBJECT(dev->parent_bus)); } dev->parent_bus =3D bus; object_ref(OBJECT(bus)); bus_add_child(bus, dev); - if (replugging) { + if (dev->realized) { + resettable_change_parent(OBJECT(dev), OBJECT(bus), + OBJECT(old_parent_bus)); + } + if (old_parent_bus) { + object_unref(OBJECT(old_parent_bus)); object_unref(OBJECT(dev)); } } --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571411539790110.25292784946396; Fri, 18 Oct 2019 08:12:19 -0700 (PDT) Received: from localhost ([::1]:41616 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTvO-00017k-7D for importer@patchew.org; Fri, 18 Oct 2019 11:12:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39121) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrC-0006kn-Jh for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:07:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrB-0000IN-EZ for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:07:58 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38708) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTr8-0000F9-G2; Fri, 18 Oct 2019 11:07:54 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id E71AE96F56; Fri, 18 Oct 2019 15:07:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411273; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wKAieN4stMmjUC4G+xrrQnH6uT0wInwvb/2V4Wkfc+U=; b=t/JpbLaiv6mEH12jp92pt87B4PTZjY2iM95fBJW2Kf0dkrq6O4qzHNKlIwovbEt3AkvhVz AraTiTB/xQEczOzZFdnZ78DEjUA3RxeGhPBSF8MfcyU+/+CysGIEJltqnrLBJU9015ivx1 KVBGuGuav4FgeW9vDRMeBGnrw3mguU0= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 07/13] hw/core/qdev: update hotplug reset regarding resettable Date: Fri, 18 Oct 2019 17:06:24 +0200 Message-Id: <20191018150630.31099-8-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; 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charset="utf-8" This commit make use of the resettable API to reset the device being hotplugged during when it is realized. Also it make sure it is put in a reset state coherent with the parent it is plugged into. Signed-off-by: Damien Hedde --- I'm not sure I've done everything that's required here since I do not understand everything that's behind the hotplug and realize/unrealize. I'm a bit lost there... One of the remaining question is: do we need to do things related to unrealize ? It seems, a device can be realized, unrealized, and re-realized ? But is that true also for a hotplugged device ? Also resettable API is called there, so children if any are reset too. This was not the case before, this a probably not a big deal, as long as all children are realized too at this point. I'm not sure we have a guarantee on this; the recursive realize is not done in the base bus class so it will go only down to first buses level if it is not propagated by bus subclasses. Do hotplug devices can have more than single level bus subtree (ie: more than some child buses with no devices on them) ? --- hw/core/qdev.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/hw/core/qdev.c b/hw/core/qdev.c index 3933f62d0c..c5d107ea4e 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -930,7 +930,14 @@ static void device_set_realized(Object *obj, bool valu= e, Error **errp) } } if (dev->hotplugged) { - device_legacy_reset(dev); + /* + * Reset the device, as well as its subtree which should be + * realized too + */ + resettable_assert_reset(OBJECT(dev), RESET_TYPE_COLD); + resettable_change_parent(OBJECT(dev), OBJECT(dev->parent_bus), + NULL); + resettable_release_reset(OBJECT(dev), RESET_TYPE_COLD); } dev->pending_deleted_event =3D false; =20 --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 18 Oct 2019 11:07:55 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 99A8E96F57; Fri, 18 Oct 2019 15:07:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411274; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RqBxcWOE3GUk9NOvDWwY7MRG2couRRZlrwQCMsx9cb8=; b=K+BEr3S4fPz3+bqUh8rvo/LlgeBgDXJWbAL2F34zlmCe/tfuU70xY46CfbwiHCYR526AQW X8WpjL/Nhp2Na70OQCniAfLMIn0t0mlf0Y7wCFlN/nzkrvVS+nUAOQatXOgfeW1G88IHQz n5GqnSgHfirY0ckPaf7LMpImztCueoY= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 08/13] hw/core: deprecate old reset functions and introduce new ones Date: Fri, 18 Oct 2019 17:06:25 +0200 Message-Id: <20191018150630.31099-9-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; 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charset="utf-8" Deprecate device_legacy_reset(), qdev_reset_all() and qbus_reset_all() to be replaced by new functions device_cold_reset() and bus_cold_reset() which uses resettable API. Also introduce resettable_cold_reset_fn() which may be used as a replacement for qdev_reset_all_fn and qbus_reset_all_fn(). Following patches will be needed to look at legacy reset call sites and switch to resettable api. The legacy functions will be removed when unused. Signed-off-by: Damien Hedde Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- I've removed the general helpers + device_reset(DeviceState *dev, ResetType type) + bus_reset(BusState *dev, ResetType type) because with several reset types, all devices and buses will not implement all of them. I think it is preferable to define a type-specific helper every time it is needed for base classes implementing the reset type (eg a device_pci_reset(PciDev*) for the pci reset type if add that). So device_reset()/bus_reset() symbol names are not taken anymore. I don't have a strong opinion of what names should have the device_cold_reset() and bus_cold_reset() function added in this patch. It could be device/bus_hard_reset() (the current qbus_reset_all() comment mention we do a "hard" reset) or simply device/bus_reset() or anything else. What do you think ? Any better idea ? It should be consistent with the reset type name but we can change it also if cold is not what we want. Note that if we don't settle for device/bus_reset(). We can drop the first patch that renames device_reset() to device_legacy_reset() --- hw/core/bus.c | 5 +++++ hw/core/qdev.c | 5 +++++ hw/core/resettable.c | 5 +++++ include/hw/qdev-core.h | 27 +++++++++++++++++++++++++++ include/hw/resettable.h | 9 +++++++++ 5 files changed, 51 insertions(+) diff --git a/hw/core/bus.c b/hw/core/bus.c index 7c05e80db8..5f9e261bb2 100644 --- a/hw/core/bus.c +++ b/hw/core/bus.c @@ -68,6 +68,11 @@ int qbus_walk_children(BusState *bus, return 0; } =20 +void bus_cold_reset(BusState *bus) +{ + resettable_reset(OBJECT(bus), RESET_TYPE_COLD); +} + bool bus_is_in_reset(BusState *bus) { return resettable_is_in_reset(OBJECT(bus)); diff --git a/hw/core/qdev.c b/hw/core/qdev.c index c5d107ea4e..3e6600ce76 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -335,6 +335,11 @@ void qbus_reset_all_fn(void *opaque) qbus_reset_all(bus); } =20 +void device_cold_reset(DeviceState *dev) +{ + resettable_reset(OBJECT(dev), RESET_TYPE_COLD); +} + bool device_is_in_reset(DeviceState *dev) { return resettable_is_in_reset(OBJECT(dev)); diff --git a/hw/core/resettable.c b/hw/core/resettable.c index 60d4285fcc..3d3200bdbc 100644 --- a/hw/core/resettable.c +++ b/hw/core/resettable.c @@ -252,6 +252,11 @@ void resettable_change_parent(Object *obj, Object *new= p, Object *oldp) } } =20 +void resettable_cold_reset_fn(void *opaque) +{ + resettable_reset((Object *) opaque, RESET_TYPE_COLD); +} + void resettable_class_set_parent_phases(ResettableClass *rc, ResettableEnterPhase enter, ResettableHoldPhase hold, diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index 2e3346600e..1e88cb2f6a 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -386,6 +386,13 @@ int qdev_walk_children(DeviceState *dev, qdev_walkerfn *post_devfn, qbus_walkerfn *post_busf= n, void *opaque); =20 +/** + * @qdev_reset_all: + * Reset @dev. See @qbus_reset_all() for more details. + * + * Note: This function is deprecated and will be removed when it becomes u= nused. + * Please use device_cold_reset() now. + */ void qdev_reset_all(DeviceState *dev); void qdev_reset_all_fn(void *opaque); =20 @@ -398,10 +405,28 @@ void qdev_reset_all_fn(void *opaque); * hard reset means that qbus_reset_all will reset all state of the device. * For PCI devices, for example, this will include the base address regist= ers * or configuration space. + * + * Note: This function is deprecated and will be removed when it becomes u= nused. + * Please use bus_cold_reset() now. */ void qbus_reset_all(BusState *bus); void qbus_reset_all_fn(void *opaque); =20 +/** + * device_cold_reset: + * Reset device @dev and perform a recursive processing using the resettab= le + * interface. It triggers a RESET_TYPE_COLD. + */ +void device_cold_reset(DeviceState *dev); + +/** + * bus_cold_reset: + * + * Reset bus @bus and perform a recursive processing using the resettable + * interface. It triggers a RESET_TYPE_COLD. + */ +void bus_cold_reset(BusState *bus); + /** * device_is_in_reset: * Return true if the device @dev is currently being reset. @@ -432,6 +457,8 @@ void qdev_machine_init(void); * device_legacy_reset: * * Reset a single device (by calling the reset method). + * Note: This function is deprecated and will be removed when it becomes u= nused. + * Please use device_cold_reset() now. */ void device_legacy_reset(DeviceState *dev); =20 diff --git a/include/hw/resettable.h b/include/hw/resettable.h index f6d379669f..6a9e17344e 100644 --- a/include/hw/resettable.h +++ b/include/hw/resettable.h @@ -198,6 +198,15 @@ bool resettable_is_in_reset(Object *obj); */ void resettable_change_parent(Object *obj, Object *newp, Object *oldp); =20 +/** + * resettable_cold_reset_fn: + * Helper to call resettable_reset((Object *) opaque, RESET_TYPE_COLD). + * + * This function is typically useful to register a reset handler with + * qemu_register_reset. + */ +void resettable_cold_reset_fn(void *opaque); + /** * resettable_class_set_parent_phases: * --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571412044226369.5102749186335; Fri, 18 Oct 2019 08:20:44 -0700 (PDT) Received: from localhost ([::1]:41698 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLU3W-00075E-WF for importer@patchew.org; Fri, 18 Oct 2019 11:20:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39302) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrN-0006rc-GS for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrL-0000NJ-7Z for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:09 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38732) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTr9-0000Gh-SQ; Fri, 18 Oct 2019 11:07:56 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 468AE96F58; Fri, 18 Oct 2019 15:07:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411274; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=yFxNQUn0McvG51PcnwkNfFvA5jqi890S+3wkjQHe+/8=; b=27URdIHB6TSPjT8Qy6JOi2I08BboVxzVYJGprrFePLapYv9BFMvkWojvhWdBJ2T6o3WFUp +7Q/DRvHThrctze5Y7aGbRb6pQkAzNdljCUNzqsCKTkKPB2VSCDkEZ9VxIsdH3y7G7PKXw BNf/naAJjj9Gozu8eeqPbu3Vp4wlmbk= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 09/13] docs/devel/reset.txt: add doc about Resettable interface Date: Fri, 18 Oct 2019 17:06:26 +0200 Message-Id: <20191018150630.31099-10-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; 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charset="utf-8" Signed-off-by: Damien Hedde Reviewed-by: Peter Maydell --- Should I add an entry into index.rst ? --- docs/devel/reset.rst | 282 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 282 insertions(+) create mode 100644 docs/devel/reset.rst diff --git a/docs/devel/reset.rst b/docs/devel/reset.rst new file mode 100644 index 0000000000..a562720f55 --- /dev/null +++ b/docs/devel/reset.rst @@ -0,0 +1,282 @@ + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +Reset in QEMU: the Resettable interface +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +The reset of qemu objects is handled using the resettable interface declar= ed +in ``include/hw/resettable.h``. + +This interface allows to group objects (on a tree basis) and to reset the +whole group consistently. Each individual member object does not have to c= are +about others; in particular problems of order (which object is reset first) +are addressed. + +As of now DeviceClass and BusClass implement this interface. + + +Triggering reset +---------------- + +This section documents the APIs which "users" of a resettable object shoul= d use +to control it. All resettable control functions must be called while holdi= ng +the iothread lock. + +You can apply a reset to an object using ``resettable_assert_reset()``. Yo= u need +to call ``resettable_release_reset()`` to release the object from reset. To +instantly reset an object, without keeping it in reset state, just call +``resettable_reset()``. These functions function takes two parameters: a p= ointer +to the object to reset and a reset type. + +Several types of reset will be supported. For now only cold reset is defin= ed, +others may be added later. The Resettable interface handles reset types wi= th an +enum: + +``RESET_TYPE_COLD`` + Cold reset is supported by every resettable object. In QEMU, it means we= reset + to the initial state corresponding to the start of QEMU; this might diff= ers + from what is a read hardware cold reset. It differs from other reset (li= ke + warm or bus resets) which may keep certain parts untouched. + +Calling ``resettable_reset()`` is equivalent to calling +``resettable_assert_reset()`` then ``resettable_release_reset()``. It is +possible to interleave multiple calls to these three functions. There may +be several reset sources/controllers of a given object. The interface hand= les +everything and the different reset controllers do not need to know anything +about each others. The object will leave reset state only when each other +controllers end their reset operation. This point is handled internally by +maintaining a count of reset; it is crucial to call +``resettable_release_reset()`` one time and only one time per +``resettable_assert_reset()`` call. + +For now migration of a device or bus in reset is not supported. Care must = be +taken not to delayed ``resettable_release_reset()`` from its +``resettable_assert_reset()`` counterpart. + +Note that, since resettable is an interface, the API takes simple Object as +parameter. Still, it is a programming error to call a resettable function = on a +non-resettable object and it will trigger a run time assert error. Since m= ost +call to resettable interface are done through base class functions, such an +error is not likely to happen. + +For Devices and Buses, the following helper functions exists: + +- ``device_cold_reset()`` +- ``bus_cold_reset()`` + +These are simple wrappers around resettable_reset() function; they only ca= st the +Device or Bus into an Object and pass the cold reset type. When possible +prefer to use these functions instead ``resettable_reset()``. + +Device and bus functions co-exist because there can be semantic differences +between resetting a bus and resetting the controller bridge which owns it. +For example, considering a SCSI controller. Resetting the controller puts = all +its registers back to what reset state was as well as reset everything on = the +SCSI bus. Whereas resetting just the SCSI bus only resets everything that'= s on +it but not the controller. + + +Multi-phase mechanism +--------------------- + +This section documents the internals of the resettable interface. + +The resettable interface uses a multi-phase system to relieve objects and +machines from reset ordering problems. To address this, the reset operation +of an object is split into three well defined phases. + +When resetting a several objects (for example the whole machine at simulat= ion +startup), all first phases of all objects are executed, then all second ph= ases +and then all third phases. + +The three phases are: + +1. The **enter** phase is executed when the object enters reset. It reset = only + local state of the object; it must not do anything that has a side-effe= ct + on other objects, such as raising or lowering a qemu_irq line or readin= g or + writing guest memory. + +2. The **hold** phase is executed for entry into reset, once every object = in the + group which is being reset has had its *enter* phase executed. At this = point + devices can do actions that affect other objects. + +3. The **exit** phase is executed when the object leaves the reset state. + Actions affecting other objects are permitted. + +As said in previous section, the interface maintains a count of reset. This +count is used to ensure phases are executed only when required. *enter* and +*hold* phases are executed only when asserting reset for the first time +(if an object is already in reset state when calling +``resettable_assert_reset()`` or ``resettable_reset()``, they are not +executed). +The *exit* phase is executed only when the last reset operation ends. Ther= efore +the object has not to care how many reset controllers it has and how many = of +them have started a reset. + + +Handling reset in a resettable object +----------------------------------------- + +This section documents the APIs that an implementation of a resettable obj= ect +must provide and what functions it has access to. It is intended for people +who want to implement or convert a class which has the resettable interfac= e; +for example when specializing an existing device or bus. + +Methods to implement +.................... + +Three methods should be defined or left empty. Each method corresponds to a +phase of the reset; they are name ``phases.enter()``, ``phases.hold()`` and +``phases.exit()``. They all take the object as parameter. The *enter* meth= od +also take the reset type as second parameter. + +When extending an existing class, these methods may need to be extended to= o. +The ``resettable_class_set_parent_phases()`` class function may be used to +backup mother class methods. + +Here follows an example to implement reset for a Device which set an IO wh= ile +in reset. + +:: + + static void mydev_reset_enter(Object *obj, ResetType type) + { + MyDevClass *myclass =3D MYDEV_GET_CLASS(obj); + MyDevState *mydev =3D MYDEV(obj); + /* initialize local state only */ + mydev->var =3D 0; + /* call mother class enter phase */ + if (myclass->parent_phases.enter) { + myclass->parent_phases.enter(obj, type); + } + } + + static void mydev_reset_hold(Object *obj) + { + MyDevClass *myclass =3D MYDEV_GET_CLASS(obj); + MyDevState *mydev =3D MYDEV(obj); + /* set an IO */ + qemu_set_irq(mydev->irq, 1); + /* call mother class hold phase */ + if (myclass->parent_phases.hold) { + myclass->parent_phases.hold(obj); + } + } + + static void mydev_reset_exit(Object *obj) + { + MyDevClass *myclass =3D MYDEV_GET_CLASS(obj); + MyDevState *mydev =3D MYDEV(obj); + /* clear an IO */ + qemu_set_irq(mydev->irq, 0); + /* call mother class exit phase */ + if (myclass->parent_phases.exit) { + myclass->parent_phases.exit(obj); + } + } + + typedef struct MyDevClass { + MyMotherClass mother_class; + /* to store eventual parent reset methods */ + ResettablePhases parent_phases; + } MyDevClass; + + static void mydev_class_init(ObjectClass *class, void *data) + { + MyDevClass *myclass =3D MYDEV_CLASS(class); + ResettableClass *rc =3D RESETTABLE_CLASS(class); + resettable_class_set_parent_reset_phases(rc, + mydev_reset_enter, + mydev_reset_hold, + mydev_reset_exit, + &myclass->parent_phases); + } + +In the above example, we override the three phases. It is possible to over= ride +only part of them by passing NULL instead of a function pointer to +``resettable_class_set_parent_reset_phases()``. For example, the following= will +only override the *enter* phase and leave *hold* and *exit* untouched:: + + resettable_class_set_parent_reset_phases(rc, mydev_reset_enter, + NULL, NULL, + &myclass->parent_phases); + + +Polling the reset state +....................... + +Resettable interface provide the ``resettable_is_in_reset()`` function. +This function tells if the object parameter is currently under reset. + +An object is under reset from the beginning of the *init* phase to the end= of +*exit* phase. During all three phases, the function will return that the o= bject +is in reset. + +This function may be used if behavior has to be adapted when receiving ext= ernal +interaction while in reset state. Note that until migration of the reset s= tate +is supported, an object should not be left in reset. So apart from being +currently executing one of a reset phase, the only cases when this +function should return true is if an external interaction is made during *= hold* +or *exit* phase of another object in the same reset group. + +Helpers ``device_is_in_reset()`` and ``bus_is_in_reset()`` are also provid= ed +for devices and buses and should be preferred. + + +Base class handling of reset +---------------------------- + +This section documents parts of the reset mechanism that you only need to = know +about if you are extending it to work with a new base class other than +DeviceClass or BusClass, or maintaining the existing code in those classes= . Most +people can ignore it. + +Methods to implement +.................... + +There are two other methods that need to exist in a class implementing the +interface: ``get_state()`` and ``child_foreach()``. + +``get_state()`` is simple. *resettable* is an interface and, as a conseque= nce, +does not have any class state structure. But in order to factorize the cod= e, we +need one. This method must return a pointer to ``ResettableState`` structu= re. +The structure must be allocated by the base class; preferably it should be +located inside the object instance structure. + +``child_foreach()`` is more complex. It should execute the given callback = on +every reset child of the given resettable object. All children must be +resettable too. Additional parameters (a reset type and an opaque pointer)= must +be passed to the callback too. + +In ``DeviceClass`` and ``BusClass`` the ``ResettableState`` is located +``DeviceState`` and ``BusState`` structure. ``child_foreach()`` is impleme= nted +to follow the bus hierarchy; for a bus, it calls the function on every chi= ld +device; for a device, it calls the function on every bus child. When we re= set +the main system bus, we reset the whole machine bus tree. + +Changing a resettable parent +............................ + +One thing so should be taken care of by the base class is handling reset +hierarchy changes. + +The reset hierarchy is supposed to be static and built during machine crea= tion. +But there are actually some exceptions. To cope with this, the resettable = API +provides ``resettable_change_parent()``. This function allows to set, upda= te or +remove the parent of a resettable object after machine creation is done. As +parameters, it takes the object being moved, the old parent if any and the= new +parent if any. + +This function can be used at anytime when not in a reset operation. During +a reset operation it must be used only in *hold* phase. Using it in *enter= * or +*exit* phase is an error. +Also it should not be used during machine creation, although it is harmles= s to +do so: the function is a no-op as long as old and new parent are NULL or n= ot +in reset. + +There is currently 2 cases where this function is used: + +1. *device hotplug*; it means a new device is introduced on a live bus. + +2. *hot bus change*; it means an existing live device is added, moved or + removed in the bus hiearchy. At the moment, it occurs only in the raspi + machines for chaning the sdbus used by sd card. --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571411943202326.0747395303363; Fri, 18 Oct 2019 08:19:03 -0700 (PDT) Received: from localhost ([::1]:41684 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLU1t-0005q1-Pz for importer@patchew.org; Fri, 18 Oct 2019 11:19:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39219) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrF-0006oM-Oo for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrE-0000Kg-Es for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:01 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38744) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTrA-0000HC-Gn; Fri, 18 Oct 2019 11:07:56 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id EB9F496F59; Fri, 18 Oct 2019 15:07:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411275; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SDVW6VmwhIoF1KGL6MPy5fut+QaZf/9n9INNtU7E+Jc=; b=gXRr5OsBv466jAmE6ieOShVzKonQqzXS+NWymMTUyFP4EqsDJRS19JIF5hIrhTPzSwkWCH XVn+lKF2md2QbQAX/LeWZB+5kFoC2ZC9LhtdZ8RI6XYe8llQ8jAlOzI8HVQLXV3ho9EmRf SkTPLD8xweMLC6NVh6ntJS5c1HU2MtA= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 10/13] vl: replace deprecated qbus_reset_all registration Date: Fri, 18 Oct 2019 17:06:27 +0200 Message-Id: <20191018150630.31099-11-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411275; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SDVW6VmwhIoF1KGL6MPy5fut+QaZf/9n9INNtU7E+Jc=; b=Ld4d3VZ6FE/gkvTUPIrwcAjIi3aUW/+4Il3PeRjrAxBopes0UBMd/8sVZlFaB3Gxjhz6cz unaiDfv+OI8xP9/5Q36z6TqkQ6gnu5ELRrScxTs9zDMpvYVSg2HvCJ7EJJCikSHSblbudg JdYjiKDHFp1hsBW61dQR+nL73qjS6Qk= ARC-Seal: i=1; s=mail; d=greensocs.com; t=1571411275; a=rsa-sha256; cv=none; b=mAHKO253NvTEnfF5AWREt2MevQSAvjcc3IdpRVXuIYPFAeBI20TIPpYimsUdwMewq4FuW1 uQ7aAd4gahc/sJErYOeUD9HoX5mHJs9u1VVxjDKV1lS290KPVSWXPmiayPpnCngEIpopTk 3BieyMPbZd/PRTdtNV0saDMSTl+wKTM= ARC-Authentication-Results: i=1; beetle.greensocs.com; none Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 5.135.226.135 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , peter.maydell@linaro.org, berrange@redhat.com, ehabkost@redhat.com, cohuck@redhat.com, mark.burton@greensocs.com, qemu-s390x@nongnu.org, edgari@xilinx.com, qemu-arm@nongnu.org, pbonzini@redhat.com, philmd@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Replace deprecated qbus_reset_all by resettable_cold_reset_fn for the sysbus reset registration. Apart for the raspi machines, this does not impact the behavior because: + at this point resettable just call the old reset methods of devices and buses in the same order than qdev/qbus. + resettable handlers registered with qemu_register_reset are serialized; there is no interleaving. + eventual explicit calls to legacy reset API (device_reset or qdev/qbus_reset) inside this reset handler will not be masked out by resettable mechanism; they do not go through resettable api. For the raspi machines, during the sysbus reset the sd-card is not reset twice anymore but only once. This is consequence of switching both sysbus reset and changing parent to resettable; it detects the second reset is not needed. This has no impact on the state after reset; the sd-card reset method only reset local state and query information from the block backend. Signed-off-by: Damien Hedde Reviewed-by: Peter Maydell --- The raspi reset change can be observed by using the following command (reset will occurs, then do Ctrl-C to end qemu; no firmware is given here). qemu-system-aarch64 -M raspi3 \ -trace resettable_phase_hold_exec \ -trace qdev_update_parent_bus \ -trace resettable_change_parent \ -trace qdev_reset -trace qbus_reset Before the patch, the qdev/qbus_reset traces show when reset method are called. After the patch, the resettable_phase_hold_exec show when reset method are called. The traced reset order of the raspi3 is listed below. I've added empty lines and the tree structure. +->bcm2835-peripherals reset | | +->sd-card reset | +->sd-bus reset +->bcm2835_gpio reset | -> dev_update_parent_bus (move the sd-card on the sdhci-bus) | -> resettable_change_parent | +->bcm2835-dma reset | | +->bcm2835-sdhost-bus reset +->bcm2835-sdhost reset | | +->sd-card (reset ONLY BEFORE BEFORE THE PATCH) | +->sdhci-bus reset +->generic-sdhci reset | +->bcm2835-rng reset +->bcm2835-property reset +->bcm2835-fb reset +->bcm2835-mbox reset +->bcm2835-aux reset +->pl011 reset +->bcm2835-ic reset +->bcm2836-control reset System reset In both case, the sd-card is reset (being on bcm2835_gpio/sd-bus) then moved to generic-sdhci/sdhci-bus by the bcm2835_gpio reset method. Before the patch, it is then reset again being part of generic-sdhci/sdhci-= bus. After the patch, it considered again for reset but its reset method is not called because it is already flagged as reset. --- vl.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/vl.c b/vl.c index 4489cfb2bb..186f93e42f 100644 --- a/vl.c +++ b/vl.c @@ -4402,7 +4402,15 @@ int main(int argc, char **argv, char **envp) =20 /* TODO: once all bus devices are qdevified, this should be done * when bus is created by qdev.c */ - qemu_register_reset(qbus_reset_all_fn, sysbus_get_default()); + /* + * TODO: If we had a main 'reset container' that the whole system + * lived in, we could reset that using the multi-phase reset + * APIs. For the moment, we just reset the sysbus, which will cause + * all devices hanging off it (and all their child buses, recursively) + * to be reset. Note that this will *not* reset any Device objects + * which are not attached to some part of the qbus tree! + */ + qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default()); qemu_run_machine_init_done_notifiers(); =20 if (rom_check_and_register_reset() !=3D 0) { --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571412342774971.9954500705624; Fri, 18 Oct 2019 08:25:42 -0700 (PDT) Received: from localhost ([::1]:41736 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLU8L-0002zd-Gb for importer@patchew.org; Fri, 18 Oct 2019 11:25:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39404) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrk-0007LN-RD for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrj-0000V4-9c for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:32 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38760) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTrf-0000Hl-7c; Fri, 18 Oct 2019 11:08:27 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 9AB0396F5A; Fri, 18 Oct 2019 15:07:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411276; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zmmm1sUv204rKQzphLaIVatMJToXUpbV+y87KEeCwso=; b=QOw6bxRN8WI12bqXgliMPPlfmn26R3JrDL9RTU1SIRdB3FTo6YOxe93AgOE1c5Nyieur49 +6+uljuJ84lc5LhOawwXYCkW2MLK9ZNX3lcXKz2ZvKDgiCHGBYXNq3lX4WOnLQ2MIhoF09 d6loWpNe1JuBAETWydAkYawxDxtSQkg= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 11/13] hw/s390x/ipl: replace deprecated qdev_reset_all registration Date: Fri, 18 Oct 2019 17:06:28 +0200 Message-Id: <20191018150630.31099-12-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411276; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zmmm1sUv204rKQzphLaIVatMJToXUpbV+y87KEeCwso=; b=GVBuEHQay4s75OutKcgwxDgIhk+XvNA39cJBgynayIl0iiEZ9RdwtGNSuatwEoCd670sDe jM2xcQslqEms1W6LlAj0Z8BBGuwa3AvffxvKLWvGJ5dOouEJKLWdfmgj4b6xM3wbCnaP7a 63ZkoIASkOTa6o1Q5dbpMSB8LJ75wgE= ARC-Seal: i=1; s=mail; d=greensocs.com; t=1571411276; a=rsa-sha256; cv=none; b=3JVYI4h0l3T/eTtkZSoGnyKM8tHH3COEUwQsNHjrCHXz5XNiwrzo18KX+A4gn6e4uFfujs +gz4M+0FGI3H6Abr6MKi4P959VkV8hyqMrmFEZG7pZfTzCULqSPP9bt+1t8rS4IqSiwX3W is3IVsChNayyXjuAdcTj4p3RAoRI/qo= ARC-Authentication-Results: i=1; beetle.greensocs.com; none Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 5.135.226.135 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , peter.maydell@linaro.org, Thomas Huth , berrange@redhat.com, ehabkost@redhat.com, cohuck@redhat.com, mark.burton@greensocs.com, qemu-s390x@nongnu.org, Christian Borntraeger , edgari@xilinx.com, qemu-arm@nongnu.org, pbonzini@redhat.com, philmd@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Replace deprecated qdev_reset_all by resettable_cold_reset_fn for the ipl registration in the main reset handlers. This does not impact the behavior for the following reasons: + at this point resettable just call the old reset methods of devices and buses in the same order than qdev/qbus. + resettable handlers registered with qemu_register_reset are serialized; there is no interleaving. + eventual explicit calls to legacy reset API (device_reset or qdev/qbus_reset) inside this reset handler will not be masked out by resettable mechanism; they do not go through resettable api. Signed-off-by: Damien Hedde Reviewed-by: Cornelia Huck Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- Cc: Cornelia Huck Cc: qemu-s390x@nongnu.org Cc: Christian Borntraeger Cc: Thomas Huth --- hw/s390x/ipl.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c index ca544d64c5..2689f7a017 100644 --- a/hw/s390x/ipl.c +++ b/hw/s390x/ipl.c @@ -237,7 +237,15 @@ static void s390_ipl_realize(DeviceState *dev, Error *= *errp) */ ipl->compat_start_addr =3D ipl->start_addr; ipl->compat_bios_start_addr =3D ipl->bios_start_addr; - qemu_register_reset(qdev_reset_all_fn, dev); + /* + * Because this Device is not on any bus in the qbus tree (it is + * not a sysbus device and it's not on some other bus like a PCI + * bus) it will not be automatically reset by the 'reset the + * sysbus' hook registered by vl.c like most devices. So we must + * manually register a reset hook for it. + * TODO: there should be a better way to do this. + */ + qemu_register_reset(resettable_cold_reset_fn, dev); error: error_propagate(errp, err); } --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571412622055835.6466647764785; Fri, 18 Oct 2019 08:30:22 -0700 (PDT) Received: from localhost ([::1]:41824 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLUCp-0007fi-KJ for importer@patchew.org; Fri, 18 Oct 2019 11:30:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39405) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrk-0007LO-RZ for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrj-0000V6-9h for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:32 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38770) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTrg-0000IJ-2c; Fri, 18 Oct 2019 11:08:28 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 5EA0096F5B; Fri, 18 Oct 2019 15:07:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411276; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gw/9OjOWVXESU4gXuWgq3cSpDZKHiW1A6Qa07223tS4=; b=2Hgo1smBHJKc8hH1+ddEvD6r9ON4YMMnIVarKOxj5L3+p9n8LsJpDwTCW8tV7YcBhWdoT7 fRQHyZFS0PC7HNsmdFu/FssYrIWa021IECzz8t0sLIqbSjxb8piqkdp8J+DH8GY9Fq1ROr YY4O6nEYrA8sdhACNYqDxVX59xoQIDo= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 12/13] hw/gpio/bcm2835_gpio: Isolate sdbus reparenting Date: Fri, 18 Oct 2019 17:06:29 +0200 Message-Id: <20191018150630.31099-13-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411277; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gw/9OjOWVXESU4gXuWgq3cSpDZKHiW1A6Qa07223tS4=; b=vILmcuKtWURTOiXgVhIc1DaAORRjIFoK9qFn3iDtt0S/mAqbB6zFxQ338K4E9Z8unl3vJH SaPC4M28azmE93QjNljLUvn2KqT8Fim33dwpwqv0MEscKBYWAK35KY204tP4UXD2Rtl0na Sjwpf+NILNZV8thpW71rJaCc7qgVdEs= ARC-Seal: i=1; s=mail; d=greensocs.com; t=1571411277; a=rsa-sha256; cv=none; b=GG+rbZ0BOnJ8bWGzctqkp1pKCEFjSDCOtoYm24cvnreOkmGm5oSQkizw9t/Rc8mx5aq9kq srRtgIf86jy1deNJRkbk4UMtVIYRj1voUcuHpc+RerBXJd/r6E08AD2cKK+NwXJkIB1WAn B5sypCqfQmlP6Fku5vKY/yIQSvtp3Po= ARC-Authentication-Results: i=1; beetle.greensocs.com; none Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 5.135.226.135 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , peter.maydell@linaro.org, berrange@redhat.com, ehabkost@redhat.com, cohuck@redhat.com, mark.burton@greensocs.com, qemu-s390x@nongnu.org, Andrew Baumann , edgari@xilinx.com, qemu-arm@nongnu.org, pbonzini@redhat.com, philmd@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Split gpfsel_set() in 2 so that the sdbus reparenting is done in a dedicated function. Signed-off-by: Damien Hedde --- Cc: Peter Maydell Cc: Andrew Baumann Cc: Philippe Mathieu-Daud=C3=A9 Cc: qemu-arm@nongnu.org --- hw/gpio/bcm2835_gpio.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/gpio/bcm2835_gpio.c b/hw/gpio/bcm2835_gpio.c index 91ce3d10cc..81fe07132f 100644 --- a/hw/gpio/bcm2835_gpio.c +++ b/hw/gpio/bcm2835_gpio.c @@ -75,7 +75,10 @@ static void gpfsel_set(BCM2835GpioState *s, uint8_t reg,= uint32_t value) s->fsel[index] =3D fsel; } } +} =20 +static void gpfsel_update_sdbus(BCM2835GpioState *s) +{ /* SD controller selection (48-53) */ if (s->sd_fsel !=3D 0 && (s->fsel[48] =3D=3D 0) /* SD_CLK_R */ @@ -86,6 +89,7 @@ static void gpfsel_set(BCM2835GpioState *s, uint8_t reg, = uint32_t value) && (s->fsel[53] =3D=3D 0) /* SD_DATA3_R */ ) { /* SDHCI controller selected */ + sdbus_reparent_card(&s->sdbus, s->sdbus_sdhci); sdbus_reparent_card(s->sdbus_sdhost, s->sdbus_sdhci); s->sd_fsel =3D 0; } else if (s->sd_fsel !=3D 4 @@ -97,6 +101,7 @@ static void gpfsel_set(BCM2835GpioState *s, uint8_t reg,= uint32_t value) && (s->fsel[53] =3D=3D 4) /* SD_DATA3_R */ ) { /* SDHost controller selected */ + sdbus_reparent_card(&s->sdbus, s->sdbus_sdhost); sdbus_reparent_card(s->sdbus_sdhci, s->sdbus_sdhost); s->sd_fsel =3D 4; } @@ -210,6 +215,7 @@ static void bcm2835_gpio_write(void *opaque, hwaddr off= set, case GPFSEL4: case GPFSEL5: gpfsel_set(s, offset / 4, value); + gpfsel_update_sdbus(s); break; case GPSET0: gpset(s, value, 0, 32, &s->lev0); @@ -265,10 +271,12 @@ static void bcm2835_gpio_reset(DeviceState *dev) gpfsel_set(s, i, 0); } =20 - s->sd_fsel =3D 0; - - /* SDHCI is selected by default */ - sdbus_reparent_card(&s->sdbus, s->sdbus_sdhci); + /* + * Setup the right sdbus (put 1 in sd_fsel to force reparenting + * the sd). It will be SDHCI because of the gpfsel_set() above. + */ + s->sd_fsel =3D 1; + gpfsel_update_sdbus(s); =20 s->lev0 =3D 0; s->lev1 =3D 0; --=20 2.23.0 From nobody Mon May 6 06:48:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; arc=fail (BodyHash is different from the expected one) Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571412702485126.14461072746928; Fri, 18 Oct 2019 08:31:42 -0700 (PDT) Received: from localhost ([::1]:41860 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLUE9-0000L9-Bu for importer@patchew.org; Fri, 18 Oct 2019 11:31:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39421) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLTrm-0007Li-DA for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLTrl-0000Vq-8P for qemu-devel@nongnu.org; Fri, 18 Oct 2019 11:08:34 -0400 Received: from beetle.greensocs.com ([5.135.226.135]:38788) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iLTrg-0000J2-Sp; Fri, 18 Oct 2019 11:08:29 -0400 Received: from crumble.bar.greensocs.com (crumble.bar.greensocs.com [172.16.11.102]) by beetle.greensocs.com (Postfix) with ESMTPS id 3C82596F5C; Fri, 18 Oct 2019 15:07:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411277; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=csiJwmDDJ1X+h08zqd88vO2yIGi07AvaeJFvRK/uExA=; b=jt6EpsvItqPtYrND3cd2USeJTJWV4JJPUsOPBPDmu9PkmB2nAUuYxNwh+jJMJ9q1stQ8K4 gh2ShTgwIZeL2x3n2x4Vkn69ul/1t9wFGjWIJCAGbQyWjY+8b0k4FdI5Q4dhTsxrcg6x/W mQX65ZHl2CuBYl5nCa6vlSn+8peUZnU= From: Damien Hedde To: qemu-devel@nongnu.org Subject: [PATCH v5 13/13] hw/gpio/bcm2835_gpio: Update to resettable Date: Fri, 18 Oct 2019 17:06:30 +0200 Message-Id: <20191018150630.31099-14-damien.hedde@greensocs.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191018150630.31099-1-damien.hedde@greensocs.com> References: <20191018150630.31099-1-damien.hedde@greensocs.com> MIME-Version: 1.0 ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=greensocs.com; s=mail; t=1571411277; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=csiJwmDDJ1X+h08zqd88vO2yIGi07AvaeJFvRK/uExA=; b=bzg6srUUN146O1kBjWNa+dQxm2BTQ4HkIFB8ji4n0FkC1f6l1aCV1adG5STLSYD/9g+74K 515cUHzsQdJX/XSPQOoA1bhTOa4pZm7/KbgcJyCx+iGiiEg6Nr93QTWxwzlVzP8wJjcAsq 3V2XvVSb6ID7/ZeTFGClqzBS87PV5Qw= ARC-Seal: i=1; s=mail; d=greensocs.com; t=1571411277; a=rsa-sha256; cv=none; b=RNRVpJU3OFVN3KcsIrG7xkzeJd+qIG8iBGF+8vHZBHrEeibMwNFyj0DfkuJN+4WXF7ltsm RUVF6NPH7cgXiIxO01N/T4SYCpD2XYYxupBT/zDQX7hVrQ/I4sba/EAPnYvBVrGnBefxTi iapbvFnDNY8QAOx4FPy15L7jqMc+Y48= ARC-Authentication-Results: i=1; beetle.greensocs.com; none Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 5.135.226.135 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , peter.maydell@linaro.org, berrange@redhat.com, ehabkost@redhat.com, cohuck@redhat.com, mark.burton@greensocs.com, qemu-s390x@nongnu.org, Andrew Baumann , edgari@xilinx.com, qemu-arm@nongnu.org, pbonzini@redhat.com, philmd@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Transition the bcm2835_gpio device class to Resettable. The sdbus reparenting is delayed in hold phase to respect resettable side-effect rules. Signed-off-by: Damien Hedde Reviewed-by: Peter Maydell --- Cc: Peter Maydell Cc: Andrew Baumann Cc: Philippe Mathieu-Daud=C3=A9 Cc: qemu-arm@nongnu.org --- hw/gpio/bcm2835_gpio.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/hw/gpio/bcm2835_gpio.c b/hw/gpio/bcm2835_gpio.c index 81fe07132f..24e39eac5e 100644 --- a/hw/gpio/bcm2835_gpio.c +++ b/hw/gpio/bcm2835_gpio.c @@ -262,24 +262,29 @@ err_out: __func__, offset); } =20 -static void bcm2835_gpio_reset(DeviceState *dev) +static void bcm2835_gpio_reset_enter(Object *obj, ResetType type) { - BCM2835GpioState *s =3D BCM2835_GPIO(dev); + BCM2835GpioState *s =3D BCM2835_GPIO(obj); =20 int i; for (i =3D 0; i < 6; i++) { gpfsel_set(s, i, 0); } =20 + s->lev0 =3D 0; + s->lev1 =3D 0; +} + +static void bcm2835_gpio_reset_hold(Object *obj) +{ + BCM2835GpioState *s =3D BCM2835_GPIO(obj); /* * Setup the right sdbus (put 1 in sd_fsel to force reparenting - * the sd). It will be SDHCI because of the gpfsel_set() above. + * the sd). It will be SDHCI because of the gpfsel_set() done + * in bcm2835_gpio_reset_enter(). */ s->sd_fsel =3D 1; gpfsel_update_sdbus(s); - - s->lev0 =3D 0; - s->lev1 =3D 0; } =20 static const MemoryRegionOps bcm2835_gpio_ops =3D { @@ -342,10 +347,12 @@ static void bcm2835_gpio_realize(DeviceState *dev, Er= ror **errp) static void bcm2835_gpio_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); + ResettableClass *rc =3D RESETTABLE_CLASS(klass); =20 dc->vmsd =3D &vmstate_bcm2835_gpio; dc->realize =3D &bcm2835_gpio_realize; - dc->reset =3D &bcm2835_gpio_reset; + rc->phases.enter =3D &bcm2835_gpio_reset_enter; + rc->phases.hold =3D &bcm2835_gpio_reset_hold; } =20 static const TypeInfo bcm2835_gpio_info =3D { --=20 2.23.0