From nobody Mon Feb 9 08:56:02 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571175713; cv=none; d=zoho.com; s=zohoarc; b=dbfU81i+q17Rchdg9nXpC5hD2r7qdduLVPhRRojX7x4oHAwJT6sB4Afdi1V1MpCIUNYkdGYsKAtuK22SjLoYZLMQeOwHWaF8awAKDniZbzn66TcjUzlTXEbCk2p/Oc9MpfjkSZflAmeOMxXFbZOzh6duI2KzLg4rdctIN4Plfik= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571175713; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=s1o0RaIKTbcefdGP4qngVq4vMraG0Pp3etXQe8x2+Zs=; b=LmGCjBX9yy1PdbXHoFhTdjwDF56LQ8eZkULECbPahwKETsshTJz7q96TZYXJTRZ/xwROOH8Dr2EU+S5lIX2A3IozWPKkj7EJUtpyNuZ6SeIFRC54HbiMtzovg56wIdoraaqT5S7zdfHsqBngeWc19TsJnbKi3pryqbLpYowQIKk= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571175713136267.2343646565414; Tue, 15 Oct 2019 14:41:53 -0700 (PDT) Received: from localhost ([::1]:60020 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUZj-0001pw-Ml for importer@patchew.org; Tue, 15 Oct 2019 17:41:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59938) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUWI-0005Vl-V3 for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUWH-0006kp-UV for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:18 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44722) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUWH-0006ka-Ox for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:17 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EE304307D974; Tue, 15 Oct 2019 21:38:16 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 826F860BE2; Tue, 15 Oct 2019 21:38:14 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 07/18] hw/ide/sii3112: Convert reset handler to DeviceReset Date: Tue, 15 Oct 2019 18:37:34 -0300 Message-Id: <20191015213745.22174-8-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Tue, 15 Oct 2019 21:38:17 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The SiI3112A SATA controller is a PCI device, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-5-philmd@redhat.com> Signed-off-by: Eduardo Habkost --- hw/ide/sii3112.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c index 2181260531..06605d7af2 100644 --- a/hw/ide/sii3112.c +++ b/hw/ide/sii3112.c @@ -15,7 +15,6 @@ #include "qemu/osdep.h" #include "hw/ide/pci.h" #include "qemu/module.h" -#include "sysemu/reset.h" #include "trace.h" =20 #define TYPE_SII3112_PCI "sii3112" @@ -237,9 +236,9 @@ static void sii3112_set_irq(void *opaque, int channel, = int level) sii3112_update_irq(s); } =20 -static void sii3112_reset(void *opaque) +static void sii3112_reset(DeviceState *dev) { - SiI3112PCIState *s =3D opaque; + SiI3112PCIState *s =3D SII3112_PCI(dev); int i; =20 for (i =3D 0; i < 2; i++) { @@ -290,7 +289,6 @@ static void sii3112_pci_realize(PCIDevice *dev, Error *= *errp) s->bmdma[i].bus =3D &s->bus[i]; ide_register_restart_cb(&s->bus[i]); } - qemu_register_reset(sii3112_reset, s); } =20 static void sii3112_pci_class_init(ObjectClass *klass, void *data) @@ -303,6 +301,7 @@ static void sii3112_pci_class_init(ObjectClass *klass, = void *data) pd->class_id =3D PCI_CLASS_STORAGE_RAID; pd->revision =3D 1; pd->realize =3D sii3112_pci_realize; + dc->reset =3D sii3112_reset; dc->desc =3D "SiI3112A SATA controller"; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); } --=20 2.21.0