From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571175705; cv=none; d=zoho.com; s=zohoarc; b=mkex05dM+JhmPNYuMBrkMzmyi9YLGCRF1cC+Xl37UK1LNLdfQNeoCa3D7vDpIb7aigo5ymMH/j5l3to4Nf+9+noKZAl+yzFSNIfOa8cJv3UbslJlNp4PZjNFfeA4nEahYuLSbuhG0vJnmXGZHn6WfzONsnoAeUXx2XiBEUYVtAo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571175705; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=pq+YeBFsmTFj0GMTrzraAYCkyOjCO0Rk0UnBb0Y7AVg=; b=aqqjnKUxpUY9is7urMYhs1qq1EI2UlZCjIx5aDq6hl4oI/BPiqPOPL3b4iHufw+3Mz8i+GOpZM2jX1lXqDpX6YSw/1PDOMUM2trNxLs/EW0vvPFj9DJNnTZH2K3nuXWREEMnnPmdufjYN75HJqyZx3S10mGjsEG3cmQhPXi4B50= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571175705356561.8362425679322; Tue, 15 Oct 2019 14:41:45 -0700 (PDT) Received: from localhost ([::1]:60012 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUZZ-0001Zl-Gh for importer@patchew.org; Tue, 15 Oct 2019 17:41:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59807) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUVs-0004ox-6h for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:37:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUVq-0006fX-Sj for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:37:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39784) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUVq-0006fL-Ke for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:37:50 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BC30A18C893A; Tue, 15 Oct 2019 21:37:49 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5B5365C231; Tue, 15 Oct 2019 21:37:49 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 01/18] tests: add qtest_qmp_device_add_qdict() helper Date: Tue, 15 Oct 2019 18:37:28 -0300 Message-Id: <20191015213745.22174-2-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Tue, 15 Oct 2019 21:37:49 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Add an API that takes QDict directly, so users could skip steps of first building json dictionary and converting it back to QDict in existing qtest_qmp_device_add() and instead use QDict directly without intermediate conversion. Signed-off-by: Igor Mammedov Message-Id: <20190830110723.15096-2-imammedo@redhat.com> Signed-off-by: Eduardo Habkost --- tests/libqtest.h | 12 ++++++++++++ tests/libqtest.c | 29 +++++++++++++++++++---------- 2 files changed, 31 insertions(+), 10 deletions(-) diff --git a/tests/libqtest.h b/tests/libqtest.h index a177e502d9..c9e21e05b3 100644 --- a/tests/libqtest.h +++ b/tests/libqtest.h @@ -659,6 +659,18 @@ QDict *qmp_fd(int fd, const char *fmt, ...) GCC_FMT_AT= TR(2, 3); void qtest_cb_for_every_machine(void (*cb)(const char *machine), bool skip_old_versioned); =20 +/** + * qtest_qmp_device_add_qdict: + * @qts: QTestState instance to operate on + * @drv: Name of the device that should be added + * @arguments: QDict with properties for the device to intialize + * + * Generic hot-plugging test via the device_add QMP command with properties + * supplied in form of QDict. Use NULL for empty properties list. + */ +void qtest_qmp_device_add_qdict(QTestState *qts, const char *drv, + const QDict *arguments); + /** * qtest_qmp_device_add: * @qts: QTestState instance to operate on diff --git a/tests/libqtest.c b/tests/libqtest.c index 38e4f5b587..3706bccd8d 100644 --- a/tests/libqtest.c +++ b/tests/libqtest.c @@ -1243,28 +1243,37 @@ QDict *qtest_qmp_receive_success(QTestState *s, } =20 /* - * Generic hot-plugging test via the device_add QMP command. + * Generic hot-plugging test via the device_add QMP commands. */ +void qtest_qmp_device_add_qdict(QTestState *qts, const char *drv, + const QDict *arguments) +{ + QDict *resp; + QDict *args =3D arguments ? qdict_clone_shallow(arguments) : qdict_new= (); + + g_assert(!qdict_haskey(args, "driver")); + qdict_put_str(args, "driver", drv); + resp =3D qtest_qmp(qts, "{'execute': 'device_add', 'arguments': %p}", = args); + g_assert(resp); + g_assert(!qdict_haskey(resp, "event")); /* We don't expect any events = */ + g_assert(!qdict_haskey(resp, "error")); + qobject_unref(resp); +} + void qtest_qmp_device_add(QTestState *qts, const char *driver, const char = *id, const char *fmt, ...) { - QDict *args, *response; + QDict *args; va_list ap; =20 va_start(ap, fmt); args =3D qdict_from_vjsonf_nofail(fmt, ap); va_end(ap); =20 - g_assert(!qdict_haskey(args, "driver") && !qdict_haskey(args, "id")); - qdict_put_str(args, "driver", driver); + g_assert(!qdict_haskey(args, "id")); qdict_put_str(args, "id", id); =20 - response =3D qtest_qmp(qts, "{'execute': 'device_add', 'arguments': %p= }", - args); - g_assert(response); - g_assert(!qdict_haskey(response, "event")); /* We don't expect any eve= nts */ - g_assert(!qdict_haskey(response, "error")); - qobject_unref(response); + qtest_qmp_device_add_qdict(qts, driver, args); } =20 static void device_deleted_cb(void *opaque, const char *name, QDict *data) --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Tue, 15 Oct 2019 17:37:52 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BCC2830860D7; Tue, 15 Oct 2019 21:37:51 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5985F5C541; Tue, 15 Oct 2019 21:37:51 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 02/18] tests: cpu-plug-test: fix device_add for pc/q35 machines Date: Tue, 15 Oct 2019 18:37:29 -0300 Message-Id: <20191015213745.22174-3-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Tue, 15 Oct 2019 21:37:51 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Igor Mammedov Commit bc1fb850a3 silently broke device_add test for CPU hotplug which resulted in test successfully passing though it wasn't actually run. Fix it by making sure that all non present CPUs reported by "query-hotpluggable-cpus" are hotplugged instead of making up and hardcoding values. Use of query-hotpluggable-cpus also allows consolidatiate device_add cpu testcases and reuse the same test function for all targets. While at it also add a check that at least one CPU was hotplugged, to avoid silent breakage in the future. Fixes: bc1fb850a3 (vl.c deprecate incorrect CPUs topology) Signed-off-by: Igor Mammedov Message-Id: <20190830110723.15096-3-imammedo@redhat.com> Signed-off-by: Eduardo Habkost --- tests/cpu-plug-test.c | 62 ++++++++++++++++++------------------------- 1 file changed, 26 insertions(+), 36 deletions(-) diff --git a/tests/cpu-plug-test.c b/tests/cpu-plug-test.c index 776407e1b6..058cef5ac1 100644 --- a/tests/cpu-plug-test.c +++ b/tests/cpu-plug-test.c @@ -12,6 +12,7 @@ #include "qemu-common.h" #include "libqtest-single.h" #include "qapi/qmp/qdict.h" +#include "qapi/qmp/qlist.h" =20 struct PlugTestData { char *machine; @@ -72,12 +73,15 @@ static void test_plug_without_cpu_add(gconstpointer dat= a) g_free(args); } =20 -static void test_plug_with_device_add_x86(gconstpointer data) +static void test_plug_with_device_add(gconstpointer data) { const PlugTestData *td =3D data; char *args; - unsigned int s, c, t; QTestState *qts; + QDict *resp; + QList *cpus; + QObject *e; + int hotplugged =3D 0; =20 args =3D g_strdup_printf("-machine %s -cpu %s " "-smp 1,sockets=3D%u,cores=3D%u,threads=3D%u,ma= xcpus=3D%u", @@ -85,43 +89,29 @@ static void test_plug_with_device_add_x86(gconstpointer= data) td->sockets, td->cores, td->threads, td->maxcpu= s); qts =3D qtest_init(args); =20 - for (s =3D 1; s < td->sockets; s++) { - for (c =3D 0; c < td->cores; c++) { - for (t =3D 0; t < td->threads; t++) { - char *id =3D g_strdup_printf("id-%i-%i-%i", s, c, t); - qtest_qmp_device_add(qts, td->device_model, id, - "{'socket-id':%u, 'core-id':%u," - " 'thread-id':%u}", - s, c, t); - g_free(id); - } - } - } + resp =3D qtest_qmp(qts, "{ 'execute': 'query-hotpluggable-cpus'}"); + g_assert(qdict_haskey(resp, "return")); + cpus =3D qdict_get_qlist(resp, "return"); + g_assert(cpus); =20 - qtest_quit(qts); - g_free(args); -} + while ((e =3D qlist_pop(cpus))) { + const QDict *cpu, *props; =20 -static void test_plug_with_device_add_coreid(gconstpointer data) -{ - const PlugTestData *td =3D data; - char *args; - unsigned int c; - QTestState *qts; + cpu =3D qobject_to(QDict, e); + if (qdict_haskey(cpu, "qom-path")) { + continue; + } =20 - args =3D g_strdup_printf("-machine %s -cpu %s " - "-smp 1,sockets=3D%u,cores=3D%u,threads=3D%u,ma= xcpus=3D%u", - td->machine, td->cpu_model, - td->sockets, td->cores, td->threads, td->maxcpu= s); - qts =3D qtest_init(args); + g_assert(qdict_haskey(cpu, "props")); + props =3D qdict_get_qdict(cpu, "props"); =20 - for (c =3D 1; c < td->cores; c++) { - char *id =3D g_strdup_printf("id-%i", c); - qtest_qmp_device_add(qts, td->device_model, id, - "{'core-id':%u}", c); - g_free(id); + qtest_qmp_device_add_qdict(qts, td->device_model, props); + hotplugged++; } =20 + /* make sure that there were hotplugged CPUs */ + g_assert(hotplugged); + qobject_unref(resp); qtest_quit(qts); g_free(args); } @@ -182,7 +172,7 @@ static void add_pc_test_case(const char *mname) path =3D g_strdup_printf("cpu-plug/%s/device-add/%ux%ux%u&maxcpus= =3D%u", mname, data2->sockets, data2->cores, data2->threads, data2->maxcpus); - qtest_add_data_func_full(path, data2, test_plug_with_device_add_x8= 6, + qtest_add_data_func_full(path, data2, test_plug_with_device_add, test_data_free); g_free(path); } @@ -209,7 +199,7 @@ static void add_pseries_test_case(const char *mname) path =3D g_strdup_printf("cpu-plug/%s/device-add/%ux%ux%u&maxcpus=3D%u= ", mname, data->sockets, data->cores, data->threads, data->maxcpus); - qtest_add_data_func_full(path, data, test_plug_with_device_add_coreid, + qtest_add_data_func_full(path, data, test_plug_with_device_add, test_data_free); g_free(path); } @@ -246,7 +236,7 @@ static void add_s390x_test_case(const char *mname) path =3D g_strdup_printf("cpu-plug/%s/device-add/%ux%ux%u&maxcpus=3D%u= ", mname, data2->sockets, data2->cores, data2->threads, data2->maxcpus); - qtest_add_data_func_full(path, data2, test_plug_with_device_add_coreid, + qtest_add_data_func_full(path, data2, test_plug_with_device_add, test_data_free); g_free(path); } --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Tue, 15 Oct 2019 17:37:55 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0E44B3082231; Tue, 15 Oct 2019 21:37:54 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5F77F5D70D; Tue, 15 Oct 2019 21:37:53 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 03/18] numa: Introduce MachineClass::auto_enable_numa for implicit NUMA node Date: Tue, 15 Oct 2019 18:37:30 -0300 Message-Id: <20191015213745.22174-4-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Tue, 15 Oct 2019 21:37:54 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tao Xu , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Tao Xu Add MachineClass::auto_enable_numa field. When it is true, a NUMA node is expected to be created implicitly. Acked-by: David Gibson Suggested-by: Igor Mammedov Suggested-by: Eduardo Habkost Reviewed-by: Igor Mammedov Signed-off-by: Tao Xu Message-Id: <20190905083238.1799-1-tao3.xu@intel.com> Signed-off-by: Eduardo Habkost --- include/hw/boards.h | 1 + hw/core/numa.c | 10 ++++++++-- hw/ppc/spapr.c | 9 +-------- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/include/hw/boards.h b/include/hw/boards.h index be18a5c032..de45087f34 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -228,6 +228,7 @@ struct MachineClass { bool smbus_no_migration_support; bool nvdimm_supported; bool numa_mem_supported; + bool auto_enable_numa; =20 HotplugHandler *(*get_hotplug_handler)(MachineState *machine, DeviceState *dev); diff --git a/hw/core/numa.c b/hw/core/numa.c index 4dfec5c95b..038c96d4ab 100644 --- a/hw/core/numa.c +++ b/hw/core/numa.c @@ -378,11 +378,17 @@ void numa_complete_configuration(MachineState *ms) * guest tries to use it with that drivers. * * Enable NUMA implicitly by adding a new NUMA node automatically. + * + * Or if MachineClass::auto_enable_numa is true and no NUMA nodes, + * assume there is just one node with whole RAM. */ - if (ms->ram_slots > 0 && ms->numa_state->num_nodes =3D=3D 0 && - mc->auto_enable_numa_with_memhp) { + if (ms->numa_state->num_nodes =3D=3D 0 && + ((ms->ram_slots > 0 && + mc->auto_enable_numa_with_memhp) || + mc->auto_enable_numa)) { NumaNodeOptions node =3D { }; parse_numa_node(ms, &node, &error_abort); + numa_info[0].node_mem =3D ram_size; } =20 assert(max_numa_nodeid <=3D MAX_NODES); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 514a17ae74..4eb97d3a9b 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -346,14 +346,6 @@ static int spapr_populate_memory(SpaprMachineState *sp= apr, void *fdt) hwaddr mem_start, node_size; int i, nb_nodes =3D machine->numa_state->num_nodes; NodeInfo *nodes =3D machine->numa_state->nodes; - NodeInfo ramnode; - - /* No NUMA nodes, assume there is just one node with whole RAM */ - if (!nb_nodes) { - nb_nodes =3D 1; - ramnode.node_mem =3D machine->ram_size; - nodes =3D &ramnode; - } =20 for (i =3D 0, mem_start =3D 0; i < nb_nodes; ++i) { if (!nodes[i].node_mem) { @@ -4430,6 +4422,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; mc->numa_mem_supported =3D true; + mc->auto_enable_numa =3D true; =20 smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571175584; cv=none; d=zoho.com; s=zohoarc; b=LOmfEvizjquE5sLyFb59reVEJb64YbVahQ1NU2gal+U8pPSLTREmI/xGhIxT9lraiPpbtsjGXjhf3OM6UU5SDTIFPdBy1tknW4aLRYFSkVMP7rqeSzbFTZPoxQNUG9P2ZMI6oaXuWeZ5gkps3LoTXbkQ5hjochMdGAdee6cpU1w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571175584; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Tue, 15 Oct 2019 17:38:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUW2-0006hS-9G for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41530) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUW2-0006hH-3O for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:02 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4EBCF195D84B; Tue, 15 Oct 2019 21:38:01 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id B35475D9E2; Tue, 15 Oct 2019 21:37:55 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 04/18] hw/acpi/piix4: Convert reset handler to DeviceReset Date: Tue, 15 Oct 2019 18:37:31 -0300 Message-Id: <20191015213745.22174-5-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.62]); Tue, 15 Oct 2019 21:38:01 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The PIIX4/PM is a PCI device within the PIIX4 chipset, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Reviewed-by: Igor Mammedov Reviewed-by: Li Qiang Reviewed-by: Michael S. Tsirkin Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-2-philmd@redhat.com> Signed-off-by: Eduardo Habkost --- hw/acpi/piix4.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index 5742c3df87..4e079b39bd 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -27,7 +27,6 @@ #include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "hw/acpi/acpi.h" -#include "sysemu/reset.h" #include "sysemu/runstate.h" #include "sysemu/sysemu.h" #include "qapi/error.h" @@ -344,9 +343,9 @@ static const VMStateDescription vmstate_acpi =3D { } }; =20 -static void piix4_reset(void *opaque) +static void piix4_pm_reset(DeviceState *dev) { - PIIX4PMState *s =3D opaque; + PIIX4PMState *s =3D PIIX4_PM(dev); PCIDevice *d =3D PCI_DEVICE(s); uint8_t *pci_conf =3D d->config; =20 @@ -542,7 +541,6 @@ static void piix4_pm_realize(PCIDevice *dev, Error **er= rp) =20 s->machine_ready.notify =3D piix4_pm_machine_ready; qemu_add_machine_init_done_notifier(&s->machine_ready); - qemu_register_reset(piix4_reset, s); =20 piix4_acpi_system_hot_add_init(pci_address_space_io(dev), pci_get_bus(dev), s); @@ -692,6 +690,7 @@ static void piix4_pm_class_init(ObjectClass *klass, voi= d *data) k->device_id =3D PCI_DEVICE_ID_INTEL_82371AB_3; k->revision =3D 0x03; k->class_id =3D PCI_CLASS_BRIDGE_OTHER; + dc->reset =3D piix4_pm_reset; dc->desc =3D "PM"; dc->vmsd =3D &vmstate_acpi; dc->props =3D piix4_pm_properties; --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571175709; 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Tue, 15 Oct 2019 21:38:05 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id E57EB60C5D; Tue, 15 Oct 2019 21:38:02 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 05/18] hw/isa/piix4: Convert reset handler to DeviceReset Date: Tue, 15 Oct 2019 18:37:32 -0300 Message-Id: <20191015213745.22174-6-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Tue, 15 Oct 2019 21:38:06 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The PIIX4/ISA is a PCI device within the PIIX4 chipset, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-3-philmd@redhat.com> Signed-off-by: Eduardo Habkost --- hw/isa/piix4.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 3294056cd5..890d999abf 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -28,7 +28,6 @@ #include "hw/isa/isa.h" #include "hw/sysbus.h" #include "migration/vmstate.h" -#include "sysemu/reset.h" =20 PCIDevice *piix4_dev; =20 @@ -40,9 +39,9 @@ typedef struct PIIX4State { #define PIIX4_PCI_DEVICE(obj) \ OBJECT_CHECK(PIIX4State, (obj), TYPE_PIIX4_PCI_DEVICE) =20 -static void piix4_reset(void *opaque) +static void piix4_isa_reset(DeviceState *dev) { - PIIX4State *d =3D opaque; + PIIX4State *d =3D PIIX4_PCI_DEVICE(dev); uint8_t *pci_conf =3D d->dev.config; =20 pci_conf[0x04] =3D 0x07; // master, memory and I/O @@ -97,7 +96,6 @@ static void piix4_realize(PCIDevice *dev, Error **errp) return; } piix4_dev =3D &d->dev; - qemu_register_reset(piix4_reset, d); } =20 int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn) @@ -118,6 +116,7 @@ static void piix4_class_init(ObjectClass *klass, void *= data) k->vendor_id =3D PCI_VENDOR_ID_INTEL; k->device_id =3D PCI_DEVICE_ID_INTEL_82371AB_0; k->class_id =3D PCI_CLASS_BRIDGE_ISA; + dc->reset =3D piix4_isa_reset; dc->desc =3D "ISA bridge"; dc->vmsd =3D &vmstate_piix4; /* --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571176068; cv=none; d=zoho.com; s=zohoarc; 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Tue, 15 Oct 2019 21:38:12 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id DB15260852; Tue, 15 Oct 2019 21:38:07 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 06/18] hw/ide/piix: Convert reset handler to DeviceReset Date: Tue, 15 Oct 2019 18:37:33 -0300 Message-Id: <20191015213745.22174-7-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Tue, 15 Oct 2019 21:38:12 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The PIIX/IDE is a PCI device within a PIIX chipset, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-4-philmd@redhat.com> Reviewed-by: Li Qiang Signed-off-by: Eduardo Habkost --- hw/ide/piix.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index fba6bc8bff..db313dd3b1 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -30,7 +30,6 @@ #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" #include "sysemu/dma.h" -#include "sysemu/reset.h" =20 #include "hw/ide/pci.h" #include "trace.h" @@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d) } } =20 -static void piix3_reset(void *opaque) +static void piix_ide_reset(DeviceState *dev) { - PCIIDEState *d =3D opaque; + PCIIDEState *d =3D PCI_IDE(dev); PCIDevice *pd =3D PCI_DEVICE(d); uint8_t *pci_conf =3D pd->config; int i; @@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error = **errp) =20 pci_conf[PCI_CLASS_PROG] =3D 0x80; // legacy ATA mode =20 - qemu_register_reset(piix3_reset, d); - bmdma_setup_bar(d); pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); =20 @@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass, vo= id *data) DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 + dc->reset =3D piix_ide_reset; k->realize =3D pci_piix_ide_realize; k->exit =3D pci_piix_ide_exitfn; k->vendor_id =3D PCI_VENDOR_ID_INTEL; @@ -273,6 +271,7 @@ static void piix4_ide_class_init(ObjectClass *klass, vo= id *data) DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 + dc->reset =3D piix_ide_reset; k->realize =3D pci_piix_ide_realize; k->exit =3D pci_piix_ide_exitfn; k->vendor_id =3D PCI_VENDOR_ID_INTEL; --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tue, 15 Oct 2019 17:38:17 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EE304307D974; Tue, 15 Oct 2019 21:38:16 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 826F860BE2; Tue, 15 Oct 2019 21:38:14 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 07/18] hw/ide/sii3112: Convert reset handler to DeviceReset Date: Tue, 15 Oct 2019 18:37:34 -0300 Message-Id: <20191015213745.22174-8-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Tue, 15 Oct 2019 21:38:17 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The SiI3112A SATA controller is a PCI device, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-5-philmd@redhat.com> Signed-off-by: Eduardo Habkost --- hw/ide/sii3112.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c index 2181260531..06605d7af2 100644 --- a/hw/ide/sii3112.c +++ b/hw/ide/sii3112.c @@ -15,7 +15,6 @@ #include "qemu/osdep.h" #include "hw/ide/pci.h" #include "qemu/module.h" -#include "sysemu/reset.h" #include "trace.h" =20 #define TYPE_SII3112_PCI "sii3112" @@ -237,9 +236,9 @@ static void sii3112_set_irq(void *opaque, int channel, = int level) sii3112_update_irq(s); } =20 -static void sii3112_reset(void *opaque) +static void sii3112_reset(DeviceState *dev) { - SiI3112PCIState *s =3D opaque; + SiI3112PCIState *s =3D SII3112_PCI(dev); int i; =20 for (i =3D 0; i < 2; i++) { @@ -290,7 +289,6 @@ static void sii3112_pci_realize(PCIDevice *dev, Error *= *errp) s->bmdma[i].bus =3D &s->bus[i]; ide_register_restart_cb(&s->bus[i]); } - qemu_register_reset(sii3112_reset, s); } =20 static void sii3112_pci_class_init(ObjectClass *klass, void *data) @@ -303,6 +301,7 @@ static void sii3112_pci_class_init(ObjectClass *klass, = void *data) pd->class_id =3D PCI_CLASS_STORAGE_RAID; pd->revision =3D 1; pd->realize =3D sii3112_pci_realize; + dc->reset =3D sii3112_reset; dc->desc =3D "SiI3112A SATA controller"; set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); } --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571175887; 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Tue, 15 Oct 2019 21:38:21 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8A0495C28F; Tue, 15 Oct 2019 21:38:18 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 08/18] hw/ide/via82c: Convert reset handler to DeviceReset Date: Tue, 15 Oct 2019 18:37:35 -0300 Message-Id: <20191015213745.22174-9-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.64]); Tue, 15 Oct 2019 21:38:21 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The VIA82C686B IDE controller is a PCI device, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-6-philmd@redhat.com> Signed-off-by: Eduardo Habkost --- hw/ide/via.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/hw/ide/via.c b/hw/ide/via.c index 7087dc676e..053622bd82 100644 --- a/hw/ide/via.c +++ b/hw/ide/via.c @@ -29,7 +29,6 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "sysemu/dma.h" -#include "sysemu/reset.h" =20 #include "hw/ide/pci.h" #include "trace.h" @@ -120,10 +119,10 @@ static void via_ide_set_irq(void *opaque, int n, int = level) } } =20 -static void via_ide_reset(void *opaque) +static void via_ide_reset(DeviceState *dev) { - PCIIDEState *d =3D opaque; - PCIDevice *pd =3D PCI_DEVICE(d); + PCIIDEState *d =3D PCI_IDE(dev); + PCIDevice *pd =3D PCI_DEVICE(dev); uint8_t *pci_conf =3D pd->config; int i; =20 @@ -172,8 +171,6 @@ static void via_ide_realize(PCIDevice *dev, Error **err= p) pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); dev->wmask[PCI_INTERRUPT_LINE] =3D 0xf; =20 - qemu_register_reset(via_ide_reset, d); - memory_region_init_io(&d->data_bar[0], OBJECT(d), &pci_ide_data_le_ops, &d->bus[0], "via-ide0-data", 8); pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &d->data_bar[0]); @@ -229,6 +226,7 @@ static void via_ide_class_init(ObjectClass *klass, void= *data) DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 + dc->reset =3D via_ide_reset; k->realize =3D via_ide_realize; k->exit =3D via_ide_exitfn; k->vendor_id =3D PCI_VENDOR_ID_VIA; --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571176290120342.7202601956084; Tue, 15 Oct 2019 14:51:30 -0700 (PDT) Received: from localhost ([::1]:60124 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUix-0004SL-Ly for importer@patchew.org; Tue, 15 Oct 2019 17:51:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59970) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUWS-0005oj-5Z for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUWR-0006nL-3Z for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44564) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUWQ-0006n4-U8 for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:27 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 20B8173A60; Tue, 15 Oct 2019 21:38:26 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 209D25D9E2; Tue, 15 Oct 2019 21:38:22 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 09/18] hw/isa/vt82c686: Convert reset handler to DeviceReset Date: Tue, 15 Oct 2019 18:37:36 -0300 Message-Id: <20191015213745.22174-10-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Tue, 15 Oct 2019 21:38:26 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The VIA VT82C686 Southbridge is a PCI device, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-7-philmd@redhat.com> Signed-off-by: Eduardo Habkost --- hw/isa/vt82c686.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 50bd28fa82..616f67f347 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -23,7 +23,6 @@ #include "hw/isa/apm.h" #include "hw/acpi/acpi.h" #include "hw/i2c/pm_smbus.h" -#include "sysemu/reset.h" #include "qemu/module.h" #include "qemu/timer.h" #include "exec/address-spaces.h" @@ -116,11 +115,10 @@ static const MemoryRegionOps superio_ops =3D { }, }; =20 -static void vt82c686b_reset(void * opaque) +static void vt82c686b_isa_reset(DeviceState *dev) { - PCIDevice *d =3D opaque; - uint8_t *pci_conf =3D d->config; - VT82C686BState *vt82c =3D VT82C686B_DEVICE(d); + VT82C686BState *vt82c =3D VT82C686B_DEVICE(dev); + uint8_t *pci_conf =3D vt82c->dev.config; =20 pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0); pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMO= RY | @@ -476,8 +474,6 @@ static void vt82c686b_realize(PCIDevice *d, Error **err= p) * But we do not emulate a floppy, so just set it here. */ memory_region_add_subregion(isa_bus->address_space_io, 0x3f0, &vt82c->superio); - - qemu_register_reset(vt82c686b_reset, d); } =20 ISABus *vt82c686b_isa_init(PCIBus *bus, int devfn) @@ -501,6 +497,7 @@ static void via_class_init(ObjectClass *klass, void *da= ta) k->device_id =3D PCI_DEVICE_ID_VIA_ISA_BRIDGE; k->class_id =3D PCI_CLASS_BRIDGE_ISA; k->revision =3D 0x40; + dc->reset =3D vt82c686b_isa_reset; dc->desc =3D "ISA bridge"; dc->vmsd =3D &vmstate_via; /* --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; 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Tue, 15 Oct 2019 17:38:29 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 41B2CA3CD8B; Tue, 15 Oct 2019 21:38:28 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id CE5EB5C28F; Tue, 15 Oct 2019 21:38:27 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 10/18] hw/input/lm832x: Convert reset handler to DeviceReset Date: Tue, 15 Oct 2019 18:37:37 -0300 Message-Id: <20191015213745.22174-11-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.68]); Tue, 15 Oct 2019 21:38:28 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The LM8323 key-scan controller is a I2C device, it will be reset when the I2C bus it stands on is reset. Convert its reset handler into a proper Device reset method. Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-8-philmd@redhat.com> Signed-off-by: Eduardo Habkost --- hw/input/lm832x.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/hw/input/lm832x.c b/hw/input/lm832x.c index a37eb854b9..aa629ddbf1 100644 --- a/hw/input/lm832x.c +++ b/hw/input/lm832x.c @@ -24,7 +24,6 @@ #include "migration/vmstate.h" #include "qemu/module.h" #include "qemu/timer.h" -#include "sysemu/reset.h" #include "ui/console.h" =20 #define TYPE_LM8323 "lm8323" @@ -94,8 +93,10 @@ static void lm_kbd_gpio_update(LM823KbdState *s) { } =20 -static void lm_kbd_reset(LM823KbdState *s) +static void lm_kbd_reset(DeviceState *dev) { + LM823KbdState *s =3D LM8323(dev); + s->config =3D 0x80; s->status =3D INT_NOINIT; s->acttime =3D 125; @@ -273,7 +274,7 @@ static void lm_kbd_write(LM823KbdState *s, int reg, int= byte, uint8_t value) =20 case LM832x_CMD_RESET: if (value =3D=3D 0xaa) - lm_kbd_reset(s); + lm_kbd_reset(DEVICE(s)); else lm_kbd_error(s, ERR_BADPAR); s->reg =3D LM832x_GENERAL_ERROR; @@ -476,10 +477,6 @@ static void lm8323_realize(DeviceState *dev, Error **e= rrp) s->pwm.tm[1] =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm1_tick, s); s->pwm.tm[2] =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, lm_kbd_pwm2_tick, s); qdev_init_gpio_out(dev, &s->nirq, 1); - - lm_kbd_reset(s); - - qemu_register_reset((void *) lm_kbd_reset, s); } =20 void lm832x_key_event(DeviceState *dev, int key, int state) @@ -507,6 +504,7 @@ static void lm8323_class_init(ObjectClass *klass, void = *data) DeviceClass *dc =3D DEVICE_CLASS(klass); I2CSlaveClass *k =3D I2C_SLAVE_CLASS(klass); =20 + dc->reset =3D lm_kbd_reset; dc->realize =3D lm8323_realize; k->event =3D lm_i2c_event; k->recv =3D lm_i2c_rx; --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Tue, 15 Oct 2019 17:38:35 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1A1BB18C8938; Tue, 15 Oct 2019 21:38:35 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 014DB600F8; Tue, 15 Oct 2019 21:38:29 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 11/18] hw/misc/vmcoreinfo: Add comment about reset handler Date: Tue, 15 Oct 2019 18:37:38 -0300 Message-Id: <20191015213745.22174-12-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Tue, 15 Oct 2019 21:38:35 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Li Qiang , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Philippe Mathieu-Daud=C3=A9 The VM coreinfo device does not sit on a bus, so it won't be reset automatically. This is why it calls qemu_register_reset(). Add a comment about it, so we don't convert its reset handler to a DeviceReset method. Reviewed-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Li Qiang Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-Id: <20191010131527.32513-9-philmd@redhat.com> Signed-off-by: Eduardo Habkost --- hw/misc/vmcoreinfo.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/misc/vmcoreinfo.c b/hw/misc/vmcoreinfo.c index 326a3ce8f4..a9d718fc23 100644 --- a/hw/misc/vmcoreinfo.c +++ b/hw/misc/vmcoreinfo.c @@ -61,6 +61,10 @@ static void vmcoreinfo_realize(DeviceState *dev, Error *= *errp) NULL, fw_cfg_vmci_write, s, &s->vmcoreinfo, sizeof(s->vmcoreinfo), false); =20 + /* + * This device requires to register a global reset because it is + * not plugged to a bus (which, as its QOM parent, would reset it). + */ qemu_register_reset(vmcoreinfo_reset, dev); vmcoreinfo_state =3D s; } --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571176288; cv=none; d=zoho.com; s=zohoarc; b=WQwmGhY9cykYgbFr2tTCUDgg2alg9sDe5RDmWtVX+6dZctWDbru/7p9tlW1eNjX796QGSFZl6yE/c+niERyW1mQBedYOkpH5kbGP66/Vud4oQyy2b9PC+K10Z8HCokv/xnsoJEdR0qgRW3D9zZrs5onGEvQT2zSOPRDy+GtZ4Bw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571176288; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=GvYYXJ7ZKDmUPTlHPNpwFZBb6ltbYokCnQ7ElBBVsZs=; b=Zwr2TDgcMtJJtlJ01r1eN0bWS35T3POzL5o56tO0Zgts/DX7BxAwm+Q5Z3DOS4POltUTfQ860FdFT9RXD1lTAKj7IanvsNHBZ4MjUzhgtfzY2EzlHcSJUqiPB9nHOsDAqEJPrSB44c1CW5l0HFCHXDGglGEOaQpJKPyrPolF074= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571176288132405.2092341877501; Tue, 15 Oct 2019 14:51:28 -0700 (PDT) Received: from localhost ([::1]:60126 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUiy-0004TC-U7 for importer@patchew.org; Tue, 15 Oct 2019 17:51:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60041) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUWi-0006Jt-NR for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUWh-0006sV-P3 for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36516) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUWh-0006s6-JX for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:43 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 66090811D8; Tue, 15 Oct 2019 21:38:42 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id D59565D9E2; Tue, 15 Oct 2019 21:38:36 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 12/18] memory-device: not necessary to use goto for the last check Date: Tue, 15 Oct 2019 18:37:39 -0300 Message-Id: <20191015213745.22174-13-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Tue, 15 Oct 2019 21:38:42 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Wei Yang , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Wei Yang We are already at the last condition check. Signed-off-by: Wei Yang Reviewed-by: Igor Mammedov Reviewed-by: David Hildenbrand Message-Id: <20190730003740.20694-2-richardw.yang@linux.intel.com> Signed-off-by: Eduardo Habkost --- hw/mem/memory-device.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/mem/memory-device.c b/hw/mem/memory-device.c index 53953fdc3a..5029890e06 100644 --- a/hw/mem/memory-device.c +++ b/hw/mem/memory-device.c @@ -185,7 +185,6 @@ static uint64_t memory_device_get_free_addr(MachineStat= e *ms, if (!range_contains_range(&as, &new)) { error_setg(errp, "could not find position in guest address space f= or " "memory device - memory fragmented due to alignments"); - goto out; } out: g_slist_free(list); --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571176087; cv=none; d=zoho.com; s=zohoarc; b=ERmWJ7Q7IZ93UfaG+UkE0N7gcD32k5ux5Bm+whz3UvttLpyP+snfC2fCTVaO/o6qvA88wrFeIvCLDolU6o6s9z8LnxxX2QiHHKXi+N6U45VMu1HgICvocyesN5KDsnQ8db+4vKH4M4Q4cCjmrxCTChchb6A8yTTFG8TkIEMVSx4= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571176087; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=kaOdiKDad1We7BzMH+xZ70cfU28fW4T/mYs114ghqXA=; b=WmA081wDrsfnkzarz0gevTrBYP87hK2/PBOsmHJ4bDbtIY3A0bhdl1Jlz53vgyFYKqAFziZUoVzPziPdE0OYEhiQ779zqAqTTo9aSIjVBXmB5ke4Wm2v5Ig33FSQ20gtSlL8VHnatOlm2GI0lzq1htCI476UwDJg7gaTURfAN7A= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571176087909270.47235309360724; Tue, 15 Oct 2019 14:48:07 -0700 (PDT) Received: from localhost ([::1]:60094 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUfk-0000qh-EC for importer@patchew.org; Tue, 15 Oct 2019 17:48:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60052) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUWo-0006Oh-Pl for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUWn-0006to-Ax for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49900) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUWn-0006tL-5R for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:49 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 298D982DA; Tue, 15 Oct 2019 21:38:47 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3797F5C231; Tue, 15 Oct 2019 21:38:44 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 13/18] memory-device: break the loop if tmp exceed the hinted range Date: Tue, 15 Oct 2019 18:37:40 -0300 Message-Id: <20191015213745.22174-14-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Tue, 15 Oct 2019 21:38:47 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Wei Yang , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Wei Yang The memory-device list built by memory_device_build_list is ordered by its address, this means if the tmp range exceed the hinted range, all the following range will not overlap with it. And this won't change default pc-dimm mapping and address assignment stay the same as before this change. Signed-off-by: Wei Yang Message-Id: <20190730003740.20694-3-richardw.yang@linux.intel.com> Reviewed-by: David Hildenbrand Reviewed-by: Igor Mammedov Signed-off-by: Eduardo Habkost --- hw/mem/memory-device.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/mem/memory-device.c b/hw/mem/memory-device.c index 5029890e06..aef148c1d7 100644 --- a/hw/mem/memory-device.c +++ b/hw/mem/memory-device.c @@ -179,6 +179,8 @@ static uint64_t memory_device_get_free_addr(MachineStat= e *ms, range_make_empty(&new); break; } + } else if (range_lob(&tmp) > range_upb(&new)) { + break; } } =20 --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571175643; cv=none; d=zoho.com; s=zohoarc; b=E0fEp5oO5cSqFt+JLwu2azrHS68ezDXkJ75Yg7SfKEXjLwQY4AHQfu5l6XPQunyGsyLUt90/ahhM5ScQddyQMh4/yxPLZSp5QlcJYMuFU/SqoQcrxecboRAHjymP6pYkydIAWDzZ1Ctin0DCbItC27F5li2GvPlZxgKZ+pKo3fk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571175643; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=KS4VBsr7WxKqTuReKc1guzf2cFlSgYhiJt4GpSJT+wM=; b=OBKYVBXjcYHmZ5v2xeJZcud2Vcgg5ETY1+tsZJ2tJfa1LoRjUj0m0bWykol0ajHrImJDtp3c7nMD4lDcFSLbrL4tDR/mgE35w0C5tQrb9Z9uVDg+shOHdLCxVBbion2uwins/4iX6jTGoL89/K/hgRj9q27+qez6cewjVTKEjQs= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571175643370356.61208014434635; Tue, 15 Oct 2019 14:40:43 -0700 (PDT) Received: from localhost ([::1]:60000 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUYY-0008NT-IT for importer@patchew.org; Tue, 15 Oct 2019 17:40:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60063) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUWq-0006Qh-Sn for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUWp-0006uR-3c for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:52 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41708) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUWo-0006ts-OS for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:50 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 32626195D837; Tue, 15 Oct 2019 21:38:49 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id C24486012E; Tue, 15 Oct 2019 21:38:48 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 14/18] target/i386: clean up comments over 80 chars per line Date: Tue, 15 Oct 2019 18:37:41 -0300 Message-Id: <20191015213745.22174-15-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.62]); Tue, 15 Oct 2019 21:38:49 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tao Xu , Stefano Garzarella Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Tao Xu Add some comments, clean up comments over 80 chars per line. And there is an extra line in comment of CPUID_8000_0008_EBX_WBNOINVD, remove the extra enter and spaces. Acked-by: Stefano Garzarella Signed-off-by: Tao Xu Message-Id: <20190926021055.6970-2-tao3.xu@intel.com> [ehabkost: rebase to latest git master] Signed-off-by: Eduardo Habkost --- target/i386/cpu.h | 170 ++++++++++++++++++++++++++++++---------------- 1 file changed, 111 insertions(+), 59 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index eaa5395aa5..93aad4655f 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -669,65 +669,117 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_SVM_PAUSEFILTER (1U << 10) #define CPUID_SVM_PFTHRESHOLD (1U << 12) =20 -#define CPUID_7_0_EBX_FSGSBASE (1U << 0) -#define CPUID_7_0_EBX_BMI1 (1U << 3) -#define CPUID_7_0_EBX_HLE (1U << 4) -#define CPUID_7_0_EBX_AVX2 (1U << 5) -#define CPUID_7_0_EBX_SMEP (1U << 7) -#define CPUID_7_0_EBX_BMI2 (1U << 8) -#define CPUID_7_0_EBX_ERMS (1U << 9) -#define CPUID_7_0_EBX_INVPCID (1U << 10) -#define CPUID_7_0_EBX_RTM (1U << 11) -#define CPUID_7_0_EBX_MPX (1U << 14) -#define CPUID_7_0_EBX_AVX512F (1U << 16) /* AVX-512 Foundation */ -#define CPUID_7_0_EBX_AVX512DQ (1U << 17) /* AVX-512 Doubleword & Quadword= Instrs */ -#define CPUID_7_0_EBX_RDSEED (1U << 18) -#define CPUID_7_0_EBX_ADX (1U << 19) -#define CPUID_7_0_EBX_SMAP (1U << 20) -#define CPUID_7_0_EBX_AVX512IFMA (1U << 21) /* AVX-512 Integer Fused Multi= ply Add */ -#define CPUID_7_0_EBX_PCOMMIT (1U << 22) /* Persistent Commit */ -#define CPUID_7_0_EBX_CLFLUSHOPT (1U << 23) /* Flush a Cache Line Optimize= d */ -#define CPUID_7_0_EBX_CLWB (1U << 24) /* Cache Line Write Back */ -#define CPUID_7_0_EBX_INTEL_PT (1U << 25) /* Intel Processor Trace */ -#define CPUID_7_0_EBX_AVX512PF (1U << 26) /* AVX-512 Prefetch */ -#define CPUID_7_0_EBX_AVX512ER (1U << 27) /* AVX-512 Exponential and Recip= rocal */ -#define CPUID_7_0_EBX_AVX512CD (1U << 28) /* AVX-512 Conflict Detection */ -#define CPUID_7_0_EBX_SHA_NI (1U << 29) /* SHA1/SHA256 Instruction Exten= sions */ -#define CPUID_7_0_EBX_AVX512BW (1U << 30) /* AVX-512 Byte and Word Instruc= tions */ -#define CPUID_7_0_EBX_AVX512VL (1U << 31) /* AVX-512 Vector Length Extensi= ons */ - -#define CPUID_7_0_ECX_AVX512BMI (1U << 1) -#define CPUID_7_0_ECX_VBMI (1U << 1) /* AVX-512 Vector Byte Manipulat= ion Instrs */ -#define CPUID_7_0_ECX_UMIP (1U << 2) -#define CPUID_7_0_ECX_PKU (1U << 3) -#define CPUID_7_0_ECX_OSPKE (1U << 4) -#define CPUID_7_0_ECX_VBMI2 (1U << 6) /* Additional VBMI Instrs */ -#define CPUID_7_0_ECX_GFNI (1U << 8) -#define CPUID_7_0_ECX_VAES (1U << 9) -#define CPUID_7_0_ECX_VPCLMULQDQ (1U << 10) -#define CPUID_7_0_ECX_AVX512VNNI (1U << 11) -#define CPUID_7_0_ECX_AVX512BITALG (1U << 12) -#define CPUID_7_0_ECX_AVX512_VPOPCNTDQ (1U << 14) /* POPCNT for vectors of= DW/QW */ -#define CPUID_7_0_ECX_LA57 (1U << 16) -#define CPUID_7_0_ECX_RDPID (1U << 22) -#define CPUID_7_0_ECX_CLDEMOTE (1U << 25) /* CLDEMOTE Instruction */ -#define CPUID_7_0_ECX_MOVDIRI (1U << 27) /* MOVDIRI Instruction */ -#define CPUID_7_0_ECX_MOVDIR64B (1U << 28) /* MOVDIR64B Instruction */ - -#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Ins= tructions */ -#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulat= ion Single Precision */ -#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ -#define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29) /*Arch Capabilities*/ -#define CPUID_7_0_EDX_CORE_CAPABILITY (1U << 30) /*Core Capability*/ -#define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypa= ss Disable */ - -#define CPUID_7_1_EAX_AVX512_BF16 (1U << 5) /* AVX512 BFloat16 Instruction= */ - -#define CPUID_8000_0008_EBX_CLZERO (1U << 0) /* CLZERO instruction */ -#define CPUID_8000_0008_EBX_XSAVEERPTR (1U << 2) /* Always save/restore FP= error pointers */ -#define CPUID_8000_0008_EBX_WBNOINVD (1U << 9) /* Write back and - = do not invalidate cache */ -#define CPUID_8000_0008_EBX_IBPB (1U << 12) /* Indirect Branch Predicti= on Barrier */ +/* Support RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE */ +#define CPUID_7_0_EBX_FSGSBASE (1U << 0) +/* 1st Group of Advanced Bit Manipulation Extensions */ +#define CPUID_7_0_EBX_BMI1 (1U << 3) +/* Hardware Lock Elision */ +#define CPUID_7_0_EBX_HLE (1U << 4) +/* Intel Advanced Vector Extensions 2 */ +#define CPUID_7_0_EBX_AVX2 (1U << 5) +/* Supervisor-mode Execution Prevention */ +#define CPUID_7_0_EBX_SMEP (1U << 7) +/* 2nd Group of Advanced Bit Manipulation Extensions */ +#define CPUID_7_0_EBX_BMI2 (1U << 8) +/* Enhanced REP MOVSB/STOSB */ +#define CPUID_7_0_EBX_ERMS (1U << 9) +/* Invalidate Process-Context Identifier */ +#define CPUID_7_0_EBX_INVPCID (1U << 10) +/* Restricted Transactional Memory */ +#define CPUID_7_0_EBX_RTM (1U << 11) +/* Memory Protection Extension */ +#define CPUID_7_0_EBX_MPX (1U << 14) +/* AVX-512 Foundation */ +#define CPUID_7_0_EBX_AVX512F (1U << 16) +/* AVX-512 Doubleword & Quadword Instruction */ +#define CPUID_7_0_EBX_AVX512DQ (1U << 17) +/* Read Random SEED */ +#define CPUID_7_0_EBX_RDSEED (1U << 18) +/* ADCX and ADOX instructions */ +#define CPUID_7_0_EBX_ADX (1U << 19) +/* Supervisor Mode Access Prevention */ +#define CPUID_7_0_EBX_SMAP (1U << 20) +/* AVX-512 Integer Fused Multiply Add */ +#define CPUID_7_0_EBX_AVX512IFMA (1U << 21) +/* Persistent Commit */ +#define CPUID_7_0_EBX_PCOMMIT (1U << 22) +/* Flush a Cache Line Optimized */ +#define CPUID_7_0_EBX_CLFLUSHOPT (1U << 23) +/* Cache Line Write Back */ +#define CPUID_7_0_EBX_CLWB (1U << 24) +/* Intel Processor Trace */ +#define CPUID_7_0_EBX_INTEL_PT (1U << 25) +/* AVX-512 Prefetch */ +#define CPUID_7_0_EBX_AVX512PF (1U << 26) +/* AVX-512 Exponential and Reciprocal */ +#define CPUID_7_0_EBX_AVX512ER (1U << 27) +/* AVX-512 Conflict Detection */ +#define CPUID_7_0_EBX_AVX512CD (1U << 28) +/* SHA1/SHA256 Instruction Extensions */ +#define CPUID_7_0_EBX_SHA_NI (1U << 29) +/* AVX-512 Byte and Word Instructions */ +#define CPUID_7_0_EBX_AVX512BW (1U << 30) +/* AVX-512 Vector Length Extensions */ +#define CPUID_7_0_EBX_AVX512VL (1U << 31) + +/* AVX-512 Vector Byte Manipulation Instruction */ +#define CPUID_7_0_ECX_AVX512BMI (1U << 1) +#define CPUID_7_0_ECX_VBMI (1U << 1) +/* User-Mode Instruction Prevention */ +#define CPUID_7_0_ECX_UMIP (1U << 2) +/* Protection Keys for User-mode Pages */ +#define CPUID_7_0_ECX_PKU (1U << 3) +/* OS Enable Protection Keys */ +#define CPUID_7_0_ECX_OSPKE (1U << 4) +/* Additional AVX-512 Vector Byte Manipulation Instruction */ +#define CPUID_7_0_ECX_VBMI2 (1U << 6) +/* Galois Field New Instructions */ +#define CPUID_7_0_ECX_GFNI (1U << 8) +/* Vector AES Instructions */ +#define CPUID_7_0_ECX_VAES (1U << 9) +/* Carry-Less Multiplication Quadword */ +#define CPUID_7_0_ECX_VPCLMULQDQ (1U << 10) +/* Vector Neural Network Instructions */ +#define CPUID_7_0_ECX_AVX512VNNI (1U << 11) +/* Support for VPOPCNT[B,W] and VPSHUFBITQMB */ +#define CPUID_7_0_ECX_AVX512BITALG (1U << 12) +/* POPCNT for vectors of DW/QW */ +#define CPUID_7_0_ECX_AVX512_VPOPCNTDQ (1U << 14) +/* 5-level Page Tables */ +#define CPUID_7_0_ECX_LA57 (1U << 16) +/* Read Processor ID */ +#define CPUID_7_0_ECX_RDPID (1U << 22) +/* Cache Line Demote Instruction */ +#define CPUID_7_0_ECX_CLDEMOTE (1U << 25) +/* Move Doubleword as Direct Store Instruction */ +#define CPUID_7_0_ECX_MOVDIRI (1U << 27) +/* Move 64 Bytes as Direct Store Instruction */ +#define CPUID_7_0_ECX_MOVDIR64B (1U << 28) + +/* AVX512 Neural Network Instructions */ +#define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) +/* AVX512 Multiply Accumulation Single Precision */ +#define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) +/* Speculation Control */ +#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) +/* Arch Capabilities */ +#define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29) +/* Core Capability */ +#define CPUID_7_0_EDX_CORE_CAPABILITY (1U << 30) +/* Speculative Store Bypass Disable */ +#define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) + +/* AVX512 BFloat16 Instruction */ +#define CPUID_7_1_EAX_AVX512_BF16 (1U << 5) + +/* CLZERO instruction */ +#define CPUID_8000_0008_EBX_CLZERO (1U << 0) +/* Always save/restore FP error pointers */ +#define CPUID_8000_0008_EBX_XSAVEERPTR (1U << 2) +/* Write back and do not invalidate cache */ +#define CPUID_8000_0008_EBX_WBNOINVD (1U << 9) +/* Indirect Branch Prediction Barrier */ +#define CPUID_8000_0008_EBX_IBPB (1U << 12) =20 #define CPUID_XSAVE_XSAVEOPT (1U << 0) #define CPUID_XSAVE_XSAVEC (1U << 1) --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571176290; 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lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571176290121581.9937912826707; Tue, 15 Oct 2019 14:51:30 -0700 (PDT) Received: from localhost ([::1]:60122 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUix-0004PJ-KV for importer@patchew.org; Tue, 15 Oct 2019 17:51:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60075) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUWu-0006W8-WD for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUWt-0006vK-2b for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:56 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52720) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUWs-0006ux-QI for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:55 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7F34E308FBB4; Tue, 15 Oct 2019 21:38:53 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id CB54310027A9; Tue, 15 Oct 2019 21:38:50 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 15/18] target/i386: drop the duplicated definition of cpuid AVX512_VBMI macro Date: Tue, 15 Oct 2019 18:37:42 -0300 Message-Id: <20191015213745.22174-16-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Tue, 15 Oct 2019 21:38:53 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tao Xu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Stefano Garzarella Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Tao Xu Drop the duplicated definition of cpuid AVX512_VBMI macro and rename it as CPUID_7_0_ECX_AVX512_VBMI. Rename CPUID_7_0_ECX_VBMI2 as CPUID_7_0_ECX_AVX512_VBMI2. Acked-by: Stefano Garzarella Signed-off-by: Tao Xu Message-Id: <20190926021055.6970-3-tao3.xu@intel.com> Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Eduardo Habkost --- target/i386/cpu.h | 5 ++--- target/i386/cpu.c | 8 ++++---- target/i386/hvf/x86_cpuid.c | 2 +- 3 files changed, 7 insertions(+), 8 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 93aad4655f..cedb5bc205 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -723,8 +723,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EBX_AVX512VL (1U << 31) =20 /* AVX-512 Vector Byte Manipulation Instruction */ -#define CPUID_7_0_ECX_AVX512BMI (1U << 1) -#define CPUID_7_0_ECX_VBMI (1U << 1) +#define CPUID_7_0_ECX_AVX512_VBMI (1U << 1) /* User-Mode Instruction Prevention */ #define CPUID_7_0_ECX_UMIP (1U << 2) /* Protection Keys for User-mode Pages */ @@ -732,7 +731,7 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS]; /* OS Enable Protection Keys */ #define CPUID_7_0_ECX_OSPKE (1U << 4) /* Additional AVX-512 Vector Byte Manipulation Instruction */ -#define CPUID_7_0_ECX_VBMI2 (1U << 6) +#define CPUID_7_0_ECX_AVX512_VBMI2 (1U << 6) /* Galois Field New Instructions */ #define CPUID_7_0_ECX_GFNI (1U << 8) /* Vector AES Instructions */ diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 44f1bbdcac..daece62c19 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2645,8 +2645,8 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP, .features[FEAT_7_0_ECX] =3D - CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | - CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | + CPUID_7_0_ECX_AVX512_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX= _PKU | + CPUID_7_0_ECX_AVX512_VBMI2 | CPUID_7_0_ECX_GFNI | CPUID_7_0_ECX_VAES | CPUID_7_0_ECX_VPCLMULQDQ | CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG | CPUID_7_0_ECX_AVX512_VPOPCNTDQ, @@ -2703,8 +2703,8 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | CPUID_7_0_EBX_AVX512VL | CPUID_7_0_EBX_CLFLUSHOPT, .features[FEAT_7_0_ECX] =3D - CPUID_7_0_ECX_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | - CPUID_7_0_ECX_VBMI2 | CPUID_7_0_ECX_GFNI | + CPUID_7_0_ECX_AVX512_VBMI | CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX= _PKU | + CPUID_7_0_ECX_AVX512_VBMI2 | CPUID_7_0_ECX_GFNI | CPUID_7_0_ECX_VAES | CPUID_7_0_ECX_VPCLMULQDQ | CPUID_7_0_ECX_AVX512VNNI | CPUID_7_0_ECX_AVX512BITALG | CPUID_7_0_ECX_AVX512_VPOPCNTDQ | CPUID_7_0_ECX_LA57, diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c index 4d957fe896..16762b6eb4 100644 --- a/target/i386/hvf/x86_cpuid.c +++ b/target/i386/hvf/x86_cpuid.c @@ -89,7 +89,7 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t = idx, ebx &=3D ~CPUID_7_0_EBX_INVPCID; } =20 - ecx &=3D CPUID_7_0_ECX_AVX512BMI | CPUID_7_0_ECX_AVX512_VPOPCN= TDQ; + ecx &=3D CPUID_7_0_ECX_AVX512_VBMI | CPUID_7_0_ECX_AVX512_VPOP= CNTDQ; edx &=3D CPUID_7_0_EDX_AVX512_4VNNIW | CPUID_7_0_EDX_AVX512_4F= MAPS; } else { ebx =3D 0; --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571176496; cv=none; d=zoho.com; s=zohoarc; b=Vi40oMnkRSF80nEEWLW1gs0eviGE1JxGJhGXivGvAZRzd7UD0bWRn0Vjpix9UUgB0l9d8ZovwiODpyCa7Hip02S3w5G67NzNfV05v+Y0XpXyxOIG5ON6tI8idEyxtWIdF+EnQz5jYLhshSjorlM9TLr2znKzKqDBBzC+0+uC4kA= ARC-Message-Signature: i=1; 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Tue, 15 Oct 2019 21:38:55 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 16/18] i386: Fix legacy guest with xsave panic on host kvm without update cpuid. Date: Tue, 15 Oct 2019 18:37:43 -0300 Message-Id: <20191015213745.22174-17-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Tue, 15 Oct 2019 21:38:55 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bingsong Si Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Bingsong Si without kvm commit 412a3c41, CPUID(EAX=3D0xd,ECX=3D0).EBX always equal to 0= even through guest update xcr0, this will crash legacy guest(e.g., CentOS 6). Below is the call trace on the guest. [ 0.000000] kernel BUG at mm/bootmem.c:469! [ 0.000000] invalid opcode: 0000 [#1] SMP [ 0.000000] last sysfs file: [ 0.000000] CPU 0 [ 0.000000] Modules linked in: [ 0.000000] [ 0.000000] Pid: 0, comm: swapper Tainted: G --------------- H= 2.6.32-279#2 Red Hat KVM [ 0.000000] RIP: 0010:[] [] alloc_b= ootmem_core+0x7b/0x29e [ 0.000000] RSP: 0018:ffffffff81a01cd8 EFLAGS: 00010046 [ 0.000000] RAX: ffffffff81cb1748 RBX: ffffffff81cb1720 RCX: 00000000010= 00000 [ 0.000000] RDX: 0000000000000040 RSI: 0000000000000000 RDI: ffffffff81c= b1720 [ 0.000000] RBP: ffffffff81a01d38 R08: 0000000000000000 R09: 00000000000= 01000 [ 0.000000] R10: 02008921da802087 R11: 00000000ffff8800 R12: 00000000000= 00000 [ 0.000000] R13: 0000000000000000 R14: 0000000000000000 R15: 00000000010= 00000 [ 0.000000] FS: 0000000000000000(0000) GS:ffff880002200000(0000) knlGS:= 0000000000000000 [ 0.000000] CS: 0010 DS: 0018 ES: 0018 CR0: 0000000080050033 [ 0.000000] CR2: 0000000000000000 CR3: 0000000001a85000 CR4: 00000000001= 406b0 [ 0.000000] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 00000000000= 00000 [ 0.000000] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 00000000000= 00400 [ 0.000000] Process swapper (pid: 0, threadinfo ffffffff81a00000, task f= fffffff81a8d020) [ 0.000000] Stack: [ 0.000000] 0000000000000002 81a01dd881eaf060 000000007e5fe227 00000000= 00001001 [ 0.000000] 0000000000000040 0000000000000001 0000006cffffffff 00000= 00001000000 [ 0.000000] ffffffff81cb1720 0000000000000000 0000000000000000 00000= 00000000000 [ 0.000000] Call Trace: [ 0.000000] [] ___alloc_bootmem_nopanic+0x8d/0xca [ 0.000000] [] ___alloc_bootmem+0x11/0x39 [ 0.000000] [] __alloc_bootmem+0xb/0xd [ 0.000000] [] xsave_cntxt_init+0x249/0x2c0 [ 0.000000] [] init_thread_xstate+0x17/0x25 [ 0.000000] [] fpu_init+0x79/0xaa [ 0.000000] [] cpu_init+0x301/0x344 [ 0.000000] [] ? sort+0x155/0x230 [ 0.000000] [] trap_init+0x24e/0x25f [ 0.000000] [] start_kernel+0x21c/0x430 [ 0.000000] [] x86_64_start_reservations+0x125/0x129 [ 0.000000] [] x86_64_start_kernel+0xfa/0x109 [ 0.000000] Code: 03 48 89 f1 49 c1 e8 0c 48 0f af d0 48 c7 c6 00 a6 61 = 81 48 c7 c7 00 e5 79 81 31 c0 4c 89 74 24 08 e8 f2 d7 89 ff 4d 85 e4 75 04 = <0f> 0b eb fe 48 8b 45 c0 48 83 e8 01 48 85 45 c0 74 04 0f 0b eb Signed-off-by: Bingsong Si Message-Id: <20190822042901.16858-1-owen.si@ucloud.cn> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index daece62c19..b821132b6a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4693,7 +4693,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,= uint32_t count, *ecx =3D xsave_area_size(x86_cpu_xsave_components(cpu)); *eax =3D env->features[FEAT_XSAVE_COMP_LO]; *edx =3D env->features[FEAT_XSAVE_COMP_HI]; - *ebx =3D xsave_area_size(env->xcr0); + /* + * The initial value of xcr0 and ebx =3D=3D 0, On host without= kvm + * commit 412a3c41(e.g., CentOS 6), the ebx's value always =3D= =3D 0 + * even through guest update xcr0, this will crash some legacy= guest + * (e.g., CentOS 6), So set ebx =3D=3D ecx to workaroud it. + */ + *ebx =3D kvm_enabled() ? *ecx : xsave_area_size(env->xcr0); } else if (count =3D=3D 1) { *eax =3D env->features[FEAT_XSAVE]; } else if (count < ARRAY_SIZE(x86_ext_save_areas)) { --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571176435; cv=none; d=zoho.com; s=zohoarc; b=kL1JQ+3QqnCHSCAnCfSBU+6aaQ1kyb5Hb2hl2U1IavLhHZuqMcSrssoJ0lhomq9xv0P//YSM21a/gFvVc/5PtB4DTD+4QUxRZnhBvxhmwLI2/LaC/vmpWTrc50gFdWeUbFdF/MxAwucsmj8T1Y6vjDYpW9MDofbJvyN8WVh2kXw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571176435; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=+4KsBBjr/hy2y9di74Jdpb/Ig9KI9U2eYOhsds36ukA=; b=nmZAK1KKYLIh5m2yyvc9nTod96X0hKHeKV/K6Lcgu1OpzPeVNzjehFhWRCKx/MOoE+Xgwk5W/zJez+CmdVjazRFF18OswlzVgHOm3XJHJDDv3ftqWumsO7zZl1Q564pSWXu6PuqOkQSHtCQHDxO5JY6cm1/0jBwO7P5xdDk77W0= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571176435674510.36019770276084; Tue, 15 Oct 2019 14:53:55 -0700 (PDT) Received: from localhost ([::1]:60162 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUlM-0008IY-9p for importer@patchew.org; Tue, 15 Oct 2019 17:53:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60109) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUWy-0006de-7x for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:39:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUWw-0006wg-Uu for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:39:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54508) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUWw-0006wP-OR for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:38:58 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 032D2C05FF87; Tue, 15 Oct 2019 21:38:58 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9474E1001947; Tue, 15 Oct 2019 21:38:57 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 17/18] i386: Omit all-zeroes entries from KVM CPUID table Date: Tue, 15 Oct 2019 18:37:44 -0300 Message-Id: <20191015213745.22174-18-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Tue, 15 Oct 2019 21:38:58 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yumei Huang Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" KVM has a 80-entry limit at KVM_SET_CPUID2. With the introduction of CPUID[0x1F], it is now possible to hit this limit with unusual CPU configurations, e.g.: $ ./x86_64-softmmu/qemu-system-x86_64 \ -smp 1,dies=3D2,maxcpus=3D2 \ -cpu EPYC,check=3Doff,enforce=3Doff \ -machine accel=3Dkvm qemu-system-x86_64: kvm_init_vcpu failed: Argument list too long This happens because QEMU adds a lot of all-zeroes CPUID entries for unused CPUID leaves. In the example above, we end up creating 48 all-zeroes CPUID entries. KVM already returns all-zeroes when emulating the CPUID instruction if an entry is missing, so the all-zeroes entries are redundant. Skip those entries. This reduces the CPUID table size by half while keeping CPUID output unchanged. Reported-by: Yumei Huang Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=3D1741508 Signed-off-by: Eduardo Habkost Message-Id: <20190822225210.32541-1-ehabkost@redhat.com> Acked-by: Paolo Bonzini Signed-off-by: Eduardo Habkost --- target/i386/kvm.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 11b9c854b5..8c73438c67 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -1567,6 +1567,13 @@ int kvm_arch_init_vcpu(CPUState *cs) c->function =3D i; c->flags =3D 0; cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + if (!c->eax && !c->ebx && !c->ecx && !c->edx) { + /* + * KVM already returns all zeroes if a CPUID entry is miss= ing, + * so we can omit it and avoid hitting KVM's 80-entry limi= t. + */ + cpuid_i--; + } break; } } @@ -1631,6 +1638,13 @@ int kvm_arch_init_vcpu(CPUState *cs) c->function =3D i; c->flags =3D 0; cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); + if (!c->eax && !c->ebx && !c->ecx && !c->edx) { + /* + * KVM already returns all zeroes if a CPUID entry is miss= ing, + * so we can omit it and avoid hitting KVM's 80-entry limi= t. + */ + cpuid_i--; + } break; } } --=20 2.21.0 From nobody Fri May 3 13:26:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1571175808; cv=none; d=zoho.com; s=zohoarc; b=h8kEa8AMMUVHqthpywIhfS4kSDr/ZkfwWnkl0h1hIiY/1RKS/DCp89Ee9g2iC8Y1bwcocRt9ix27Y4HKbk35VjibfkM8/83C3AIc6CyM/5/4DIzw12Slmiw5K2apMStt7lb/kxHuSRGPXaaOONi7Y58U1gtKlUc7nERi3F+1b9c= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1571175808; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=o8b2AUOkKKSeDbOlaKhhIykEZaA6+FzwGnTfedXYjrU=; b=lnQOV3mGbWNCBc558Q4wiD3X3ByNYI/HQU9zsjN4tBkMumcxt16OOhh4abEwe2N9gZxfq3VNFI/CPTq4IhS7/r/1dfB33IrM5Rtv9Jo+XD2UF6XJ/PjYPsyR1VQWScbj6vk7OFUECXOtWBBns2ev1pkNMq0kz9q+POwGBNra6U4= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1571175808342117.72473872315209; Tue, 15 Oct 2019 14:43:28 -0700 (PDT) Received: from localhost ([::1]:60026 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUbH-0003qM-8W for importer@patchew.org; Tue, 15 Oct 2019 17:43:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60120) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iKUX0-0006hB-1A for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:39:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iKUWz-0006xK-1y for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:39:01 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46956) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iKUWy-0006x8-SQ for qemu-devel@nongnu.org; Tue, 15 Oct 2019 17:39:01 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1A745308FBB4; Tue, 15 Oct 2019 21:39:00 +0000 (UTC) Received: from localhost (ovpn-116-20.phx2.redhat.com [10.3.116.20]) by smtp.corp.redhat.com (Postfix) with ESMTP id AD4FC5D70D; Tue, 15 Oct 2019 21:38:59 +0000 (UTC) From: Eduardo Habkost To: Paolo Bonzini , Marcel Apfelbaum , Peter Maydell , Igor Mammedov , Richard Henderson , qemu-devel@nongnu.org Subject: [PULL 18/18] target/i386: Add Snowridge-v2 (no MPX) CPU model Date: Tue, 15 Oct 2019 18:37:45 -0300 Message-Id: <20191015213745.22174-19-ehabkost@redhat.com> In-Reply-To: <20191015213745.22174-1-ehabkost@redhat.com> References: <20191015213745.22174-1-ehabkost@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.43]); Tue, 15 Oct 2019 21:39:00 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Xiaoyao Li Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Xiaoyao Li Add new version of Snowridge CPU model that removes MPX feature. MPX support is being phased out by Intel. GCC has dropped it, Linux kernel and KVM are also going to do that in the future. Signed-off-by: Xiaoyao Li Message-Id: <20191012024748.127135-1-xiaoyao.li@intel.com> Signed-off-by: Eduardo Habkost --- target/i386/cpu.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b821132b6a..47200b40c1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2793,6 +2793,18 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_6_EAX_ARAT, .xlevel =3D 0x80000008, .model_id =3D "Intel Atom Processor (SnowRidge)", + .versions =3D (X86CPUVersionDefinition[]) { + { .version =3D 1 }, + { + .version =3D 2, + .props =3D (PropValue[]) { + { "mpx", "off" }, + { "model-id", "Intel Atom Processor (Snowridge, no MPX= )" }, + { /* end of list */ }, + }, + }, + { /* end of list */ }, + }, }, { .name =3D "KnightsMill", --=20 2.21.0