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Mon, 14 Oct 2019 03:50:00 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v5 24/55] target/arm: fetch code with translator_ld Date: Mon, 14 Oct 2019 11:49:17 +0100 Message-Id: <20191014104948.4291-25-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191014104948.4291-1-alex.bennee@linaro.org> References: <20191014104948.4291-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , robert.foley@futurewei.com, Richard Henderson , peter.puhov@futurewei.com, aaron@os.amperecomputing.com, cota@braap.org, "open list:ARM TCG CPUs" , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: "Emilio G. Cota" Now the arm_ld*_code functions are only used at translate time we can just pass down to translator_ld functions. Signed-off-by: Emilio G. Cota [AJB: convert from plugin_insn_append to translator_ld] Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- v4 - use translator_ld like the rest of them --- target/arm/arm_ldst.h | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/target/arm/arm_ldst.h b/target/arm/arm_ldst.h index 5e0ac8bef0..45edb108f6 100644 --- a/target/arm/arm_ldst.h +++ b/target/arm/arm_ldst.h @@ -20,25 +20,20 @@ #ifndef ARM_LDST_H #define ARM_LDST_H =20 -#include "exec/cpu_ldst.h" +#include "exec/translator.h" #include "qemu/bswap.h" =20 /* Load an instruction and return it in the standard little-endian order */ static inline uint32_t arm_ldl_code(CPUARMState *env, target_ulong addr, bool sctlr_b) { - uint32_t insn =3D cpu_ldl_code(env, addr); - if (bswap_code(sctlr_b)) { - return bswap32(insn); - } - return insn; + return translator_ldl_swap(env, addr, bswap_code(sctlr_b)); } =20 /* Ditto, for a halfword (Thumb) instruction */ static inline uint16_t arm_lduw_code(CPUARMState *env, target_ulong addr, bool sctlr_b) { - uint16_t insn; #ifndef CONFIG_USER_ONLY /* In big-endian (BE32) mode, adjacent Thumb instructions have been sw= apped within each word. Undo that now. */ @@ -46,11 +41,7 @@ static inline uint16_t arm_lduw_code(CPUARMState *env, t= arget_ulong addr, addr ^=3D 2; } #endif - insn =3D cpu_lduw_code(env, addr); - if (bswap_code(sctlr_b)) { - return bswap16(insn); - } - return insn; + return translator_lduw_swap(env, addr, bswap_code(sctlr_b)); } =20 #endif --=20 2.20.1