From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570707462; cv=none; d=zoho.com; s=zohoarc; b=k2B3MWY7qyY91YFlXOhWI5AyMY8CrPdev5ejljMNd2DhUSFPd1yH1TJGBLnZgmEw9nO5LC+1D8pDDbhGCdV0N3BVr90SAYLyYIPLM5rv3UqkOoYYkt/z5B/+mE1JJ5k96FexBWULTwycHpkg6fSy0hC4pDyNOeq7VLmYU8WD968= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570707462; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=OX2LQyHyz6lvd1WCYxphkhQd2R5if402KRU74PDw74g=; b=QpDpCUd+fkNcBYLIQoaZ8sBf0bbsrA/ILpL2hth5l6rtrdar18h6WblHEai/7/RObh1urtGq1wJvcHCoR+1M321QC5WYXB8LcS7GhjVSvXFCUT2jOpfo0GK96PcR7j6bU1MqznjIy+VaQ/9MLa1VkmnKet6cllWmAMDvDJ/WojI= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570707462001957.3316773213523; Thu, 10 Oct 2019 04:37:42 -0700 (PDT) Received: from localhost ([::1]:36420 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWlI-0007FS-9Z for importer@patchew.org; Thu, 10 Oct 2019 07:37:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49916) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWhp-00037R-Pq for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWho-0005Yt-Cd for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44166) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWho-0005YT-4V; Thu, 10 Oct 2019 07:34:04 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3B37F1DCD; Thu, 10 Oct 2019 11:34:03 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id BA2005C1B5; Thu, 10 Oct 2019 11:34:01 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 01/31] s390x/mmu: Drop debug logging from MMU code Date: Thu, 10 Oct 2019 13:33:26 +0200 Message-Id: <20191010113356.5017-2-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.71]); Thu, 10 Oct 2019 11:34:03 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let's get it out of the way to make some further refactorings easier. Personally, I've never used these debug statements at all. And if I had to debug issues, I used plain GDB instead (debug prints are just way too much noise in the MMU). We might want to introduce tracing at some point instead, so we can able selected events on demand. Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 51 --------------------------------------- 1 file changed, 51 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 7e6b0d0508..6a7ad33c4d 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -28,31 +28,6 @@ #include "hw/hw.h" #include "hw/s390x/storage-keys.h" =20 -/* #define DEBUG_S390 */ -/* #define DEBUG_S390_PTE */ -/* #define DEBUG_S390_STDOUT */ - -#ifdef DEBUG_S390 -#ifdef DEBUG_S390_STDOUT -#define DPRINTF(fmt, ...) \ - do { fprintf(stderr, fmt, ## __VA_ARGS__); \ - if (qemu_log_separate()) qemu_log(fmt, ##__VA_ARGS__); } while (0) -#else -#define DPRINTF(fmt, ...) \ - do { qemu_log(fmt, ## __VA_ARGS__); } while (0) -#endif -#else -#define DPRINTF(fmt, ...) \ - do { } while (0) -#endif - -#ifdef DEBUG_S390_PTE -#define PTE_DPRINTF DPRINTF -#else -#define PTE_DPRINTF(fmt, ...) \ - do { } while (0) -#endif - /* Fetch/store bits in the translation exception code: */ #define FS_READ 0x800 #define FS_WRITE 0x400 @@ -80,8 +55,6 @@ static void trigger_prot_fault(CPUS390XState *env, target= _ulong vaddr, =20 tec =3D vaddr | (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ) | 4 | = asc >> 46; =20 - DPRINTF("%s: trans_exc_code=3D%016" PRIx64 "\n", __func__, tec); - if (!exc) { return; } @@ -97,8 +70,6 @@ static void trigger_page_fault(CPUS390XState *env, target= _ulong vaddr, =20 tec =3D vaddr | (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ) | asc = >> 46; =20 - DPRINTF("%s: trans_exc_code=3D%016" PRIx64 "\n", __func__, tec); - if (!exc) { return; } @@ -162,7 +133,6 @@ static int mmu_translate_pte(CPUS390XState *env, target= _ulong vaddr, target_ulong *raddr, int *flags, int rw, bool= exc) { if (pt_entry & PAGE_INVALID) { - DPRINTF("%s: PTE=3D0x%" PRIx64 " invalid\n", __func__, pt_entry); trigger_page_fault(env, vaddr, PGM_PAGE_TRANS, asc, rw, exc); return -1; } @@ -175,9 +145,6 @@ static int mmu_translate_pte(CPUS390XState *env, target= _ulong vaddr, } =20 *raddr =3D pt_entry & ASCE_ORIGIN; - - PTE_DPRINTF("%s: PTE=3D0x%" PRIx64 "\n", __func__, pt_entry); - return 0; } =20 @@ -197,7 +164,6 @@ static int mmu_translate_segment(CPUS390XState *env, ta= rget_ulong vaddr, if ((st_entry & SEGMENT_ENTRY_FC) && (env->cregs[0] & CR0_EDAT)) { /* Decode EDAT1 segment frame absolute address (1MB page) */ *raddr =3D (st_entry & 0xfffffffffff00000ULL) | (vaddr & 0xfffff); - PTE_DPRINTF("%s: SEG=3D0x%" PRIx64 "\n", __func__, st_entry); return 0; } =20 @@ -205,8 +171,6 @@ static int mmu_translate_segment(CPUS390XState *env, ta= rget_ulong vaddr, origin =3D st_entry & SEGMENT_ENTRY_ORIGIN; offs =3D (vaddr & VADDR_PX) >> 9; pt_entry =3D ldq_phys(cs->as, origin + offs); - PTE_DPRINTF("%s: 0x%" PRIx64 " + 0x%" PRIx64 " =3D> 0x%016" PRIx64 "\n= ", - __func__, origin, offs, pt_entry); return mmu_translate_pte(env, vaddr, asc, pt_entry, raddr, flags, rw, = exc); } =20 @@ -223,17 +187,12 @@ static int mmu_translate_region(CPUS390XState *env, t= arget_ulong vaddr, PGM_REG_SEC_TRANS, PGM_REG_FIRST_TRANS }; =20 - PTE_DPRINTF("%s: 0x%" PRIx64 "\n", __func__, entry); - origin =3D entry & REGION_ENTRY_ORIGIN; offs =3D (vaddr >> (17 + 11 * level / 4)) & 0x3ff8; =20 new_entry =3D ldq_phys(cs->as, origin + offs); - PTE_DPRINTF("%s: 0x%" PRIx64 " + 0x%" PRIx64 " =3D> 0x%016" PRIx64 "\n= ", - __func__, origin, offs, new_entry); =20 if ((new_entry & REGION_ENTRY_INV) !=3D 0) { - DPRINTF("%s: invalid region\n", __func__); trigger_page_fault(env, vaddr, pchks[level / 4], asc, rw, exc); return -1; } @@ -252,7 +211,6 @@ static int mmu_translate_region(CPUS390XState *env, tar= get_ulong vaddr, offs =3D (vaddr >> (28 + 11 * (level - 4) / 4)) & 3; if (offs < ((new_entry & REGION_ENTRY_TF) >> 6) || offs > (new_entry & REGION_ENTRY_LENGTH)) { - DPRINTF("%s: invalid offset or len (%lx)\n", __func__, new_entry); trigger_page_fault(env, vaddr, pchks[level / 4 - 1], asc, rw, exc); return -1; } @@ -289,8 +247,6 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, break; case ASCE_TYPE_REGION2: if (vaddr & 0xffe0000000000000ULL) { - DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64 - " 0xffe0000000000000ULL\n", __func__, vaddr); trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); return -1; } @@ -301,8 +257,6 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, break; case ASCE_TYPE_REGION3: if (vaddr & 0xfffffc0000000000ULL) { - DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64 - " 0xfffffc0000000000ULL\n", __func__, vaddr); trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); return -1; } @@ -313,8 +267,6 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, break; case ASCE_TYPE_SEGMENT: if (vaddr & 0xffffffff80000000ULL) { - DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64 - " 0xffffffff80000000ULL\n", __func__, vaddr); trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); return -1; } @@ -449,15 +401,12 @@ int mmu_translate(CPUS390XState *env, target_ulong va= ddr, int rw, uint64_t asc, =20 switch (asc) { case PSW_ASC_PRIMARY: - PTE_DPRINTF("%s: asc=3Dprimary\n", __func__); asce =3D env->cregs[1]; break; case PSW_ASC_HOME: - PTE_DPRINTF("%s: asc=3Dhome\n", __func__); asce =3D env->cregs[13]; break; case PSW_ASC_SECONDARY: - PTE_DPRINTF("%s: asc=3Dsecondary\n", __func__); asce =3D env->cregs[7]; break; case PSW_ASC_ACCREG: --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570707385696792.7514731933873; Thu, 10 Oct 2019 04:36:25 -0700 (PDT) Received: from localhost ([::1]:36358 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWk1-00054y-7d for importer@patchew.org; Thu, 10 Oct 2019 07:36:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49952) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWht-0003CS-5o for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWhs-0005af-2T for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42542) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWhr-0005aK-Qw; Thu, 10 Oct 2019 07:34:08 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 074CF3C93D; Thu, 10 Oct 2019 11:34:07 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 84B1F5C1B5; Thu, 10 Oct 2019 11:34:03 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 02/31] s390x/mmu: Move DAT protection handling out of mmu_translate_asce() Date: Thu, 10 Oct 2019 13:33:27 +0200 Message-Id: <20191010113356.5017-3-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 10 Oct 2019 11:34:07 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We'll reuse the ilen and tec definitions in mmu_translate soon also for all other DAT exceptions we inject. Move it to the caller, where we can later pair it up with other protection checks, like IEP. Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 39 ++++++++++++++++----------------------- 1 file changed, 16 insertions(+), 23 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 6a7ad33c4d..847fb240fb 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -48,20 +48,6 @@ static void trigger_access_exception(CPUS390XState *env,= uint32_t type, } } =20 -static void trigger_prot_fault(CPUS390XState *env, target_ulong vaddr, - uint64_t asc, int rw, bool exc) -{ - uint64_t tec; - - tec =3D vaddr | (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ) | 4 | = asc >> 46; - - if (!exc) { - return; - } - - trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, tec); -} - static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr, uint32_t type, uint64_t asc, int rw, bool e= xc) { @@ -229,7 +215,6 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, int *flags, int rw, bool exc) { int level; - int r; =20 if (asce & ASCE_REAL_SPACE) { /* direct mapping */ @@ -277,14 +262,8 @@ static int mmu_translate_asce(CPUS390XState *env, targ= et_ulong vaddr, break; } =20 - r =3D mmu_translate_region(env, vaddr, asc, asce, level, raddr, flags,= rw, - exc); - if (!r && rw =3D=3D MMU_DATA_STORE && !(*flags & PAGE_WRITE)) { - trigger_prot_fault(env, vaddr, asc, rw, exc); - return -1; - } - - return r; + return mmu_translate_region(env, vaddr, asc, asce, level, raddr, flags= , rw, + exc); } =20 static void mmu_handle_skey(target_ulong addr, int rw, int *flags) @@ -369,6 +348,10 @@ static void mmu_handle_skey(target_ulong addr, int rw,= int *flags) int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, target_ulong *raddr, int *flags, bool exc) { + /* Code accesses have an undefined ilc, let's use 2 bytes. */ + const int ilen =3D (rw =3D=3D MMU_INST_FETCH) ? 2 : ILEN_AUTO; + uint64_t tec =3D (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | + (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ); uint64_t asce; int r; =20 @@ -421,6 +404,16 @@ int mmu_translate(CPUS390XState *env, target_ulong vad= dr, int rw, uint64_t asc, return r; } =20 + /* check for DAT protection */ + if (unlikely(rw =3D=3D MMU_DATA_STORE && !(*flags & PAGE_WRITE))) { + if (exc) { + /* DAT sets bit 61 only */ + tec |=3D 0x4; + trigger_access_exception(env, PGM_PROTECTION, ilen, tec); + } + return -1; + } + nodat: /* Convert real address -> absolute address */ *raddr =3D mmu_real2abs(env, *raddr); --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570707393; cv=none; d=zoho.com; s=zohoarc; b=hbVD983PccXsQOu2++eHUbHCtZj0D2b9kL9t1Ggv/cpMRYndAVCsnNBsBitHKnU4bHl3JfAHTYcZIRjtrrFvJwT4V6Bje2lGReldhr7B4pEq3VAA6nbDuU7V0NUFec6Z/SFuSozLT1vCyp6KXIGtHMkIqvS3l3klWIyrxjnto5E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570707393; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=UVmWU1qBGUP6WvWMBjr8HngB9TsfCCzB05PBvR28X4k=; b=XxepwpUWh7fjgcQn/V6THq5vB7TOTFQmPVjZ/2Mxwuc6VrdGBFAllZcQ93jZYqlTKqf3MpM8/iI60jtOyhV8NzEBBaqUYbG9odf9vSFOg6kiCppoLCLWs9XKLu19bBzstgHH0/eB7kD6VHiNK4uWOe1BdghWDUJPCc1EY0ehC4c= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570707393754489.94607996477885; Thu, 10 Oct 2019 04:36:33 -0700 (PDT) Received: from localhost ([::1]:36364 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkC-0005P9-0j for importer@patchew.org; Thu, 10 Oct 2019 07:36:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49996) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWi0-0003Mu-2J for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWhy-0005dJ-CJ for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50918) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWhy-0005cz-49; Thu, 10 Oct 2019 07:34:14 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 52FE1801664; Thu, 10 Oct 2019 11:34:13 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4A9F55C1B5; Thu, 10 Oct 2019 11:34:07 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 03/31] s390x/mmu: Inject DAT exceptions from a single place Date: Thu, 10 Oct 2019 13:33:28 +0200 Message-Id: <20191010113356.5017-4-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.67]); Thu, 10 Oct 2019 11:34:13 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let's return the PGM from the translation functions on error and inject based on that. Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 63 +++++++++++---------------------------- 1 file changed, 17 insertions(+), 46 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 847fb240fb..f6ae444655 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -48,26 +48,6 @@ static void trigger_access_exception(CPUS390XState *env,= uint32_t type, } } =20 -static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr, - uint32_t type, uint64_t asc, int rw, bool e= xc) -{ - int ilen =3D ILEN_AUTO; - uint64_t tec; - - tec =3D vaddr | (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ) | asc = >> 46; - - if (!exc) { - return; - } - - /* Code accesses have an undefined ilc. */ - if (rw =3D=3D MMU_INST_FETCH) { - ilen =3D 2; - } - - trigger_access_exception(env, type, ilen, tec); -} - /* check whether the address would be proteted by Low-Address Protection */ static bool is_low_address(uint64_t addr) { @@ -119,12 +99,10 @@ static int mmu_translate_pte(CPUS390XState *env, targe= t_ulong vaddr, target_ulong *raddr, int *flags, int rw, bool= exc) { if (pt_entry & PAGE_INVALID) { - trigger_page_fault(env, vaddr, PGM_PAGE_TRANS, asc, rw, exc); - return -1; + return PGM_PAGE_TRANS; } if (pt_entry & PAGE_RES0) { - trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw, exc); - return -1; + return PGM_TRANS_SPEC; } if (pt_entry & PAGE_RO) { *flags &=3D ~PAGE_WRITE; @@ -179,13 +157,11 @@ static int mmu_translate_region(CPUS390XState *env, t= arget_ulong vaddr, new_entry =3D ldq_phys(cs->as, origin + offs); =20 if ((new_entry & REGION_ENTRY_INV) !=3D 0) { - trigger_page_fault(env, vaddr, pchks[level / 4], asc, rw, exc); - return -1; + return pchks[level / 4]; } =20 if ((new_entry & REGION_ENTRY_TYPE_MASK) !=3D level) { - trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw, exc); - return -1; + return PGM_TRANS_SPEC; } =20 if (level =3D=3D ASCE_TYPE_SEGMENT) { @@ -197,8 +173,7 @@ static int mmu_translate_region(CPUS390XState *env, tar= get_ulong vaddr, offs =3D (vaddr >> (28 + 11 * (level - 4) / 4)) & 3; if (offs < ((new_entry & REGION_ENTRY_TF) >> 6) || offs > (new_entry & REGION_ENTRY_LENGTH)) { - trigger_page_fault(env, vaddr, pchks[level / 4 - 1], asc, rw, exc); - return -1; + return pchks[level / 4 - 1]; } =20 if ((env->cregs[0] & CR0_EDAT) && (new_entry & REGION_ENTRY_RO)) { @@ -226,38 +201,31 @@ static int mmu_translate_asce(CPUS390XState *env, tar= get_ulong vaddr, switch (level) { case ASCE_TYPE_REGION1: if ((vaddr >> 62) > (asce & ASCE_TABLE_LENGTH)) { - trigger_page_fault(env, vaddr, PGM_REG_FIRST_TRANS, asc, rw, e= xc); - return -1; + return PGM_REG_FIRST_TRANS; } break; case ASCE_TYPE_REGION2: if (vaddr & 0xffe0000000000000ULL) { - trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); - return -1; + return PGM_ASCE_TYPE; } if ((vaddr >> 51 & 3) > (asce & ASCE_TABLE_LENGTH)) { - trigger_page_fault(env, vaddr, PGM_REG_SEC_TRANS, asc, rw, exc= ); - return -1; + return PGM_REG_SEC_TRANS; } break; case ASCE_TYPE_REGION3: if (vaddr & 0xfffffc0000000000ULL) { - trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); - return -1; + return PGM_ASCE_TYPE; } if ((vaddr >> 40 & 3) > (asce & ASCE_TABLE_LENGTH)) { - trigger_page_fault(env, vaddr, PGM_REG_THIRD_TRANS, asc, rw, e= xc); - return -1; + return PGM_REG_THIRD_TRANS; } break; case ASCE_TYPE_SEGMENT: if (vaddr & 0xffffffff80000000ULL) { - trigger_page_fault(env, vaddr, PGM_ASCE_TYPE, asc, rw, exc); - return -1; + return PGM_ASCE_TYPE; } if ((vaddr >> 29 & 3) > (asce & ASCE_TABLE_LENGTH)) { - trigger_page_fault(env, vaddr, PGM_SEGMENT_TRANS, asc, rw, exc= ); - return -1; + return PGM_SEGMENT_TRANS; } break; } @@ -400,8 +368,11 @@ int mmu_translate(CPUS390XState *env, target_ulong vad= dr, int rw, uint64_t asc, =20 /* perform the DAT translation */ r =3D mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw, exc); - if (r) { - return r; + if (unlikely(r)) { + if (exc) { + trigger_access_exception(env, r, ilen, tec); + } + return -1; } =20 /* check for DAT protection */ --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570707624; cv=none; d=zoho.com; s=zohoarc; b=hwTGmvmqp/G6hCQSQVhEUZAs2m/S5pk95NcCFN1Zzw3Wljs9JtPJqmq7eOFVqwwuSRBpdjotVRE7bnYz4sUIBuCxFW6OaPBP2Iq4ZZVusOuluxrDfQS2D2Hx6WAh6UOITxgNPA3ehA3zbl/USColH40WOcFi9jceubWuDNUsxek= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; 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Thu, 10 Oct 2019 11:34:13 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 04/31] s390x/mmu: Inject PGM_ADDRESSING on bogus table addresses Date: Thu, 10 Oct 2019 13:33:29 +0200 Message-Id: <20191010113356.5017-5-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Thu, 10 Oct 2019 11:34:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let's document how it works and inject PGM_ADDRESSING if reading of table entries fails. Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index f6ae444655..71dee0a5d9 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -93,6 +93,27 @@ target_ulong mmu_real2abs(CPUS390XState *env, target_ulo= ng raddr) return raddr; } =20 +static inline bool read_table_entry(CPUS390XState *env, hwaddr gaddr, + uint64_t *entry) +{ + CPUState *cs =3D env_cpu(env); + + /* + * According to the PoP, these table addresses are "unpredictably real + * or absolute". Also, "it is unpredictable whether the address wraps + * or an addressing exception is recognized". + * + * We treat them as absolute addresses and don't wrap them. + */ + if (unlikely(address_space_read(cs->as, gaddr, MEMTXATTRS_UNSPECIFIED, + (uint8_t *)entry, sizeof(*entry)) !=3D + MEMTX_OK)) { + return false; + } + *entry =3D be64_to_cpu(*entry); + return true; +} + /* Decode page table entry (normal 4KB page) */ static int mmu_translate_pte(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t pt_entry, @@ -118,7 +139,6 @@ static int mmu_translate_segment(CPUS390XState *env, ta= rget_ulong vaddr, target_ulong *raddr, int *flags, int rw, bool exc) { - CPUState *cs =3D env_cpu(env); uint64_t origin, offs, pt_entry; =20 if (st_entry & SEGMENT_ENTRY_RO) { @@ -134,7 +154,9 @@ static int mmu_translate_segment(CPUS390XState *env, ta= rget_ulong vaddr, /* Look up 4KB page entry */ origin =3D st_entry & SEGMENT_ENTRY_ORIGIN; offs =3D (vaddr & VADDR_PX) >> 9; - pt_entry =3D ldq_phys(cs->as, origin + offs); + if (!read_table_entry(env, origin + offs, &pt_entry)) { + return PGM_ADDRESSING; + } return mmu_translate_pte(env, vaddr, asc, pt_entry, raddr, flags, rw, = exc); } =20 @@ -144,7 +166,6 @@ static int mmu_translate_region(CPUS390XState *env, tar= get_ulong vaddr, target_ulong *raddr, int *flags, int rw, bool exc) { - CPUState *cs =3D env_cpu(env); uint64_t origin, offs, new_entry; const int pchks[4] =3D { PGM_SEGMENT_TRANS, PGM_REG_THIRD_TRANS, @@ -154,7 +175,9 @@ static int mmu_translate_region(CPUS390XState *env, tar= get_ulong vaddr, origin =3D entry & REGION_ENTRY_ORIGIN; offs =3D (vaddr >> (17 + 11 * level / 4)) & 0x3ff8; =20 - new_entry =3D ldq_phys(cs->as, origin + offs); + if (!read_table_entry(env, origin + offs, &new_entry)) { + return PGM_ADDRESSING; + } =20 if ((new_entry & REGION_ENTRY_INV) !=3D 0) { return pchks[level / 4]; --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Thu, 10 Oct 2019 07:34:25 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BB81583F3D; Thu, 10 Oct 2019 11:34:20 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 44CE45C1B5; Thu, 10 Oct 2019 11:34:19 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 05/31] s390x/mmu: Use TARGET_PAGE_MASK in mmu_translate_pte() Date: Thu, 10 Oct 2019 13:33:30 +0200 Message-Id: <20191010113356.5017-6-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Thu, 10 Oct 2019 11:34:20 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" While ASCE_ORIGIN is not wrong, it is certainly confusing. We want a page frame address. Reviewed-by: Thomas Huth Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 71dee0a5d9..aaf5b23513 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -129,7 +129,7 @@ static int mmu_translate_pte(CPUS390XState *env, target= _ulong vaddr, *flags &=3D ~PAGE_WRITE; } =20 - *raddr =3D pt_entry & ASCE_ORIGIN; + *raddr =3D pt_entry & TARGET_PAGE_MASK; return 0; } =20 --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570707513; cv=none; d=zoho.com; s=zohoarc; b=UTtqSNZWtk/b2sTqNwpTXJ60OX4p75mwjnbbvGbYfNFCTCVKzAdLHNY3wGLKhfSOOn40OMh07o593XP6Du7kpWDHRAqlks/MMfswX8z8rhEa6ihi6L8pRq7seROqh4bUcIiJZWKN//FodjqcbsWeMt8MZGb7dY5tSGX5455O2Lc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570707513; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=LNSi7OjlXF29OPOhe306/jk/uFS83V1SlTkVSNlLPZI=; b=kufdOtwuRbwpA3nSfuAktKcqgUgJM1i3t3mKHg8tV/vzQEp/IMxzKFx02Lt0oZYDwY9veqmfkrCa+xN9d3CIdemr6ZDdJwGTI+HQad941CkKgiOEsWZ+0VWxo7r9g+XWCz5C6iJTdMZrWOlQ66EgEhUf7J5wlduXjJclVe13nMw= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570707513211957.7804356025537; Thu, 10 Oct 2019 04:38:33 -0700 (PDT) Received: from localhost ([::1]:36424 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWm7-0000Ag-Bw for importer@patchew.org; Thu, 10 Oct 2019 07:38:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50066) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWiC-0003Rf-SH for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWiB-0005l1-0y for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56792) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWi9-0005gl-4g; Thu, 10 Oct 2019 07:34:26 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 86AFB3086218; Thu, 10 Oct 2019 11:34:22 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 10F6B5C1B5; Thu, 10 Oct 2019 11:34:20 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 06/31] s390x/mmu: DAT table definition overhaul Date: Thu, 10 Oct 2019 13:33:31 +0200 Message-Id: <20191010113356.5017-7-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Thu, 10 Oct 2019 11:34:22 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let's use consistent names for the region/section/page table entries and for the macros to extract relevant parts from virtual address. Make them match the definitions in the PoP - e.g., how the relevant bits are actually called. Introduce defines for all bits declared in the PoP. This will come in handy in follow-up patches. Add a note where additional information about s390x and the used definitions can be found. Acked-by: Richard Henderson Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand --- target/s390x/cpu.h | 78 +++++++++++++++++++++++++++++---------- target/s390x/mem_helper.c | 12 +++--- target/s390x/mmu_helper.c | 37 ++++++++++--------- 3 files changed, 84 insertions(+), 43 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 163dae13d7..2db54884b8 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -1,6 +1,10 @@ /* * S/390 virtual CPU header * + * For details on the s390x architecture and used definitions (e.g., + * PSW, PER and DAT (Dynamic Address Translation)), please refer to + * the "z/Architecture Principles of Operations" - a.k.a. PoP. + * * Copyright (c) 2009 Ulrich Hecht * Copyright IBM Corp. 2012, 2018 * @@ -558,26 +562,60 @@ QEMU_BUILD_BUG_ON(sizeof(SysIB) !=3D 4096); #define ASCE_TYPE_SEGMENT 0x00 /* segment table type = */ #define ASCE_TABLE_LENGTH 0x03 /* region table length = */ =20 -#define REGION_ENTRY_ORIGIN (~0xfffULL) /* region/segment table origin = */ -#define REGION_ENTRY_RO 0x200 /* region/segment protection bit= */ -#define REGION_ENTRY_TF 0xc0 /* region/segment table offset = */ -#define REGION_ENTRY_INV 0x20 /* invalid region table entry = */ -#define REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mas= k */ -#define REGION_ENTRY_TYPE_R1 0x0c /* region first table type = */ -#define REGION_ENTRY_TYPE_R2 0x08 /* region second table type = */ -#define REGION_ENTRY_TYPE_R3 0x04 /* region third table type = */ -#define REGION_ENTRY_LENGTH 0x03 /* region third length = */ - -#define SEGMENT_ENTRY_ORIGIN (~0x7ffULL) /* segment table origin */ -#define SEGMENT_ENTRY_FC 0x400 /* format control */ -#define SEGMENT_ENTRY_RO 0x200 /* page protection bit */ -#define SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */ - -#define VADDR_PX 0xff000 /* page index bits */ - -#define PAGE_RO 0x200 /* HW read-only bit */ -#define PAGE_INVALID 0x400 /* HW invalid bit */ -#define PAGE_RES0 0x800 /* bit must be zero */ +#define REGION_ENTRY_ORIGIN 0xfffffffffffff000ULL +#define REGION_ENTRY_P 0x0000000000000200ULL +#define REGION_ENTRY_TF 0x00000000000000c0ULL +#define REGION_ENTRY_I 0x0000000000000020ULL +#define REGION_ENTRY_TT 0x000000000000000cULL +#define REGION_ENTRY_TL 0x0000000000000003ULL + +#define REGION_ENTRY_TT_REGION1 0x000000000000000cULL +#define REGION_ENTRY_TT_REGION2 0x0000000000000008ULL +#define REGION_ENTRY_TT_REGION3 0x0000000000000004ULL + +#define REGION3_ENTRY_RFAA 0xffffffff80000000ULL +#define REGION3_ENTRY_AV 0x0000000000010000ULL +#define REGION3_ENTRY_ACC 0x000000000000f000ULL +#define REGION3_ENTRY_F 0x0000000000000800ULL +#define REGION3_ENTRY_FC 0x0000000000000400ULL +#define REGION3_ENTRY_IEP 0x0000000000000100ULL +#define REGION3_ENTRY_CR 0x0000000000000010ULL + +#define SEGMENT_ENTRY_ORIGIN 0xfffffffffffff800ULL +#define SEGMENT_ENTRY_SFAA 0xfffffffffff00000ULL +#define SEGMENT_ENTRY_AV 0x0000000000010000ULL +#define SEGMENT_ENTRY_ACC 0x000000000000f000ULL +#define SEGMENT_ENTRY_F 0x0000000000000800ULL +#define SEGMENT_ENTRY_FC 0x0000000000000400ULL +#define SEGMENT_ENTRY_P 0x0000000000000200ULL +#define SEGMENT_ENTRY_IEP 0x0000000000000100ULL +#define SEGMENT_ENTRY_I 0x0000000000000020ULL +#define SEGMENT_ENTRY_CS 0x0000000000000010ULL +#define SEGMENT_ENTRY_TT 0x000000000000000cULL + +#define SEGMENT_ENTRY_TT_SEGMENT 0x0000000000000000ULL + +#define PAGE_ENTRY_0 0x0000000000000800ULL +#define PAGE_ENTRY_I 0x0000000000000400ULL +#define PAGE_ENTRY_P 0x0000000000000200ULL +#define PAGE_ENTRY_IEP 0x0000000000000100ULL + +#define VADDR_REGION1_TX_MASK 0xffe0000000000000ULL +#define VADDR_REGION2_TX_MASK 0x001ffc0000000000ULL +#define VADDR_REGION3_TX_MASK 0x000003ff80000000ULL +#define VADDR_SEGMENT_TX_MASK 0x000000007ff00000ULL +#define VADDR_PAGE_TX_MASK 0x00000000000ff000ULL + +#define VADDR_REGION1_TX(vaddr) (((vaddr) & VADDR_REGION1_TX_MASK) >> = 53) +#define VADDR_REGION2_TX(vaddr) (((vaddr) & VADDR_REGION2_TX_MASK) >> = 42) +#define VADDR_REGION3_TX(vaddr) (((vaddr) & VADDR_REGION3_TX_MASK) >> = 31) +#define VADDR_SEGMENT_TX(vaddr) (((vaddr) & VADDR_SEGMENT_TX_MASK) >> = 20) +#define VADDR_PAGE_TX(vaddr) (((vaddr) & VADDR_PAGE_TX_MASK) >> 12) + +#define VADDR_REGION1_TL(vaddr) (((vaddr) & 0xc000000000000000ULL) >> = 62) +#define VADDR_REGION2_TL(vaddr) (((vaddr) & 0x0018000000000000ULL) >> = 51) +#define VADDR_REGION3_TL(vaddr) (((vaddr) & 0x0000030000000000ULL) >> = 40) +#define VADDR_SEGMENT_TL(vaddr) (((vaddr) & 0x0000000060000000ULL) >> = 29) =20 #define SK_C (0x1 << 1) #define SK_R (0x1 << 2) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 44e535856d..08c5cc6a99 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2252,9 +2252,9 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, ui= nt64_t r2, uint32_t m4) /* addresses are not wrapped in 24/31bit mode but table index = is */ raddr =3D table + ((index + i) & 0x7ff) * sizeof(entry); entry =3D cpu_ldq_real_ra(env, raddr, ra); - if (!(entry & REGION_ENTRY_INV)) { + if (!(entry & REGION_ENTRY_I)) { /* we are allowed to not store if already invalid */ - entry |=3D REGION_ENTRY_INV; + entry |=3D REGION_ENTRY_I; cpu_stq_real_ra(env, raddr, entry, ra); } } @@ -2279,17 +2279,17 @@ void HELPER(ipte)(CPUS390XState *env, uint64_t pto,= uint64_t vaddr, =20 /* Compute the page table entry address */ pte_addr =3D (pto & SEGMENT_ENTRY_ORIGIN); - pte_addr +=3D (vaddr & VADDR_PX) >> 9; + pte_addr +=3D VADDR_PAGE_TX(vaddr) * 8; =20 /* Mark the page table entry as invalid */ pte =3D cpu_ldq_real_ra(env, pte_addr, ra); - pte |=3D PAGE_INVALID; + pte |=3D PAGE_ENTRY_I; cpu_stq_real_ra(env, pte_addr, pte, ra); =20 /* XXX we exploit the fact that Linux passes the exact virtual address here - it's not obliged to! */ if (m4 & 1) { - if (vaddr & ~VADDR_PX) { + if (vaddr & ~VADDR_PAGE_TX_MASK) { tlb_flush_page(cs, page); /* XXX 31-bit hack */ tlb_flush_page(cs, page ^ 0x80000000); @@ -2298,7 +2298,7 @@ void HELPER(ipte)(CPUS390XState *env, uint64_t pto, u= int64_t vaddr, tlb_flush(cs); } } else { - if (vaddr & ~VADDR_PX) { + if (vaddr & ~VADDR_PAGE_TX_MASK) { tlb_flush_page_all_cpus_synced(cs, page); /* XXX 31-bit hack */ tlb_flush_page_all_cpus_synced(cs, page ^ 0x80000000); diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index aaf5b23513..a114fb1628 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -119,13 +119,13 @@ static int mmu_translate_pte(CPUS390XState *env, targ= et_ulong vaddr, uint64_t asc, uint64_t pt_entry, target_ulong *raddr, int *flags, int rw, bool= exc) { - if (pt_entry & PAGE_INVALID) { + if (pt_entry & PAGE_ENTRY_I) { return PGM_PAGE_TRANS; } - if (pt_entry & PAGE_RES0) { + if (pt_entry & PAGE_ENTRY_0) { return PGM_TRANS_SPEC; } - if (pt_entry & PAGE_RO) { + if (pt_entry & PAGE_ENTRY_P) { *flags &=3D ~PAGE_WRITE; } =20 @@ -141,19 +141,20 @@ static int mmu_translate_segment(CPUS390XState *env, = target_ulong vaddr, { uint64_t origin, offs, pt_entry; =20 - if (st_entry & SEGMENT_ENTRY_RO) { + if (st_entry & SEGMENT_ENTRY_P) { *flags &=3D ~PAGE_WRITE; } =20 if ((st_entry & SEGMENT_ENTRY_FC) && (env->cregs[0] & CR0_EDAT)) { /* Decode EDAT1 segment frame absolute address (1MB page) */ - *raddr =3D (st_entry & 0xfffffffffff00000ULL) | (vaddr & 0xfffff); + *raddr =3D (st_entry & SEGMENT_ENTRY_SFAA) | + (vaddr & ~SEGMENT_ENTRY_SFAA); return 0; } =20 /* Look up 4KB page entry */ origin =3D st_entry & SEGMENT_ENTRY_ORIGIN; - offs =3D (vaddr & VADDR_PX) >> 9; + offs =3D VADDR_PAGE_TX(vaddr) * 8; if (!read_table_entry(env, origin + offs, &pt_entry)) { return PGM_ADDRESSING; } @@ -179,11 +180,11 @@ static int mmu_translate_region(CPUS390XState *env, t= arget_ulong vaddr, return PGM_ADDRESSING; } =20 - if ((new_entry & REGION_ENTRY_INV) !=3D 0) { + if (new_entry & REGION_ENTRY_I) { return pchks[level / 4]; } =20 - if ((new_entry & REGION_ENTRY_TYPE_MASK) !=3D level) { + if ((new_entry & REGION_ENTRY_TT) !=3D level) { return PGM_TRANS_SPEC; } =20 @@ -195,11 +196,11 @@ static int mmu_translate_region(CPUS390XState *env, t= arget_ulong vaddr, /* Check region table offset and length */ offs =3D (vaddr >> (28 + 11 * (level - 4) / 4)) & 3; if (offs < ((new_entry & REGION_ENTRY_TF) >> 6) - || offs > (new_entry & REGION_ENTRY_LENGTH)) { + || offs > (new_entry & REGION_ENTRY_TL)) { return pchks[level / 4 - 1]; } =20 - if ((env->cregs[0] & CR0_EDAT) && (new_entry & REGION_ENTRY_RO)) { + if ((env->cregs[0] & CR0_EDAT) && (new_entry & REGION_ENTRY_P)) { *flags &=3D ~PAGE_WRITE; } =20 @@ -212,6 +213,7 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, uint64_t asc, uint64_t asce, target_ulong *r= addr, int *flags, int rw, bool exc) { + const int asce_tl =3D asce & ASCE_TABLE_LENGTH; int level; =20 if (asce & ASCE_REAL_SPACE) { @@ -223,31 +225,32 @@ static int mmu_translate_asce(CPUS390XState *env, tar= get_ulong vaddr, level =3D asce & ASCE_TYPE_MASK; switch (level) { case ASCE_TYPE_REGION1: - if ((vaddr >> 62) > (asce & ASCE_TABLE_LENGTH)) { + if (VADDR_REGION1_TL(vaddr) > asce_tl) { return PGM_REG_FIRST_TRANS; } break; case ASCE_TYPE_REGION2: - if (vaddr & 0xffe0000000000000ULL) { + if (VADDR_REGION1_TX(vaddr)) { return PGM_ASCE_TYPE; } - if ((vaddr >> 51 & 3) > (asce & ASCE_TABLE_LENGTH)) { + if (VADDR_REGION2_TL(vaddr) > asce_tl) { return PGM_REG_SEC_TRANS; } break; case ASCE_TYPE_REGION3: - if (vaddr & 0xfffffc0000000000ULL) { + if (VADDR_REGION1_TX(vaddr) || VADDR_REGION2_TX(vaddr)) { return PGM_ASCE_TYPE; } - if ((vaddr >> 40 & 3) > (asce & ASCE_TABLE_LENGTH)) { + if (VADDR_REGION3_TL(vaddr) > asce_tl) { return PGM_REG_THIRD_TRANS; } break; case ASCE_TYPE_SEGMENT: - if (vaddr & 0xffffffff80000000ULL) { + if (VADDR_REGION1_TX(vaddr) || VADDR_REGION2_TX(vaddr) || + VADDR_REGION3_TX(vaddr)) { return PGM_ASCE_TYPE; } - if ((vaddr >> 29 & 3) > (asce & ASCE_TABLE_LENGTH)) { + if (VADDR_SEGMENT_TL(vaddr) > asce_tl) { return PGM_SEGMENT_TRANS; } break; --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; 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mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570707841384241.47084742765503; Thu, 10 Oct 2019 04:44:01 -0700 (PDT) Received: from localhost ([::1]:36500 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWrP-0006A8-Qj for importer@patchew.org; Thu, 10 Oct 2019 07:43:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50062) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWiC-0003Re-Pv for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWiB-0005lQ-7G for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57862) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiA-0005ih-V0; Thu, 10 Oct 2019 07:34:27 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 51AED308C38D; Thu, 10 Oct 2019 11:34:24 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id CFDFF5C1B5; Thu, 10 Oct 2019 11:34:22 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 07/31] s390x/mmu: Convert to non-recursive page table walk Date: Thu, 10 Oct 2019 13:33:32 +0200 Message-Id: <20191010113356.5017-8-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Thu, 10 Oct 2019 11:34:24 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" A non-recursive implementation allows to make better use of the branch predictor, avoids function calls, and makes the implementation of new features only for a subset of region table levels easier. We can now directly compare our implementation to the KVM gaccess implementation in arch/s390/kvm/gaccess.c:guest_translate(). Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 208 ++++++++++++++++++++------------------ 1 file changed, 108 insertions(+), 100 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index a114fb1628..dc33c63b1d 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -114,107 +114,16 @@ static inline bool read_table_entry(CPUS390XState *e= nv, hwaddr gaddr, return true; } =20 -/* Decode page table entry (normal 4KB page) */ -static int mmu_translate_pte(CPUS390XState *env, target_ulong vaddr, - uint64_t asc, uint64_t pt_entry, - target_ulong *raddr, int *flags, int rw, bool= exc) -{ - if (pt_entry & PAGE_ENTRY_I) { - return PGM_PAGE_TRANS; - } - if (pt_entry & PAGE_ENTRY_0) { - return PGM_TRANS_SPEC; - } - if (pt_entry & PAGE_ENTRY_P) { - *flags &=3D ~PAGE_WRITE; - } - - *raddr =3D pt_entry & TARGET_PAGE_MASK; - return 0; -} - -/* Decode segment table entry */ -static int mmu_translate_segment(CPUS390XState *env, target_ulong vaddr, - uint64_t asc, uint64_t st_entry, - target_ulong *raddr, int *flags, int rw, - bool exc) -{ - uint64_t origin, offs, pt_entry; - - if (st_entry & SEGMENT_ENTRY_P) { - *flags &=3D ~PAGE_WRITE; - } - - if ((st_entry & SEGMENT_ENTRY_FC) && (env->cregs[0] & CR0_EDAT)) { - /* Decode EDAT1 segment frame absolute address (1MB page) */ - *raddr =3D (st_entry & SEGMENT_ENTRY_SFAA) | - (vaddr & ~SEGMENT_ENTRY_SFAA); - return 0; - } - - /* Look up 4KB page entry */ - origin =3D st_entry & SEGMENT_ENTRY_ORIGIN; - offs =3D VADDR_PAGE_TX(vaddr) * 8; - if (!read_table_entry(env, origin + offs, &pt_entry)) { - return PGM_ADDRESSING; - } - return mmu_translate_pte(env, vaddr, asc, pt_entry, raddr, flags, rw, = exc); -} - -/* Decode region table entries */ -static int mmu_translate_region(CPUS390XState *env, target_ulong vaddr, - uint64_t asc, uint64_t entry, int level, - target_ulong *raddr, int *flags, int rw, - bool exc) -{ - uint64_t origin, offs, new_entry; - const int pchks[4] =3D { - PGM_SEGMENT_TRANS, PGM_REG_THIRD_TRANS, - PGM_REG_SEC_TRANS, PGM_REG_FIRST_TRANS - }; - - origin =3D entry & REGION_ENTRY_ORIGIN; - offs =3D (vaddr >> (17 + 11 * level / 4)) & 0x3ff8; - - if (!read_table_entry(env, origin + offs, &new_entry)) { - return PGM_ADDRESSING; - } - - if (new_entry & REGION_ENTRY_I) { - return pchks[level / 4]; - } - - if ((new_entry & REGION_ENTRY_TT) !=3D level) { - return PGM_TRANS_SPEC; - } - - if (level =3D=3D ASCE_TYPE_SEGMENT) { - return mmu_translate_segment(env, vaddr, asc, new_entry, raddr, fl= ags, - rw, exc); - } - - /* Check region table offset and length */ - offs =3D (vaddr >> (28 + 11 * (level - 4) / 4)) & 3; - if (offs < ((new_entry & REGION_ENTRY_TF) >> 6) - || offs > (new_entry & REGION_ENTRY_TL)) { - return pchks[level / 4 - 1]; - } - - if ((env->cregs[0] & CR0_EDAT) && (new_entry & REGION_ENTRY_P)) { - *flags &=3D ~PAGE_WRITE; - } - - /* yet another region */ - return mmu_translate_region(env, vaddr, asc, new_entry, level - 4, - raddr, flags, rw, exc); -} - static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t asce, target_ulong *r= addr, int *flags, int rw, bool exc) { + const bool edat1 =3D (env->cregs[0] & CR0_EDAT) && + s390_has_feat(S390_FEAT_EDAT); const int asce_tl =3D asce & ASCE_TABLE_LENGTH; - int level; + const int asce_p =3D asce & ASCE_PRIVATE_SPACE; + hwaddr gaddr =3D asce & ASCE_ORIGIN; + uint64_t entry; =20 if (asce & ASCE_REAL_SPACE) { /* direct mapping */ @@ -222,12 +131,12 @@ static int mmu_translate_asce(CPUS390XState *env, tar= get_ulong vaddr, return 0; } =20 - level =3D asce & ASCE_TYPE_MASK; - switch (level) { + switch (asce & ASCE_TYPE_MASK) { case ASCE_TYPE_REGION1: if (VADDR_REGION1_TL(vaddr) > asce_tl) { return PGM_REG_FIRST_TRANS; } + gaddr +=3D VADDR_REGION1_TX(vaddr) * 8; break; case ASCE_TYPE_REGION2: if (VADDR_REGION1_TX(vaddr)) { @@ -236,6 +145,7 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, if (VADDR_REGION2_TL(vaddr) > asce_tl) { return PGM_REG_SEC_TRANS; } + gaddr +=3D VADDR_REGION2_TX(vaddr) * 8; break; case ASCE_TYPE_REGION3: if (VADDR_REGION1_TX(vaddr) || VADDR_REGION2_TX(vaddr)) { @@ -244,6 +154,7 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, if (VADDR_REGION3_TL(vaddr) > asce_tl) { return PGM_REG_THIRD_TRANS; } + gaddr +=3D VADDR_REGION3_TX(vaddr) * 8; break; case ASCE_TYPE_SEGMENT: if (VADDR_REGION1_TX(vaddr) || VADDR_REGION2_TX(vaddr) || @@ -253,11 +164,108 @@ static int mmu_translate_asce(CPUS390XState *env, ta= rget_ulong vaddr, if (VADDR_SEGMENT_TL(vaddr) > asce_tl) { return PGM_SEGMENT_TRANS; } + gaddr +=3D VADDR_SEGMENT_TX(vaddr) * 8; + break; + } + + switch (asce & ASCE_TYPE_MASK) { + case ASCE_TYPE_REGION1: + if (!read_table_entry(env, gaddr, &entry)) { + return PGM_ADDRESSING; + } + if (entry & REGION_ENTRY_I) { + return PGM_REG_FIRST_TRANS; + } + if ((entry & REGION_ENTRY_TT) !=3D REGION_ENTRY_TT_REGION1) { + return PGM_TRANS_SPEC; + } + if (VADDR_REGION2_TL(vaddr) < (entry & REGION_ENTRY_TF) >> 6 || + VADDR_REGION2_TL(vaddr) > (entry & REGION_ENTRY_TL)) { + return PGM_REG_SEC_TRANS; + } + if (edat1 && (entry & REGION_ENTRY_P)) { + *flags &=3D ~PAGE_WRITE; + } + gaddr =3D (entry & REGION_ENTRY_ORIGIN) + VADDR_REGION2_TX(vaddr) = * 8; + /* fall through */ + case ASCE_TYPE_REGION2: + if (!read_table_entry(env, gaddr, &entry)) { + return PGM_ADDRESSING; + } + if (entry & REGION_ENTRY_I) { + return PGM_REG_SEC_TRANS; + } + if ((entry & REGION_ENTRY_TT) !=3D REGION_ENTRY_TT_REGION2) { + return PGM_TRANS_SPEC; + } + if (VADDR_REGION3_TL(vaddr) < (entry & REGION_ENTRY_TF) >> 6 || + VADDR_REGION3_TL(vaddr) > (entry & REGION_ENTRY_TL)) { + return PGM_REG_THIRD_TRANS; + } + if (edat1 && (entry & REGION_ENTRY_P)) { + *flags &=3D ~PAGE_WRITE; + } + gaddr =3D (entry & REGION_ENTRY_ORIGIN) + VADDR_REGION3_TX(vaddr) = * 8; + /* fall through */ + case ASCE_TYPE_REGION3: + if (!read_table_entry(env, gaddr, &entry)) { + return PGM_ADDRESSING; + } + if (entry & REGION_ENTRY_I) { + return PGM_REG_THIRD_TRANS; + } + if ((entry & REGION_ENTRY_TT) !=3D REGION_ENTRY_TT_REGION3) { + return PGM_TRANS_SPEC; + } + if (VADDR_SEGMENT_TL(vaddr) < (entry & REGION_ENTRY_TF) >> 6 || + VADDR_SEGMENT_TL(vaddr) > (entry & REGION_ENTRY_TL)) { + return PGM_SEGMENT_TRANS; + } + if (edat1 && (entry & REGION_ENTRY_P)) { + *flags &=3D ~PAGE_WRITE; + } + gaddr =3D (entry & REGION_ENTRY_ORIGIN) + VADDR_SEGMENT_TX(vaddr) = * 8; + /* fall through */ + case ASCE_TYPE_SEGMENT: + if (!read_table_entry(env, gaddr, &entry)) { + return PGM_ADDRESSING; + } + if (entry & SEGMENT_ENTRY_I) { + return PGM_SEGMENT_TRANS; + } + if ((entry & SEGMENT_ENTRY_TT) !=3D SEGMENT_ENTRY_TT_SEGMENT) { + return PGM_TRANS_SPEC; + } + if ((entry & SEGMENT_ENTRY_CS) && asce_p) { + return PGM_TRANS_SPEC; + } + if (entry & SEGMENT_ENTRY_P) { + *flags &=3D ~PAGE_WRITE; + } + if (edat1 && (entry & SEGMENT_ENTRY_FC)) { + *raddr =3D (entry & SEGMENT_ENTRY_SFAA) | + (vaddr & ~SEGMENT_ENTRY_SFAA); + return 0; + } + gaddr =3D (entry & SEGMENT_ENTRY_ORIGIN) + VADDR_PAGE_TX(vaddr) * = 8; break; } =20 - return mmu_translate_region(env, vaddr, asc, asce, level, raddr, flags= , rw, - exc); + if (!read_table_entry(env, gaddr, &entry)) { + return PGM_ADDRESSING; + } + if (entry & PAGE_ENTRY_I) { + return PGM_PAGE_TRANS; + } + if (entry & PAGE_ENTRY_0) { + return PGM_TRANS_SPEC; + } + if (entry & PAGE_ENTRY_P) { + *flags &=3D ~PAGE_WRITE; + } + + *raddr =3D entry & TARGET_PAGE_MASK; + return 0; } =20 static void mmu_handle_skey(target_ulong addr, int rw, int *flags) --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570707732; cv=none; d=zoho.com; s=zohoarc; b=BV/74Fnxp2koGHJ36YUej4vvl1a+5NOfV3G9G8clHopo7XQQ76icOtJiVCbvY6nIl3bq7TDeP9w5YSUhhLaqHkBrTJuLk9aFLmRXyeQMyGKNqHsRn1GIek+/VZR7jqhc+RzfM2USKGPiqozN2rdqE2B1yghAtgrFZpOgPhfrSNM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570707732; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=iLB35djPDuCfjtwDSJjmozfLdOBTtPawKRNdfED29RI=; b=jgk2TX3icxuZ1IMHrlTidOi4UGTxNDxDn97ycKZkXajnEFCEuqo4UUawGXH6jCFc6Kgrzqx0MG0sMmqpDfxw2iwzeFEBkN+oJAJUhhMX7jtFRL2FMZEWLPZvB3pUqBYMgWxZymDMuFoU1Td3Axf8pfpd5m8Dq6mzgoIfH1WPaI0= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570707732197824.08320918577; Thu, 10 Oct 2019 04:42:12 -0700 (PDT) Received: from localhost ([::1]:36466 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWpe-0004DA-GG for importer@patchew.org; Thu, 10 Oct 2019 07:42:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50052) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWiC-0003Rd-8F for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWiB-0005lF-5E for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33254) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiA-0005kh-W8; Thu, 10 Oct 2019 07:34:27 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 202013D94D; Thu, 10 Oct 2019 11:34:26 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9B2B35C22C; Thu, 10 Oct 2019 11:34:24 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 08/31] s390x/mmu: Add EDAT2 translation support Date: Thu, 10 Oct 2019 13:33:33 +0200 Message-Id: <20191010113356.5017-9-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Thu, 10 Oct 2019 11:34:26 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" This only adds basic support to the DAT translation, but no EDAT2 support for TCG. E.g., the gdbstub under kvm uses this function, too, to translate virtual addresses. Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index dc33c63b1d..e27e21328b 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -120,6 +120,7 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, { const bool edat1 =3D (env->cregs[0] & CR0_EDAT) && s390_has_feat(S390_FEAT_EDAT); + const bool edat2 =3D edat1 && s390_has_feat(S390_FEAT_EDAT_2); const int asce_tl =3D asce & ASCE_TABLE_LENGTH; const int asce_p =3D asce & ASCE_PRIVATE_SPACE; hwaddr gaddr =3D asce & ASCE_ORIGIN; @@ -217,13 +218,21 @@ static int mmu_translate_asce(CPUS390XState *env, tar= get_ulong vaddr, if ((entry & REGION_ENTRY_TT) !=3D REGION_ENTRY_TT_REGION3) { return PGM_TRANS_SPEC; } - if (VADDR_SEGMENT_TL(vaddr) < (entry & REGION_ENTRY_TF) >> 6 || - VADDR_SEGMENT_TL(vaddr) > (entry & REGION_ENTRY_TL)) { - return PGM_SEGMENT_TRANS; + if (edat2 && (entry & REGION3_ENTRY_CR) && asce_p) { + return PGM_TRANS_SPEC; } if (edat1 && (entry & REGION_ENTRY_P)) { *flags &=3D ~PAGE_WRITE; } + if (edat2 && (entry & REGION3_ENTRY_FC)) { + *raddr =3D (entry & REGION3_ENTRY_RFAA) | + (vaddr & ~REGION3_ENTRY_RFAA); + return 0; + } + if (VADDR_SEGMENT_TL(vaddr) < (entry & REGION_ENTRY_TF) >> 6 || + VADDR_SEGMENT_TL(vaddr) > (entry & REGION_ENTRY_TL)) { + return PGM_SEGMENT_TRANS; + } gaddr =3D (entry & REGION_ENTRY_ORIGIN) + VADDR_SEGMENT_TX(vaddr) = * 8; /* fall through */ case ASCE_TYPE_SEGMENT: --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 10 Oct 2019 11:34:27 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 65E125C1B5; Thu, 10 Oct 2019 11:34:26 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 09/31] s390x/mmu: Implement ESOP-2 and access-exception-fetch/store-indication facility Date: Thu, 10 Oct 2019 13:33:34 +0200 Message-Id: <20191010113356.5017-10-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Thu, 10 Oct 2019 11:34:27 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We already implement ESOP-1. For ESOP-2, we only have to indicate all protection exceptions properly. Due to EDAT-1, we already indicate DAT exceptions properly. We don't trigger KCP/ALCP/IEP exceptions yet. So all we have to do is set the TEID (TEC) to the right values (bit 56, 60, 61) in case of LAP. We don't have any side-effects (e.g., no guarded-storage facility), therefore, bit 64 of the TEID (TEC) is always 0. We always have to indicate whether it is a fetch or a store for all access exceptions. This is only missing for LAP exceptions. Acked-by: Thomas Huth Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index e27e21328b..06502bd25d 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -380,7 +380,9 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, *flags |=3D PAGE_WRITE_INV; if (is_low_address(vaddr) && rw =3D=3D MMU_DATA_STORE) { if (exc) { - trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, 0= ); + /* LAP sets bit 56 */ + tec |=3D 0x80; + trigger_access_exception(env, PGM_PROTECTION, ilen, tec); } return -EACCES; } @@ -536,6 +538,9 @@ void s390_cpu_virt_mem_handle_exc(S390CPU *cpu, uintptr= _t ra) int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, target_ulong *addr, int *flags) { + /* Code accesses have an undefined ilc, let's use 2 bytes. */ + uint64_t tec =3D (raddr & TARGET_PAGE_MASK) | + (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ); const bool lowprot_enabled =3D env->cregs[0] & CR0_LOWPROT; =20 *flags =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -543,7 +548,9 @@ int mmu_translate_real(CPUS390XState *env, target_ulong= raddr, int rw, /* see comment in mmu_translate() how this works */ *flags |=3D PAGE_WRITE_INV; if (is_low_address(raddr) && rw =3D=3D MMU_DATA_STORE) { - trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, 0); + /* LAP sets bit 56 */ + tec |=3D 0x80; + trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, tec); return -EACCES; } } --=20 2.21.0 From nobody Tue Apr 16 14:19:50 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570707517; cv=none; d=zoho.com; s=zohoarc; b=k7dulgAidqomzVJptVDLpdDpUXjc0EemRz2EjeZZu0WgeAG/pAYO6U6ReYJA50D2vLFw63lNnPMRskfHa9ZpUvnwMOl+8Nm9rVGbzFRZw6e/4k2lhbwDR0BiP3qMiCrcnJDzWsGB1jp0H8Y+sQ/kZk3utZiwxG3G/XV416eT3S8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570707517; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=AWuzFeMyRo0ApXZOd/MMWiBrmDi7BT8IyTYR2h0xdYE=; b=hxUQHqGKPWbcaDcAtEleNkrPRs4JD+fYOrNa/yxlJXlhOCSR2YikosUTNQclVY70MCLqXMJ7bdf67FE6u4oB6YyVke9v6nol68EImTuea07QzzBdcLdD5qHd+p4XOPrapkUVEo7mlFUSSIGnNDD5vSKildThoZ8g/GbeqkXWJHE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570707517170584.5029657759151; Thu, 10 Oct 2019 04:38:37 -0700 (PDT) Received: from localhost ([::1]:36426 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWmB-0000E6-Lr for importer@patchew.org; Thu, 10 Oct 2019 07:38:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50122) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWiG-0003V7-07 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWiE-0005nH-Lu for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:31 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56140) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiE-0005mn-Dn; Thu, 10 Oct 2019 07:34:30 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A55AC302246D; Thu, 10 Oct 2019 11:34:29 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 321855C1B5; Thu, 10 Oct 2019 11:34:28 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 10/31] s390x/mmu: Implement Instruction-Execution-Protection Facility Date: Thu, 10 Oct 2019 13:33:35 +0200 Message-Id: <20191010113356.5017-11-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Thu, 10 Oct 2019 11:34:29 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" IEP support in the mmu is fairly easy. Set the right permissions for TLB entries and properly report an exception. Make sure to handle EDAT-2 by setting bit 56/60/61 of the TEID (TEC) to the right values. Let's keep s390_cpu_get_phys_page_debug() working even if IEP is active. Switch MMU_DATA_LOAD - this has no other effects any more as the ASC to be used is now fully selected outside of mmu_translate(). Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand --- target/s390x/cpu.h | 1 + target/s390x/helper.c | 6 +++++- target/s390x/mmu_helper.c | 21 +++++++++++++++++++++ 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 2db54884b8..b907741858 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -315,6 +315,7 @@ extern const VMStateDescription vmstate_s390_cpu; #define CR0_EDAT 0x0000000000800000ULL #define CR0_AFP 0x0000000000040000ULL #define CR0_VECTOR 0x0000000000020000ULL +#define CR0_IEP 0x0000000000100000ULL #define CR0_EMERGENCY_SIGNAL_SC 0x0000000000004000ULL #define CR0_EXTERNAL_CALL_SC 0x0000000000002000ULL #define CR0_CKC_SC 0x0000000000000800ULL diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 948c0398d4..bf503b56ee 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -63,7 +63,11 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr = vaddr) asc =3D PSW_ASC_PRIMARY; } =20 - if (mmu_translate(env, vaddr, MMU_INST_FETCH, asc, &raddr, &prot, fals= e)) { + /* + * We want to read code even if IEP is active. Use MMU_DATA_LOAD inste= ad + * of MMU_INST_FETCH. + */ + if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, false= )) { return -1; } return raddr; diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 06502bd25d..4a794dadcf 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -121,6 +121,8 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, const bool edat1 =3D (env->cregs[0] & CR0_EDAT) && s390_has_feat(S390_FEAT_EDAT); const bool edat2 =3D edat1 && s390_has_feat(S390_FEAT_EDAT_2); + const bool iep =3D (env->cregs[0] & CR0_IEP) && + s390_has_feat(S390_FEAT_INSTRUCTION_EXEC_PROT); const int asce_tl =3D asce & ASCE_TABLE_LENGTH; const int asce_p =3D asce & ASCE_PRIVATE_SPACE; hwaddr gaddr =3D asce & ASCE_ORIGIN; @@ -225,6 +227,9 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, *flags &=3D ~PAGE_WRITE; } if (edat2 && (entry & REGION3_ENTRY_FC)) { + if (iep && (entry & REGION3_ENTRY_IEP)) { + *flags &=3D ~PAGE_EXEC; + } *raddr =3D (entry & REGION3_ENTRY_RFAA) | (vaddr & ~REGION3_ENTRY_RFAA); return 0; @@ -252,6 +257,9 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, *flags &=3D ~PAGE_WRITE; } if (edat1 && (entry & SEGMENT_ENTRY_FC)) { + if (iep && (entry & SEGMENT_ENTRY_IEP)) { + *flags &=3D ~PAGE_EXEC; + } *raddr =3D (entry & SEGMENT_ENTRY_SFAA) | (vaddr & ~SEGMENT_ENTRY_SFAA); return 0; @@ -272,6 +280,9 @@ static int mmu_translate_asce(CPUS390XState *env, targe= t_ulong vaddr, if (entry & PAGE_ENTRY_P) { *flags &=3D ~PAGE_WRITE; } + if (iep && (entry & PAGE_ENTRY_IEP)) { + *flags &=3D ~PAGE_EXEC; + } =20 *raddr =3D entry & TARGET_PAGE_MASK; return 0; @@ -430,6 +441,16 @@ int mmu_translate(CPUS390XState *env, target_ulong vad= dr, int rw, uint64_t asc, return -1; } =20 + /* check for Instruction-Execution-Protection */ + if (unlikely(rw =3D=3D MMU_INST_FETCH && !(*flags & PAGE_EXEC))) { + if (exc) { + /* IEP sets bit 56 and 61 */ + tec |=3D 0x84; + trigger_access_exception(env, PGM_PROTECTION, ilen, tec); + } + return -1; + } + nodat: /* Convert real address -> absolute address */ *raddr =3D mmu_real2abs(env, *raddr); --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708063; cv=none; d=zoho.com; s=zohoarc; b=dpuG4SHmflOii2Wbhd1YDnxR++ZlVq2c0mFyHsjZ7/NNnJpv7JuD+tvAdIyNcLV4VHeEGs0m3b353wlHkdnsQiifLymWF5oj9bTJHsaqz2vJW1hMHJEn0yfVOYYdrMB3N96dny3GDWFPLepa139vQ+MvTUy9vZ09twBcIMi+o48= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570708063; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Thu, 10 Oct 2019 07:34:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWiG-0005oP-C0 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57888) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiG-0005nx-6n; Thu, 10 Oct 2019 07:34:32 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 70F5E307D88C; Thu, 10 Oct 2019 11:34:31 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id F09BD5C1B5; Thu, 10 Oct 2019 11:34:29 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 11/31] s390x/cpumodel: Prepare for changes of QEMU model Date: Thu, 10 Oct 2019 13:33:36 +0200 Message-Id: <20191010113356.5017-12-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Thu, 10 Oct 2019 11:34:31 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Setup the 4.1 compatibility model so we can add new features to the LATEST model. Reviewed-by: Cornelia Huck Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand --- hw/s390x/s390-virtio-ccw.c | 2 ++ target/s390x/gen-features.c | 6 +++++- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c index 18ad279a00..d3edeef0ad 100644 --- a/hw/s390x/s390-virtio-ccw.c +++ b/hw/s390x/s390-virtio-ccw.c @@ -650,7 +650,9 @@ DEFINE_CCW_MACHINE(4_2, "4.2", true); =20 static void ccw_machine_4_1_instance_options(MachineState *machine) { + static const S390FeatInit qemu_cpu_feat =3D { S390_FEAT_LIST_QEMU_V4_1= }; ccw_machine_4_2_instance_options(machine); + s390_set_qemu_cpu_model(0x2964, 13, 2, qemu_cpu_feat); } =20 static void ccw_machine_4_1_class_options(MachineClass *mc) diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 49a650ac52..7e82f2f004 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -698,11 +698,14 @@ static uint16_t qemu_V4_0[] =3D { S390_FEAT_ZPCI, }; =20 -static uint16_t qemu_LATEST[] =3D { +static uint16_t qemu_V4_1[] =3D { S390_FEAT_STFLE_53, S390_FEAT_VECTOR, }; =20 +static uint16_t qemu_LATEST[] =3D { +}; + /* add all new definitions before this point */ static uint16_t qemu_MAX[] =3D { /* generates a dependency warning, leave it out for now */ @@ -824,6 +827,7 @@ static FeatGroupDefSpec QemuFeatDef[] =3D { QEMU_FEAT_INITIALIZER(V2_11), QEMU_FEAT_INITIALIZER(V3_1), QEMU_FEAT_INITIALIZER(V4_0), + QEMU_FEAT_INITIALIZER(V4_1), QEMU_FEAT_INITIALIZER(LATEST), QEMU_FEAT_INITIALIZER(MAX), }; --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Thu, 10 Oct 2019 11:34:43 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id B95C35C1B5; Thu, 10 Oct 2019 11:34:31 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 12/31] s390x/cpumodel: Add new TCG features to QEMU cpu model Date: Thu, 10 Oct 2019 13:33:37 +0200 Message-Id: <20191010113356.5017-13-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 10 Oct 2019 11:34:43 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We now implement a bunch of new facilities we can properly indicate. ESOP-1/ESOP-2 handling is discussed in the PoP Chafter 3-15 ("Suppression on Protection"). The "Basic suppression-on-protection (SOP) facility" is a core part of z/Architecture without a facility indication. ESOP-2 is indicated by ESOP-1 + Side-effect facility ("ESOP-2"). Besides ESOP-2, the side-effect facility is only relevant for the guarded-storage facility (we don't implement). S390_ESOP: - We indicate DAT exeptions by setting bit 61 of the TEID (TEC) to 1 and bit 60 to zero. We don't trigger ALCP exceptions yet. Also, we set bit 0-51 and bit 62/63 to the right values. S390_ACCESS_EXCEPTION_FS_INDICATION: - The TEID (TEC) properly indicates in bit 52/53 on any access if it was a fetch or a store S390_SIDE_EFFECT_ACCESS_ESOP2: - We have no side-effect accesses (esp., we don't implement the guarded-storage faciliy), we correctly set bit 64 of the TEID (TEC) to 0 (no side-effect). - ESOP2: We properly set bit 56, 60, 61 in the TEID (TEC) to indicate the type of protection. We don't trigger KCP/ALCP exceptions yet. S390_INSTRUCTION_EXEC_PROT: - The MMU properly detects and indicates the exception on instruction fetch= es - Protected TLB entries will never get PAGE_EXEC set. There is no need to fake the abscence of any of the facilities - without the facilities, some bits of the TEID (TEC) are simply unpredictable. As IEP was added with z14 and we currently implement a z13, add it to the MAX model instead. Acked-by: Cornelia Huck Signed-off-by: David Hildenbrand --- target/s390x/gen-features.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 7e82f2f004..6278845b12 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -704,12 +704,17 @@ static uint16_t qemu_V4_1[] =3D { }; =20 static uint16_t qemu_LATEST[] =3D { + S390_FEAT_ACCESS_EXCEPTION_FS_INDICATION, + S390_FEAT_SIDE_EFFECT_ACCESS_ESOP2, + S390_FEAT_ESOP, }; =20 /* add all new definitions before this point */ static uint16_t qemu_MAX[] =3D { /* generates a dependency warning, leave it out for now */ S390_FEAT_MSA_EXT_5, + /* features introduced after the z13 */ + S390_FEAT_INSTRUCTION_EXEC_PROT, }; =20 /****** END FEATURE DEFS ******/ --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708110; cv=none; d=zoho.com; s=zohoarc; b=A/sXB+2KDGKS53DxyUqjeM5TQBhYp7Fy6YWcERxXbeUDZ9X8XR2HjXgryWFQ3prlpmPbDv2XXTl2C3/lOswS42YEdTugJOvyAztCfr6SmXrbWnv77PY3Q5C/4XOoc04LqY/jvpl8vLIHi2b3SB179KDQy0vvknPwi1Cb7dha86E= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570708110; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=fdJYLoJQTo3DxAV2Q+smPypTa6uJNS1+1xGqKyHggyg=; b=RwE5K2TJD6lGk3iEW6g3lheV4AcZhyW8CLV/0OsiLvcSPFWLjoMOv7owBsZE+/qHEqHZfMEfy6FA4z0YS9imEqZIWXR7NBdpjhjqDDwCYZEnWuD0QLp4uMgr7NP749YooBlRLthcnB8p3WFZU0W344qsw36+g00DGCznjzLuJow= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570708110521479.45652178632474; Thu, 10 Oct 2019 04:48:30 -0700 (PDT) Received: from localhost ([::1]:36682 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWvk-0002tP-Lc for importer@patchew.org; Thu, 10 Oct 2019 07:48:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50254) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWiY-000415-39 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWiW-0005uf-Nj for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:34:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:41050) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiW-0005uE-FH; Thu, 10 Oct 2019 07:34:48 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A7A6A10C0925; Thu, 10 Oct 2019 11:34:47 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id F1A6F5C1B5; Thu, 10 Oct 2019 11:34:43 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 13/31] target/s390x: Add ilen to unwind data Date: Thu, 10 Oct 2019 13:33:38 +0200 Message-Id: <20191010113356.5017-14-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.66]); Thu, 10 Oct 2019 11:34:47 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Hildenbrand , Cornelia Huck , Richard Henderson , qemu-s390x@nongnu.org, Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Use ILEN_UNWIND to signal that we have in fact that cpu_restore_state will have been called by the time we arrive in do_program_interrupt. Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-2-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand Signed-off-by: David Hildenbrand --- target/s390x/cpu.h | 4 +++- target/s390x/interrupt.c | 5 ++++- target/s390x/translate.c | 20 +++++++++++++++++--- 3 files changed, 24 insertions(+), 5 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index b907741858..1a5b1397da 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -34,7 +34,7 @@ /* The z/Architecture has a strong memory model with some store-after-load= re-ordering */ #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) =20 -#define TARGET_INSN_START_EXTRA_WORDS 1 +#define TARGET_INSN_START_EXTRA_WORDS 2 =20 #define MMU_MODE0_SUFFIX _primary #define MMU_MODE1_SUFFIX _secondary @@ -804,6 +804,8 @@ int cpu_s390x_signal_handler(int host_signum, void *pin= fo, void *puc); void s390_crw_mchk(void); void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); +/* instruction length set by unwind info */ +#define ILEN_UNWIND 0 /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index a841f7187d..30a9fb8852 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -28,7 +28,10 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t = code, uint32_t ilen) =20 cs->exception_index =3D EXCP_PGM; env->int_pgm_code =3D code; - env->int_pgm_ilen =3D ilen; + /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ + if (ilen !=3D ILEN_UNWIND) { + env->int_pgm_ilen =3D ilen; + } } =20 void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, diff --git a/target/s390x/translate.c b/target/s390x/translate.c index a3e43ff9ec..151dfa91fb 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6309,6 +6309,9 @@ static DisasJumpType translate_one(CPUS390XState *env= , DisasContext *s) /* Search for the insn in the table. */ insn =3D extract_insn(env, s, &f); =20 + /* Emit insn_start now that we know the ILEN. */ + tcg_gen_insn_start(s->base.pc_next, s->cc_op, s->ilen); + /* Not found means unimplemented/illegal opcode. */ if (insn =3D=3D NULL) { qemu_log_mask(LOG_UNIMP, "unimplemented opcode 0x%02x%02x\n", @@ -6463,9 +6466,6 @@ static void s390x_tr_tb_start(DisasContextBase *db, C= PUState *cs) =20 static void s390x_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) { - DisasContext *dc =3D container_of(dcbase, DisasContext, base); - - tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); } =20 static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *= cs, @@ -6473,6 +6473,14 @@ static bool s390x_tr_breakpoint_check(DisasContextBa= se *dcbase, CPUState *cs, { DisasContext *dc =3D container_of(dcbase, DisasContext, base); =20 + /* + * Emit an insn_start to accompany the breakpoint exception. + * The ILEN value is a dummy, since this does not result in + * an s390x exception, but an internal qemu exception which + * brings us back to interact with the gdbstub. + */ + tcg_gen_insn_start(dc->base.pc_next, dc->cc_op, 2); + dc->base.is_jmp =3D DISAS_PC_STALE; dc->do_debug =3D true; /* The address covered by the breakpoint must be included in @@ -6567,8 +6575,14 @@ void restore_state_to_opc(CPUS390XState *env, Transl= ationBlock *tb, target_ulong *data) { int cc_op =3D data[1]; + env->psw.addr =3D data[0]; + + /* Update the CC opcode if it is not already up-to-date. */ if ((cc_op !=3D CC_OP_DYNAMIC) && (cc_op !=3D CC_OP_STATIC)) { env->cc_op =3D cc_op; } + + /* Record ILEN. */ + env->int_pgm_ilen =3D data[2]; } --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Thu, 10 Oct 2019 11:34:51 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id ED1D05C1B5; Thu, 10 Oct 2019 11:34:47 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 14/31] target/s390x: Remove ilen parameter from tcg_s390_program_interrupt Date: Thu, 10 Oct 2019 13:33:39 +0200 Message-Id: <20191010113356.5017-15-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Thu, 10 Oct 2019 11:34:51 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Since we begin the operation with an unwind, we have the proper value of ilen immediately available. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-3-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 10 +++++----- target/s390x/interrupt.c | 2 +- target/s390x/tcg-stub.c | 4 ++-- target/s390x/tcg_s390x.h | 4 ++-- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 892f659d5a..eb55e5ef53 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -34,15 +34,15 @@ #include "hw/boards.h" #endif =20 -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t= code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { CPUState *cs =3D env_cpu(env); =20 cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ilen); + trigger_pgm_exception(env, code, ILEN_UNWIND); cpu_loop_exit(cs); } =20 @@ -60,7 +60,7 @@ void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState = *env, uint32_t dxc, if (env->cregs[0] & CR0_AFP) { env->fpc =3D deposit32(env->fpc, 8, 8, dxc); } - tcg_s390_program_interrupt(env, PGM_DATA, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_DATA, ra); } =20 void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t = vxc, @@ -75,7 +75,7 @@ void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XStat= e *env, uint32_t vxc, =20 /* Always store the VXC into the FPC, without AFP it is undefined */ env->fpc =3D deposit32(env->fpc, 8, 8, vxc); - tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ILEN_AUTO, ra); + tcg_s390_program_interrupt(env, PGM_VECTOR_PROCESSING, ra); } =20 void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc) diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 30a9fb8852..b798e2ecbe 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -40,7 +40,7 @@ void s390_program_interrupt(CPUS390XState *env, uint32_t = code, int ilen, if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); } else if (tcg_enabled()) { - tcg_s390_program_interrupt(env, code, ilen, ra); + tcg_s390_program_interrupt(env, code, ra); } else { g_assert_not_reached(); } diff --git a/target/s390x/tcg-stub.c b/target/s390x/tcg-stub.c index 32adb7276a..d22c898802 100644 --- a/target/s390x/tcg-stub.c +++ b/target/s390x/tcg-stub.c @@ -18,8 +18,8 @@ void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque) { } -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t= code, - int ilen, uintptr_t ra) +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra) { g_assert_not_reached(); } diff --git a/target/s390x/tcg_s390x.h b/target/s390x/tcg_s390x.h index 2813f9d48e..2f54ccb027 100644 --- a/target/s390x/tcg_s390x.h +++ b/target/s390x/tcg_s390x.h @@ -14,8 +14,8 @@ #define TCG_S390X_H =20 void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque); -void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, uint32_t= code, - int ilen, uintptr_t ra); +void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env, + uint32_t code, uintptr_t ra); void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dx= c, uintptr_t ra); void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t = vxc, --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708458; cv=none; d=zoho.com; s=zohoarc; b=cN2a5pCDj6jiJxairbW/aEFCNf3ECR/pS4RQ2RP/qUoJR2XtFmtxEGA+J2eTYFPE7+tufmPrjMr7omvVQA+hCiAOJraW122/Ud2G24BisWJZhsmt2AV303vDcHmTJThKGFdL9GisWSsX5PTNu5L+fSKNTj9+AKYG7NEDIhyyr1Y= ARC-Message-Signature: i=1; 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Thu, 10 Oct 2019 11:34:51 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 15/31] target/s390x: Remove ilen parameter from s390_program_interrupt Date: Thu, 10 Oct 2019 13:33:40 +0200 Message-Id: <20191010113356.5017-16-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.70]); Thu, 10 Oct 2019 11:34:53 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson This is no longer used, and many of the existing uses -- particularly within hw/s390x -- seem questionable. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-4-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- hw/s390x/s390-pci-inst.c | 58 ++++++++++++++++++------------------ target/s390x/cc_helper.c | 2 +- target/s390x/cpu.h | 3 +- target/s390x/crypto_helper.c | 4 +-- target/s390x/diag.c | 14 ++++----- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 6 ++-- target/s390x/int_helper.c | 14 ++++----- target/s390x/interrupt.c | 3 +- target/s390x/ioinst.c | 40 ++++++++++++------------- target/s390x/mem_helper.c | 43 +++++++++++++------------- target/s390x/misc_helper.c | 27 ++++++----------- 12 files changed, 102 insertions(+), 114 deletions(-) diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 4b3bd4a804..92c7e45df5 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -157,7 +157,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_= t ra) int i; =20 if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } =20 @@ -168,7 +168,7 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintptr_= t ra) reqh =3D (ClpReqHdr *)buffer; req_len =3D lduw_p(&reqh->len); if (req_len < 16 || req_len > 8184 || (req_len % 8 !=3D 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } =20 @@ -180,11 +180,11 @@ int clp_service_call(S390CPU *cpu, uint8_t r2, uintpt= r_t ra) resh =3D (ClpRspHdr *)(buffer + req_len); res_len =3D lduw_p(&resh->len); if (res_len < 8 || res_len > 8176 || (res_len % 8 !=3D 0)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } if ((req_len + res_len) > 8192) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } =20 @@ -390,12 +390,12 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint= 8_t r2, uintptr_t ra) uint8_t pcias; =20 if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } =20 if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } =20 @@ -429,25 +429,25 @@ int pcilg_service_call(S390CPU *cpu, uint8_t r1, uint= 8_t r2, uintptr_t ra) switch (pcias) { case ZPCI_IO_BAR_MIN...ZPCI_IO_BAR_MAX: if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } result =3D zpci_read_bar(pbdev, pcias, offset, &data, len); if (result !=3D MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; case ZPCI_CONFIG_BAR: if (!len || (len > (4 - (offset & 0x3))) || len =3D=3D 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } data =3D pci_host_config_read_common( pbdev->pdev, offset, pci_config_size(pbdev->pdev), len); =20 if (zpci_endian_swap(&data, len)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -489,12 +489,12 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uin= t8_t r2, uintptr_t ra) uint8_t pcias; =20 if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } =20 if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } =20 @@ -536,13 +536,13 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uin= t8_t r2, uintptr_t ra) * A length of 0 is invalid and length should not cross a double w= ord */ if (!len || (len > (8 - (offset & 0x7)))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } =20 result =3D zpci_write_bar(pbdev, pcias, offset, data, len); if (result !=3D MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } break; @@ -550,7 +550,7 @@ int pcistg_service_call(S390CPU *cpu, uint8_t r1, uint8= _t r2, uintptr_t ra) /* ZPCI uses the pseudo BAR number 15 as configuration space */ /* possible access lengths are 1,2,4 and must not cross a word */ if (!len || (len > (4 - (offset & 0x3))) || len =3D=3D 3) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } /* len =3D 1,2,4 so we do not need to test */ @@ -622,12 +622,12 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint= 8_t r2, uintptr_t ra) hwaddr start, end; =20 if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 4, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } =20 if (r2 & 0x1) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } =20 @@ -709,7 +709,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8= _t r3, uint64_t gaddr, uint8_t buffer[128]; =20 if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } =20 @@ -772,7 +772,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8= _t r3, uint64_t gaddr, =20 if (!memory_region_access_valid(mr, offset, len, true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } =20 @@ -786,7 +786,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8= _t r3, uint64_t gaddr, ldq_p(buffer + i * 8), MO_64, MEMTXATTRS_UNSPECIFIE= D); if (result !=3D MEMTX_OK) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } } @@ -797,7 +797,7 @@ int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8= _t r3, uint64_t gaddr, return 0; =20 specification_error: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } =20 @@ -871,14 +871,14 @@ static int reg_ioat(CPUS390XState *env, S390PCIIOMMU = *iommu, ZpciFib fib, pba &=3D ~0xfff; pal |=3D 0xfff; if (pba > pal || pba < ZPCI_SDMA_ADDR || pal > ZPCI_EDMA_ADDR) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } =20 /* currently we only support designation type 1 with translation */ if (!(dt =3D=3D ZPCI_IOTA_RTTO && t)) { error_report("unsupported ioat dt %d t %d", dt, t); - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EINVAL; } =20 @@ -1003,7 +1003,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uin= t64_t fiba, uint8_t ar, uint64_t cc =3D ZPCI_PCI_LS_OK; =20 if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } =20 @@ -1012,7 +1012,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uin= t64_t fiba, uint8_t ar, fh =3D env->regs[r1] >> 32; =20 if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } =20 @@ -1040,7 +1040,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uin= t64_t fiba, uint8_t ar, } =20 if (fib.fmt !=3D 0) { - s390_program_interrupt(env, PGM_OPERAND, 6, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return 0; } =20 @@ -1151,7 +1151,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uin= t64_t fiba, uint8_t ar, break; } default: - s390_program_interrupt(&cpu->env, PGM_OPERAND, 6, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); cc =3D ZPCI_PCI_LS_ERR; } =20 @@ -1171,7 +1171,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, ui= nt64_t fiba, uint8_t ar, uint64_t cc =3D ZPCI_PCI_LS_OK; =20 if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return 0; } =20 @@ -1185,7 +1185,7 @@ int stpcifc_service_call(S390CPU *cpu, uint8_t r1, ui= nt64_t fiba, uint8_t ar, } =20 if (fiba & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } =20 diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index cf68792733..3cb00bcb09 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -588,7 +588,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); break; } } diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 1a5b1397da..18e7091763 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -809,8 +809,7 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t= subchannel_nr, /* automatically detect the instruction length */ #define ILEN_AUTO 0xff #define RA_IGNORED 0 -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra); +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t r= a); /* service interrupts are floating therefore we must not pass an cpustate = */ void s390_sclp_extint(uint32_t parm); =20 diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 5c79790187..1f83987e9d 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -34,7 +34,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uin= t32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } break; @@ -42,7 +42,7 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, uin= t32_t r2, uint32_t r3, =20 s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return 0; } =20 diff --git a/target/s390x/diag.c b/target/s390x/diag.c index 65eabf0461..53c2f81f2a 100644 --- a/target/s390x/diag.c +++ b/target/s390x/diag.c @@ -61,12 +61,12 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, u= int64_t r3, uintptr_t ra) IplParameterBlock *iplb; =20 if (env->psw.mask & PSW_MASK_PSTATE) { - s390_program_interrupt(env, PGM_PRIVILEGED, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); return; } =20 if ((subcode & ~0x0ffffULL) || (subcode > 6)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } =20 @@ -82,13 +82,13 @@ void handle_diag_308(CPUS390XState *env, uint64_t r1, u= int64_t r3, uintptr_t ra) break; case 5: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), false, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb =3D g_new0(IplParameterBlock, 1); @@ -112,13 +112,13 @@ out: return; case 6: if ((r1 & 1) || (addr & 0x0fffULL)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (!address_space_access_valid(&address_space_memory, addr, sizeof(IplParameterBlock), true, MEMTXATTRS_UNSPECIFIED)) { - s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); return; } iplb =3D s390_ipl_get_iplb(); @@ -130,7 +130,7 @@ out: } return; default: - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); break; } } diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index eb55e5ef53..089623a248 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr = addr, S390CPU *cpu =3D S390_CPU(cs); CPUS390XState *env =3D &cpu->env; =20 - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, retaddr); + s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } =20 #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 5faf973c6c..7228eb96e2 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] =3D=3D -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } =20 /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) =20 if (fpc_to_rnd[fpc & 0x7] =3D=3D -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } =20 /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] =3D=3D -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } =20 env->fpc =3D deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index d13cc49be6..1d29a1fc1f 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -39,7 +39,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int= 64_t b64) int64_t q; =20 if (b =3D=3D 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } =20 ret =3D q =3D a / b; @@ -47,7 +47,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int= 64_t b64) =20 /* Catch non-representable quotient. */ if (ret !=3D q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } =20 return ret; @@ -60,7 +60,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, u= int64_t b64) uint64_t q; =20 if (b =3D=3D 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } =20 ret =3D q =3D a / b; @@ -68,7 +68,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, u= int64_t b64) =20 /* Catch non-representable quotient. */ if (ret !=3D q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } =20 return ret; @@ -79,7 +79,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int= 64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b =3D=3D 0 || (b =3D=3D -1 && a =3D=3D (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl =3D a % b; return a / b; @@ -92,7 +92,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, = uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b =3D=3D 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah =3D=3D 0) { /* 64 -> 64/64 case */ @@ -106,7 +106,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah= , uint64_t al, env->retxl =3D a % b; ret =3D q; if (ret !=3D q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, ILEN_AUTO, GETPC= ()); + s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just ab= ort if diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index b798e2ecbe..2b71e03914 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -34,8 +34,7 @@ void trigger_pgm_exception(CPUS390XState *env, uint32_t c= ode, uint32_t ilen) } } =20 -void s390_program_interrupt(CPUS390XState *env, uint32_t code, int ilen, - uintptr_t ra) +void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t r= a) { if (kvm_enabled()) { kvm_s390_program_interrupt(env_archcpu(env), code); diff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c index 83c164a168..c437a1d8c6 100644 --- a/target/s390x/ioinst.c +++ b/target/s390x/ioinst.c @@ -44,7 +44,7 @@ void ioinst_handle_xsch(S390CPU *cpu, uint64_t reg1, uint= ptr_t ra) SubchDev *sch; =20 if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("xsch", cssid, ssid, schid); @@ -62,7 +62,7 @@ void ioinst_handle_csch(S390CPU *cpu, uint64_t reg1, uint= ptr_t ra) SubchDev *sch; =20 if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("csch", cssid, ssid, schid); @@ -80,7 +80,7 @@ void ioinst_handle_hsch(S390CPU *cpu, uint64_t reg1, uint= ptr_t ra) SubchDev *sch; =20 if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("hsch", cssid, ssid, schid); @@ -116,7 +116,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, ui= nt32_t ipb, uintptr_t ra) =20 addr =3D decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &schib, sizeof(schib))) { @@ -125,7 +125,7 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, ui= nt32_t ipb, uintptr_t ra) } if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_schib_valid(&schib)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("msch", cssid, ssid, schid); @@ -173,7 +173,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, ui= nt32_t ipb, uintptr_t ra) =20 addr =3D decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } if (s390_cpu_virt_mem_read(cpu, addr, ar, &orig_orb, sizeof(orb))) { @@ -183,7 +183,7 @@ void ioinst_handle_ssch(S390CPU *cpu, uint64_t reg1, ui= nt32_t ipb, uintptr_t ra) copy_orb_from_guest(&orb, &orig_orb); if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid) || !ioinst_orb_valid(&orb)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("ssch", cssid, ssid, schid); @@ -205,7 +205,7 @@ void ioinst_handle_stcrw(S390CPU *cpu, uint32_t ipb, ui= ntptr_t ra) =20 addr =3D decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } =20 @@ -236,7 +236,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, u= int32_t ipb, =20 addr =3D decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } =20 @@ -247,7 +247,7 @@ void ioinst_handle_stsch(S390CPU *cpu, uint64_t reg1, u= int32_t ipb, * access execption if it is not) first. */ if (!s390_cpu_virt_mem_check_write(cpu, addr, ar, sizeof(schib))) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); } else { s390_cpu_virt_mem_handle_exc(cpu, ra); } @@ -299,13 +299,13 @@ int ioinst_handle_tsch(S390CPU *cpu, uint64_t reg1, u= int32_t ipb, uintptr_t ra) uint8_t ar; =20 if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return -EIO; } trace_ioinst_sch_id("tsch", cssid, ssid, schid); addr =3D decode_basedisp_s(env, ipb, &ar); if (addr & 3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return -EIO; } =20 @@ -613,7 +613,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uin= tptr_t ra) addr =3D env->regs[reg]; /* Page boundary? */ if (addr & 0xfff) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); return; } /* @@ -629,7 +629,7 @@ void ioinst_handle_chsc(S390CPU *cpu, uint32_t ipb, uin= tptr_t ra) len =3D be16_to_cpu(req->len); /* Length field valid? */ if ((len < 16) || (len > 4088) || (len & 7)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } memset((char *)req + len, 0, TARGET_PAGE_SIZE - len); @@ -678,7 +678,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, ui= nt64_t reg2, trace_ioinst("schm"); =20 if (SCHM_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } =20 @@ -687,7 +687,7 @@ void ioinst_handle_schm(S390CPU *cpu, uint64_t reg1, ui= nt64_t reg2, dct =3D SCHM_REG1_DCT(reg1); =20 if (update && (reg2 & 0x000000000000001f)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } =20 @@ -700,7 +700,7 @@ void ioinst_handle_rsch(S390CPU *cpu, uint64_t reg1, ui= ntptr_t ra) SubchDev *sch; =20 if (ioinst_disassemble_sch_ident(reg1, &m, &cssid, &ssid, &schid)) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); return; } trace_ioinst_sch_id("rsch", cssid, ssid, schid); @@ -724,7 +724,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, ui= ntptr_t ra) CPUS390XState *env =3D &cpu->env; =20 if (RCHP_REG1_RES(reg1)) { - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } =20 @@ -747,7 +747,7 @@ void ioinst_handle_rchp(S390CPU *cpu, uint64_t reg1, ui= ntptr_t ra) break; default: /* Invalid channel subsystem. */ - s390_program_interrupt(env, PGM_OPERAND, 4, ra); + s390_program_interrupt(env, PGM_OPERAND, ra); return; } setcc(cpu, cc); @@ -758,6 +758,6 @@ void ioinst_handle_sal(S390CPU *cpu, uint64_t reg1, uin= tptr_t ra) { /* We do not provide address limit checking, so let's suppress it. */ if (SAL_REG1_INVALID(reg1) || reg1 & 0x000000000000ffff) { - s390_program_interrupt(&cpu->env, PGM_OPERAND, 4, ra); + s390_program_interrupt(&cpu->env, PGM_OPERAND, ra); } } diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 08c5cc6a99..77d2eb96d4 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -71,7 +71,7 @@ static inline void check_alignment(CPUS390XState *env, ui= nt64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } =20 @@ -730,7 +730,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint= 32_t r2) =20 /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 str =3D get_address(env, r2); @@ -767,7 +767,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uin= t32_t r2) =20 /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 str =3D get_address(env, r2); @@ -846,7 +846,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, = uint64_t r1, uint64_t r2) S390Access srca, desta; =20 if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } =20 r1 =3D wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +879,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, = uint32_t r2) int i; =20 if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 /* @@ -911,8 +911,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint6= 4_t a2, uint32_t r3) int i; =20 if (a2 & 0x3) { - /* we either came here by lam or lamy, which have different length= s */ - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -932,7 +931,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint= 64_t a2, uint32_t r3) int i; =20 if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -1888,7 +1887,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t = r3, uint64_t a1, return cc; =20 spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); g_assert_not_reached(); } =20 @@ -1912,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, u= int64_t a2, uint32_t r3) uint32_t i; =20 if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -1945,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, ui= nt64_t a2, uint32_t r3) uint32_t i; =20 if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -1976,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, u= int64_t a2, uint32_t r3) uint32_t i; =20 if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 6, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -1996,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, u= int64_t a2, uint32_t r3) uint32_t i; =20 if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -2168,7 +2167,7 @@ uint32_t HELPER(mvcs)(CPUS390XState *env, uint64_t l,= uint64_t a1, uint64_t a2) =20 if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY= ) || psw_as =3D=3D AS_HOME || psw_as =3D=3D AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } =20 l =3D wrap_length32(env, l); @@ -2199,7 +2198,7 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l,= uint64_t a1, uint64_t a2) =20 if (!(env->psw.mask & PSW_MASK_DAT) || !(env->cregs[0] & CR0_SECONDARY= ) || psw_as =3D=3D AS_HOME || psw_as =3D=3D AS_ACCREG) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ILEN_AUTO, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } =20 l =3D wrap_length32(env, l); @@ -2226,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, ui= nt64_t r2, uint32_t m4) uint16_t entries, i, index =3D 0; =20 if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 if (!(r2 & 0x800)) { @@ -2370,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t add= r) =20 /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } =20 old_exc =3D cs->exception_index; @@ -2539,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t d= est, uint64_t src, __func__, dest, src, len); =20 if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } =20 /* OAC (operand access control) for the first operand -> dest */ @@ -2570,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t= dest, uint64_t src, } =20 if (dest_a && dest_as =3D=3D AS_HOME && (env->psw.mask & PSW_MASK_PSTA= TE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as =3D=3D AS_SECONDARY || src_as =3D=3D AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, 6, ra); + s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, 6, ra); + s390_program_interrupt(env, PGM_PRIVILEGED, ra); } =20 len =3D wrap_length32(env, len); @@ -2591,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t d= est, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n= ", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, 6, ra); + s390_program_interrupt(env, PGM_ADDRESSING, ra); } =20 /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 7530dcb8f3..9fbb37cfb9 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1,= uint64_t r2) int r =3D sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint= 32_t r3, uint32_t num) } =20 if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, ILEN_AUTO, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } =20 @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val =3D r0; =20 if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, 2, GETPC()); + s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr =3D val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, = uint64_t r0, uint64_t r1) } =20 if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 if ((r0 & STSI_R0_FC_MASK) =3D=3D STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, = uint64_t r0, uint64_t r1) } =20 if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; =20 if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 qemu_mutex_lock_iothread(); @@ -573,17 +573,8 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) #ifndef CONFIG_USER_ONLY void HELPER(per_check_exception)(CPUS390XState *env) { - uint32_t ilen; - if (env->per_perc_atmid) { - /* - * FIXME: ILEN_AUTO is most probably the right thing to use. ilen - * always has to match the instruction referenced in the PSW. E.g. - * if a PER interrupt is triggered via EXECUTE, we have to use ilen - * of EXECUTE, while per_address contains the target of EXECUTE. - */ - ilen =3D get_ilen(cpu_ldub_code(env, env->per_address)); - s390_program_interrupt(env, PGM_PER, ilen, GETPC()); + s390_program_interrupt(env, PGM_PER, GETPC()); } } =20 @@ -673,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t add= r) int i; =20 if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, 4, ra); + s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 prepare_stfl(); @@ -746,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint6= 4_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, 4, GETPC()); + s390_program_interrupt(env, -r, GETPC()); } } =20 --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570707965; cv=none; d=zoho.com; s=zohoarc; b=fjlP4ZK91Nqp0fWNOzi8rIxY3VhwuCK5nTciPXioaEId6IKjxYENOVKsjo7o4m7UJ1dxdi7L9iZvqrqHc0GxL0Pc5Yx+WUQnJufQPFM/GLnH2M4lke8c7ySGOB3k1P6PrdiuCEcdA6B9JDrUA+69G3+fgaE34NFLZu+zdYvErlo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570707965; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=ddRzNDorjihRHoJCBuQW9VyUceJ1GDTmpZAs35fR46I=; b=KmFwuWckHrgT9bBSc7WgE8R7KJ38mI5L8oecjowGznj1FH2zKHzYsX+nfi9jg8bPCC/Vs0Yf8tQOC9EC9XSYlD3TaKaWpMVlXcswkK4C1my/aU0KzJj2xDw5LrlnJvTC5tPZb5vId2bgQpjDMW/DQIacboCY4nsAH03igzp1f6w= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570707965306569.6656388849893; Thu, 10 Oct 2019 04:46:05 -0700 (PDT) Received: from localhost ([::1]:36656 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWtP-0008JG-Fk for importer@patchew.org; Thu, 10 Oct 2019 07:46:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50353) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWil-0004La-Qs for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWii-0005zy-36 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56980) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWih-0005zX-R3; Thu, 10 Oct 2019 07:35:00 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1C62F3086218; Thu, 10 Oct 2019 11:34:59 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 589795C3FD; Thu, 10 Oct 2019 11:34:53 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 16/31] target/s390x: Use tcg_s390_program_interrupt in TCG helpers Date: Thu, 10 Oct 2019 13:33:41 +0200 Message-Id: <20191010113356.5017-17-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Thu, 10 Oct 2019 11:34:59 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Replace all uses of s390_program_interrupt within files that are marked CONFIG_TCG. These are necessarily tcg-only. This lets each of these users benefit from the QEMU_NORETURN attribute on tcg_s390_program_interrupt. Acked-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-5-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/cc_helper.c | 4 ++-- target/s390x/crypto_helper.c | 7 +++---- target/s390x/excp_helper.c | 2 +- target/s390x/fpu_helper.c | 6 +++--- target/s390x/int_helper.c | 15 +++++++------- target/s390x/mem_helper.c | 40 ++++++++++++++++++------------------ target/s390x/misc_helper.c | 18 ++++++++-------- 7 files changed, 46 insertions(+), 46 deletions(-) diff --git a/target/s390x/cc_helper.c b/target/s390x/cc_helper.c index 3cb00bcb09..44731e4a85 100644 --- a/target/s390x/cc_helper.c +++ b/target/s390x/cc_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" #include "qemu/host-utils.h" @@ -588,8 +589,7 @@ void HELPER(sacf)(CPUS390XState *env, uint64_t a1) break; default: HELPER_LOG("unknown sacf mode: %" PRIx64 "\n", a1); - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); - break; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } #endif diff --git a/target/s390x/crypto_helper.c b/target/s390x/crypto_helper.c index 1f83987e9d..ff3fbc3950 100644 --- a/target/s390x/crypto_helper.c +++ b/target/s390x/crypto_helper.c @@ -13,6 +13,7 @@ #include "qemu/osdep.h" #include "qemu/main-loop.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -34,16 +35,14 @@ uint32_t HELPER(msa)(CPUS390XState *env, uint32_t r1, u= int32_t r2, uint32_t r3, case S390_FEAT_TYPE_PCKMO: case S390_FEAT_TYPE_PCC: if (mod) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } break; } =20 s390_get_feat_block(type, subfunc); if (!test_be_bit(fc, subfunc)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - return 0; + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 switch (fc) { diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 089623a248..dbff772d34 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -614,7 +614,7 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr = addr, S390CPU *cpu =3D S390_CPU(cs); CPUS390XState *env =3D &cpu->env; =20 - s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, retaddr); } =20 #endif /* CONFIG_USER_ONLY */ diff --git a/target/s390x/fpu_helper.c b/target/s390x/fpu_helper.c index 7228eb96e2..8bb9f54fd0 100644 --- a/target/s390x/fpu_helper.c +++ b/target/s390x/fpu_helper.c @@ -825,7 +825,7 @@ void HELPER(sfpc)(CPUS390XState *env, uint64_t fpc) { if (fpc_to_rnd[fpc & 0x7] =3D=3D -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } =20 /* Install everything in the main FPC. */ @@ -843,7 +843,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) =20 if (fpc_to_rnd[fpc & 0x7] =3D=3D -1 || fpc & 0x03030088u || (!s390_has_feat(S390_FEAT_FLOATING_POINT_EXT) && fpc & 0x4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } =20 /* @@ -880,7 +880,7 @@ void HELPER(sfas)(CPUS390XState *env, uint64_t fpc) void HELPER(srnm)(CPUS390XState *env, uint64_t rnd) { if (rnd > 0x7 || fpc_to_rnd[rnd & 0x7] =3D=3D -1) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } =20 env->fpc =3D deposit32(env->fpc, 0, 3, rnd); diff --git a/target/s390x/int_helper.c b/target/s390x/int_helper.c index 1d29a1fc1f..658507dd6d 100644 --- a/target/s390x/int_helper.c +++ b/target/s390x/int_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/exec-all.h" #include "qemu/host-utils.h" #include "exec/helper-proto.h" @@ -39,7 +40,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int= 64_t b64) int64_t q; =20 if (b =3D=3D 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } =20 ret =3D q =3D a / b; @@ -47,7 +48,7 @@ int64_t HELPER(divs32)(CPUS390XState *env, int64_t a, int= 64_t b64) =20 /* Catch non-representable quotient. */ if (ret !=3D q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } =20 return ret; @@ -60,7 +61,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, u= int64_t b64) uint64_t q; =20 if (b =3D=3D 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } =20 ret =3D q =3D a / b; @@ -68,7 +69,7 @@ uint64_t HELPER(divu32)(CPUS390XState *env, uint64_t a, u= int64_t b64) =20 /* Catch non-representable quotient. */ if (ret !=3D q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } =20 return ret; @@ -79,7 +80,7 @@ int64_t HELPER(divs64)(CPUS390XState *env, int64_t a, int= 64_t b) { /* Catch divide by zero, and non-representable quotient (MIN / -1). */ if (b =3D=3D 0 || (b =3D=3D -1 && a =3D=3D (1ll << 63))) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } env->retxl =3D a % b; return a / b; @@ -92,7 +93,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah, = uint64_t al, uint64_t ret; /* Signal divide by zero. */ if (b =3D=3D 0) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } if (ah =3D=3D 0) { /* 64 -> 64/64 case */ @@ -106,7 +107,7 @@ uint64_t HELPER(divu64)(CPUS390XState *env, uint64_t ah= , uint64_t al, env->retxl =3D a % b; ret =3D q; if (ret !=3D q) { - s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); + tcg_s390_program_interrupt(env, PGM_FIXPT_DIVIDE, GETPC()); } #else /* 32-bit hosts would need special wrapper functionality - just ab= ort if diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 77d2eb96d4..7d2a652823 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "internal.h" +#include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" @@ -71,7 +72,7 @@ static inline void check_alignment(CPUS390XState *env, ui= nt64_t v, int wordsize, uintptr_t ra) { if (v % wordsize) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } } =20 @@ -730,7 +731,7 @@ void HELPER(srst)(CPUS390XState *env, uint32_t r1, uint= 32_t r2) =20 /* Bits 32-55 must contain all 0. */ if (env->regs[0] & 0xffffff00u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 str =3D get_address(env, r2); @@ -767,7 +768,7 @@ void HELPER(srstu)(CPUS390XState *env, uint32_t r1, uin= t32_t r2) =20 /* Bits 32-47 of R0 must be zero. */ if (env->regs[0] & 0xffff0000u) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 str =3D get_address(env, r2); @@ -846,7 +847,7 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, = uint64_t r1, uint64_t r2) S390Access srca, desta; =20 if ((f && s) || extract64(r0, 12, 4)) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } =20 r1 =3D wrap_address(env, r1 & TARGET_PAGE_MASK); @@ -879,7 +880,7 @@ uint32_t HELPER(mvst)(CPUS390XState *env, uint32_t r1, = uint32_t r2) int i; =20 if (env->regs[0] & 0xffffff00ull) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 /* @@ -911,7 +912,7 @@ void HELPER(lam)(CPUS390XState *env, uint32_t r1, uint6= 4_t a2, uint32_t r3) int i; =20 if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -931,7 +932,7 @@ void HELPER(stam)(CPUS390XState *env, uint32_t r1, uint= 64_t a2, uint32_t r3) int i; =20 if (a2 & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -1887,8 +1888,7 @@ static uint32_t do_csst(CPUS390XState *env, uint32_t = r3, uint64_t a1, return cc; =20 spec_exception: - s390_program_interrupt(env, PGM_SPECIFICATION, ra); - g_assert_not_reached(); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 uint32_t HELPER(csst)(CPUS390XState *env, uint32_t r3, uint64_t a1, uint64= _t a2) @@ -1911,7 +1911,7 @@ void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, u= int64_t a2, uint32_t r3) uint32_t i; =20 if (src & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -1944,7 +1944,7 @@ void HELPER(lctl)(CPUS390XState *env, uint32_t r1, ui= nt64_t a2, uint32_t r3) uint32_t i; =20 if (src & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -1975,7 +1975,7 @@ void HELPER(stctg)(CPUS390XState *env, uint32_t r1, u= int64_t a2, uint32_t r3) uint32_t i; =20 if (dest & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -1995,7 +1995,7 @@ void HELPER(stctl)(CPUS390XState *env, uint32_t r1, u= int64_t a2, uint32_t r3) uint32_t i; =20 if (dest & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 for (i =3D r1;; i =3D (i + 1) % 16) { @@ -2225,7 +2225,7 @@ void HELPER(idte)(CPUS390XState *env, uint64_t r1, ui= nt64_t r2, uint32_t m4) uint16_t entries, i, index =3D 0; =20 if (r2 & 0xff000) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 if (!(r2 & 0x800)) { @@ -2369,7 +2369,7 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t add= r) =20 /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } =20 old_exc =3D cs->exception_index; @@ -2538,7 +2538,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t d= est, uint64_t src, __func__, dest, src, len); =20 if (!(env->psw.mask & PSW_MASK_DAT)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } =20 /* OAC (operand access control) for the first operand -> dest */ @@ -2569,14 +2569,14 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t= dest, uint64_t src, } =20 if (dest_a && dest_as =3D=3D AS_HOME && (env->psw.mask & PSW_MASK_PSTA= TE)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!(env->cregs[0] & CR0_SECONDARY) && (dest_as =3D=3D AS_SECONDARY || src_as =3D=3D AS_SECONDARY)) { - s390_program_interrupt(env, PGM_SPECIAL_OP, ra); + tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, ra); } if (!psw_key_valid(env, dest_key) || !psw_key_valid(env, src_key)) { - s390_program_interrupt(env, PGM_PRIVILEGED, ra); + tcg_s390_program_interrupt(env, PGM_PRIVILEGED, ra); } =20 len =3D wrap_length32(env, len); @@ -2590,7 +2590,7 @@ uint32_t HELPER(mvcos)(CPUS390XState *env, uint64_t d= est, uint64_t src, (env->psw.mask & PSW_MASK_PSTATE)) { qemu_log_mask(LOG_UNIMP, "%s: AR-mode and PSTATE support missing\n= ", __func__); - s390_program_interrupt(env, PGM_ADDRESSING, ra); + tcg_s390_program_interrupt(env, PGM_ADDRESSING, ra); } =20 /* FIXME: Access using correct keys and AR-mode */ diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index 9fbb37cfb9..bfb457fb63 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -106,7 +106,7 @@ uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1,= uint64_t r2) int r =3D sclp_service_call(env, r1, r2); qemu_mutex_unlock_iothread(); if (r < 0) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } return r; } @@ -143,7 +143,7 @@ void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint= 32_t r3, uint32_t num) } =20 if (r) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } } =20 @@ -222,7 +222,7 @@ void HELPER(sckpf)(CPUS390XState *env, uint64_t r0) uint32_t val =3D r0; =20 if (val & 0xffff0000) { - s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, GETPC()); } env->todpr =3D val; } @@ -266,7 +266,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, = uint64_t r0, uint64_t r1) } =20 if ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK)) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 if ((r0 & STSI_R0_FC_MASK) =3D=3D STSI_R0_FC_CURRENT) { @@ -276,7 +276,7 @@ uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0, = uint64_t r0, uint64_t r1) } =20 if (a0 & ~TARGET_PAGE_MASK) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 /* count the cpus and split them into configured and reserved ones */ @@ -509,7 +509,7 @@ uint32_t HELPER(tpi)(CPUS390XState *env, uint64_t addr) LowCore *lowcore; =20 if (addr & 0x3) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 qemu_mutex_lock_iothread(); @@ -574,7 +574,7 @@ void HELPER(chsc)(CPUS390XState *env, uint64_t inst) void HELPER(per_check_exception)(CPUS390XState *env) { if (env->per_perc_atmid) { - s390_program_interrupt(env, PGM_PER, GETPC()); + tcg_s390_program_interrupt(env, PGM_PER, GETPC()); } } =20 @@ -664,7 +664,7 @@ uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t add= r) int i; =20 if (addr & 0x7) { - s390_program_interrupt(env, PGM_SPECIFICATION, ra); + tcg_s390_program_interrupt(env, PGM_SPECIFICATION, ra); } =20 prepare_stfl(); @@ -737,7 +737,7 @@ void HELPER(sic)(CPUS390XState *env, uint64_t r1, uint6= 4_t r3) qemu_mutex_unlock_iothread(); /* css_do_sic() may actually return a PGM_xxx value to inject */ if (r) { - s390_program_interrupt(env, -r, GETPC()); + tcg_s390_program_interrupt(env, -r, GETPC()); } } =20 --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570708154076711.8689298202648; Thu, 10 Oct 2019 04:49:14 -0700 (PDT) Received: from localhost ([::1]:36686 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWwS-0003Pd-CM for importer@patchew.org; Thu, 10 Oct 2019 07:49:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50396) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWiz-0004RW-He for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWix-000669-Ha for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:17 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42824) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWiq-00061S-Sl; Thu, 10 Oct 2019 07:35:11 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 528E23CA00; Thu, 10 Oct 2019 11:35:03 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 647DA5C231; Thu, 10 Oct 2019 11:34:59 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 17/31] target/s390x: Push trigger_pgm_exception lower in s390_cpu_tlb_fill Date: Thu, 10 Oct 2019 13:33:42 +0200 Message-Id: <20191010113356.5017-18-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 10 Oct 2019 11:35:03 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Delay triggering an exception until the end, after we have determined ultimate success or failure, and also taken into account whether this is a non-faulting probe. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-6-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index dbff772d34..552098be5f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, CPUS390XState *env =3D &cpu->env; target_ulong vaddr, raddr; uint64_t asc; - int prot, fail; + int prot, fail, excp; =20 qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %= d\n", __func__, address, access_type, mmu_idx); @@ -141,12 +141,14 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, vaddr &=3D 0x7fffffff; } fail =3D mmu_translate(env, vaddr, access_type, asc, &raddr, &prot= , true); + excp =3D 0; /* exception already raised */ } else if (mmu_idx =3D=3D MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &=3D 0x7fffffff; } fail =3D mmu_translate_real(env, vaddr, access_type, &raddr, &prot= ); + excp =3D 0; /* exception already raised */ } else { g_assert_not_reached(); } @@ -159,7 +161,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, qemu_log_mask(CPU_LOG_MMU, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); - trigger_pgm_exception(env, PGM_ADDRESSING, ILEN_AUTO); + excp =3D PGM_ADDRESSING; fail =3D 1; } =20 @@ -175,6 +177,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, return false; } =20 + if (excp) { + trigger_pgm_exception(env, excp, ILEN_AUTO); + } cpu_restore_state(cs, retaddr, true); =20 /* --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; 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Thu, 10 Oct 2019 11:35:09 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 98EA95E1B0; Thu, 10 Oct 2019 11:35:03 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 18/31] target/s390x: Handle tec in s390_cpu_tlb_fill Date: Thu, 10 Oct 2019 13:33:43 +0200 Message-Id: <20191010113356.5017-19-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 10 Oct 2019 11:35:09 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson As a step toward moving all excption handling out of mmu_translate, copy handling of the LowCore tec value from trigger_access_exception into s390_cpu_tlb_fill. So far this new plumbing isn't used. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-7-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 552098be5f..ab2ed47fef 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -126,7 +126,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, S390CPU *cpu =3D S390_CPU(cs); CPUS390XState *env =3D &cpu->env; target_ulong vaddr, raddr; - uint64_t asc; + uint64_t asc, tec; int prot, fail, excp; =20 qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %= d\n", @@ -162,6 +162,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, "%s: raddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, (uint64_t)raddr, (uint64_t)ram_size); excp =3D PGM_ADDRESSING; + tec =3D 0; /* unused */ fail =3D 1; } =20 @@ -178,6 +179,10 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, in= t size, } =20 if (excp) { + if (excp !=3D PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); + } trigger_pgm_exception(env, excp, ILEN_AUTO); } cpu_restore_state(cs, retaddr, true); --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708312; cv=none; d=zoho.com; s=zohoarc; b=InCoEQQrrSmsmQYiw6/Oi+4rWI1J0C8QZtCmsYV9Bwem96pBQ5ycAGWFNnB/PViAvfjXDgghpQzunm4z5SnvWZk70gxxeTmyxyF5uaBu/F9uLbfykZLIfoIW4E7t22if2BLykHy79IdK9KRmA0kBKzT/cIHaE7Y+62R/DWrbJbo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570708312; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Thu, 10 Oct 2019 07:35:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWj4-00069c-I8 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:25 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58092) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWj3-00067s-Dg; Thu, 10 Oct 2019 07:35:21 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A7F2B307D96D; Thu, 10 Oct 2019 11:35:19 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id E46CB5C553; Thu, 10 Oct 2019 11:35:09 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 19/31] target/s390x: Return exception from mmu_translate_real Date: Thu, 10 Oct 2019 13:33:44 +0200 Message-Id: <20191010113356.5017-20-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Thu, 10 Oct 2019 11:35:19 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Do not raise the exception directly within mmu_translate_real, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-8-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 4 ++-- target/s390x/internal.h | 2 +- target/s390x/mmu_helper.c | 14 ++++++-------- 3 files changed, 9 insertions(+), 11 deletions(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index ab2ed47fef..906b87c071 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -147,8 +147,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &=3D 0x7fffffff; } - fail =3D mmu_translate_real(env, vaddr, access_type, &raddr, &prot= ); - excp =3D 0; /* exception already raised */ + excp =3D mmu_translate_real(env, vaddr, access_type, &raddr, &prot= , &tec); + fail =3D excp; } else { g_assert_not_reached(); } diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c243fa725b..c4388aaf23 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -362,7 +362,7 @@ void probe_write_access(CPUS390XState *env, uint64_t ad= dr, uint64_t len, int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, target_ulong *raddr, int *flags, bool exc); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags); + target_ulong *addr, int *flags, uint64_t *tec); =20 =20 /* misc_helper.c */ diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 4a794dadcf..e8281d4413 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -554,14 +554,11 @@ void s390_cpu_virt_mem_handle_exc(S390CPU *cpu, uintp= tr_t ra) * @param rw 0 =3D read, 1 =3D write, 2 =3D code fetch * @param addr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer - * @return 0 if the translation was successful, < 0 if a fault occur= red + * @return 0 =3D success, !=3D 0, the exception to raise */ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags) + target_ulong *addr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - uint64_t tec =3D (raddr & TARGET_PAGE_MASK) | - (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ); const bool lowprot_enabled =3D env->cregs[0] & CR0_LOWPROT; =20 *flags =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -570,9 +567,10 @@ int mmu_translate_real(CPUS390XState *env, target_ulon= g raddr, int rw, *flags |=3D PAGE_WRITE_INV; if (is_low_address(raddr) && rw =3D=3D MMU_DATA_STORE) { /* LAP sets bit 56 */ - tec |=3D 0x80; - trigger_access_exception(env, PGM_PROTECTION, ILEN_AUTO, tec); - return -EACCES; + *tec =3D (raddr & TARGET_PAGE_MASK) + | (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ) + | 0x80; + return PGM_PROTECTION; } } =20 --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708485; cv=none; d=zoho.com; s=zohoarc; b=n8JY5MQ+6vLf7EynLmq2zHLAOExEgFutUxglv5/uw2WWSxJBagC5YgXjiSeDHBM9vE5TDn4tTM2pJJP5n7rvXpEe4ijjh2o4gnL2caCJ5Br1DGK+AVH9BT4ow1zeEoWSxtMQiAlmj2cE5Ic8FEn9S6pVvzdpCCP+AOY1yOJ5RqY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570708485; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=t22bHl9JWyLjic1qDlrEugIMAUxqK+RYVjkEzQ0D8K4=; b=QBXBnFcib0sGVHXs3LlKUvW+0Pr3dD228ZOAi9G/ULpyNBWieOFkE2rvVExD9L0QTHaQ9aNKkJzoi7fBwTYSbA+Z1uKVRSQpoSs0Ivh/UsHj/VIyRLnYWAv8YgGkiX67DOp90iCVGk+NJMCH4Vwoo8hMhd2iW2OPGE9UYQNmVO8= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 157070848519299.14221317904423; Thu, 10 Oct 2019 04:54:45 -0700 (PDT) Received: from localhost ([::1]:36766 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX1n-00020Q-Hq for importer@patchew.org; Thu, 10 Oct 2019 07:54:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50506) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWjH-0004bE-Ue for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWjG-0006IE-Sq for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46086) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWjG-0006Hj-NL; Thu, 10 Oct 2019 07:35:34 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 989132D6A10; Thu, 10 Oct 2019 11:35:32 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id EF79F5C548; Thu, 10 Oct 2019 11:35:19 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 20/31] target/s390x: Remove exc argument to mmu_translate_asce Date: Thu, 10 Oct 2019 13:33:45 +0200 Message-Id: <20191010113356.5017-21-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 10 Oct 2019 11:35:32 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Now that mmu_translate_asce returns the exception instead of raising it, the argument is unused. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-9-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index e8281d4413..e57d762f45 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -116,7 +116,7 @@ static inline bool read_table_entry(CPUS390XState *env,= hwaddr gaddr, =20 static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, uint64_t asc, uint64_t asce, target_ulong *r= addr, - int *flags, int rw, bool exc) + int *flags, int rw) { const bool edat1 =3D (env->cregs[0] & CR0_EDAT) && s390_has_feat(S390_FEAT_EDAT); @@ -423,7 +423,7 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, } =20 /* perform the DAT translation */ - r =3D mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw, exc); + r =3D mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { if (exc) { trigger_access_exception(env, r, ilen, tec); --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708401; cv=none; d=zoho.com; s=zohoarc; b=j3kG5c4opwpA8prAK367OVzcxVy9/dcy3PlM03+kIQYkm3PQbCfYdc11wsHfVSfPlmA7W8ezDUkyDzB5uwCRhlrDrL/gVadtKruVHVRZgMdJTKqQvp++kkFB4GByqwrGMYSxbI9P/ZJsTKEb0sV2/TjV8uGgASBUvYleKebx9gw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570708401; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Thu, 10 Oct 2019 07:35:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWjW-0006Ky-FD for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:35:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35204) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWjW-0006Kn-7H; Thu, 10 Oct 2019 07:35:50 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7100D4E8AC; Thu, 10 Oct 2019 11:35:49 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id E33655C22C; Thu, 10 Oct 2019 11:35:32 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 21/31] target/s390x: Return exception from mmu_translate Date: Thu, 10 Oct 2019 13:33:46 +0200 Message-Id: <20191010113356.5017-22-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Thu, 10 Oct 2019 11:35:49 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Do not raise the exception directly within mmu_translate, but pass it back so that caller may do so. Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-10-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 4 +-- target/s390x/helper.c | 3 ++- target/s390x/internal.h | 2 +- target/s390x/mem_helper.c | 13 +++++++--- target/s390x/mmu_helper.c | 51 +++++++++++++++----------------------- 5 files changed, 35 insertions(+), 38 deletions(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 906b87c071..6a0728b65f 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -140,8 +140,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &=3D 0x7fffffff; } - fail =3D mmu_translate(env, vaddr, access_type, asc, &raddr, &prot= , true); - excp =3D 0; /* exception already raised */ + excp =3D mmu_translate(env, vaddr, access_type, asc, &raddr, &prot= , &tec); + fail =3D excp; } else if (mmu_idx =3D=3D MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { diff --git a/target/s390x/helper.c b/target/s390x/helper.c index bf503b56ee..a3a49164e4 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -52,6 +52,7 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr v= addr) target_ulong raddr; int prot; uint64_t asc =3D env->psw.mask & PSW_MASK_ASC; + uint64_t tec; =20 /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { @@ -67,7 +68,7 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr v= addr) * We want to read code even if IEP is active. Use MMU_DATA_LOAD inste= ad * of MMU_INST_FETCH. */ - if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, false= )) { + if (mmu_translate(env, vaddr, MMU_DATA_LOAD, asc, &raddr, &prot, &tec)= ) { return -1; } return raddr; diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c4388aaf23..c993c3ef40 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -360,7 +360,7 @@ void probe_write_access(CPUS390XState *env, uint64_t ad= dr, uint64_t len, =20 /* mmu_helper.c */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, - target_ulong *raddr, int *flags, bool exc); + target_ulong *raddr, int *flags, uint64_t *tec); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, target_ulong *addr, int *flags, uint64_t *tec); =20 diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 7d2a652823..e15aa296dd 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2364,8 +2364,8 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t add= r) CPUState *cs =3D env_cpu(env); uint32_t cc =3D 0; uint64_t asc =3D env->psw.mask & PSW_MASK_ASC; - uint64_t ret; - int old_exc, flags; + uint64_t ret, tec; + int old_exc, flags, exc; =20 /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { @@ -2373,7 +2373,14 @@ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t ad= dr) } =20 old_exc =3D cs->exception_index; - if (mmu_translate(env, addr, 0, asc, &ret, &flags, true)) { + exc =3D mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); + if (exc) { + /* + * We don't care about ILEN or TEC, as we're not going to + * deliver the exception -- thus resetting exception_index below. + * TODO: clean this up. + */ + trigger_pgm_exception(env, exc, ILEN_UNWIND); cc =3D 3; } if (cs->exception_index =3D=3D EXCP_PGM) { diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index e57d762f45..001d0a9c8a 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -365,20 +365,18 @@ static void mmu_handle_skey(target_ulong addr, int rw= , int *flags) * @param raddr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer * @param exc true =3D inject a program check if a fault occurred - * @return 0 if the translation was successful, -1 if a fault occurr= ed + * @return 0 =3D success, !=3D 0, the exception to raise */ int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, - target_ulong *raddr, int *flags, bool exc) + target_ulong *raddr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - const int ilen =3D (rw =3D=3D MMU_INST_FETCH) ? 2 : ILEN_AUTO; - uint64_t tec =3D (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | - (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ); uint64_t asce; int r; =20 - + *tec =3D (vaddr & TARGET_PAGE_MASK) | (asc >> 46) | + (rw =3D=3D MMU_DATA_STORE ? FS_WRITE : FS_READ); *flags =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; + if (is_low_address(vaddr & TARGET_PAGE_MASK) && lowprot_enabled(env, a= sc)) { /* * If any part of this page is currently protected, make sure the @@ -390,12 +388,9 @@ int mmu_translate(CPUS390XState *env, target_ulong vad= dr, int rw, uint64_t asc, */ *flags |=3D PAGE_WRITE_INV; if (is_low_address(vaddr) && rw =3D=3D MMU_DATA_STORE) { - if (exc) { - /* LAP sets bit 56 */ - tec |=3D 0x80; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -EACCES; + /* LAP sets bit 56 */ + *tec |=3D 0x80; + return PGM_PROTECTION; } } =20 @@ -425,30 +420,21 @@ int mmu_translate(CPUS390XState *env, target_ulong va= ddr, int rw, uint64_t asc, /* perform the DAT translation */ r =3D mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw); if (unlikely(r)) { - if (exc) { - trigger_access_exception(env, r, ilen, tec); - } - return -1; + return r; } =20 /* check for DAT protection */ if (unlikely(rw =3D=3D MMU_DATA_STORE && !(*flags & PAGE_WRITE))) { - if (exc) { - /* DAT sets bit 61 only */ - tec |=3D 0x4; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* DAT sets bit 61 only */ + *tec |=3D 0x4; + return PGM_PROTECTION; } =20 /* check for Instruction-Execution-Protection */ if (unlikely(rw =3D=3D MMU_INST_FETCH && !(*flags & PAGE_EXEC))) { - if (exc) { - /* IEP sets bit 56 and 61 */ - tec |=3D 0x84; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - } - return -1; + /* IEP sets bit 56 and 61 */ + *tec |=3D 0x84; + return PGM_PROTECTION; } =20 nodat: @@ -472,9 +458,12 @@ static int translate_pages(S390CPU *cpu, vaddr addr, i= nt nr_pages, int ret, i, pflags; =20 for (i =3D 0; i < nr_pages; i++) { - ret =3D mmu_translate(env, addr, is_write, asc, &pages[i], &pflags= , true); + uint64_t tec; + + ret =3D mmu_translate(env, addr, is_write, asc, &pages[i], &pflags= , &tec); if (ret) { - return ret; + trigger_access_exception(env, ret, ILEN_AUTO, tec); + return -EFAULT; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Thu, 10 Oct 2019 07:36:06 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7F27010CC1E3; Thu, 10 Oct 2019 11:36:05 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id B9B9B5E1C2; Thu, 10 Oct 2019 11:35:49 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 22/31] target/s390x: Return exception from translate_pages Date: Thu, 10 Oct 2019 13:33:47 +0200 Message-Id: <20191010113356.5017-23-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.65]); Thu, 10 Oct 2019 11:36:05 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Do not raise the exception directly within translate_pages, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-11-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 001d0a9c8a..869debd30a 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -451,25 +451,22 @@ nodat: * the MEMOP interface. */ static int translate_pages(S390CPU *cpu, vaddr addr, int nr_pages, - target_ulong *pages, bool is_write) + target_ulong *pages, bool is_write, uint64_t *t= ec) { uint64_t asc =3D cpu->env.psw.mask & PSW_MASK_ASC; CPUS390XState *env =3D &cpu->env; int ret, i, pflags; =20 for (i =3D 0; i < nr_pages; i++) { - uint64_t tec; - - ret =3D mmu_translate(env, addr, is_write, asc, &pages[i], &pflags= , &tec); + ret =3D mmu_translate(env, addr, is_write, asc, &pages[i], &pflags= , tec); if (ret) { - trigger_access_exception(env, ret, ILEN_AUTO, tec); - return -EFAULT; + return ret; } if (!address_space_access_valid(&address_space_memory, pages[i], TARGET_PAGE_SIZE, is_write, MEMTXATTRS_UNSPECIFIED)) { - trigger_access_exception(env, PGM_ADDRESSING, ILEN_AUTO, 0); - return -EFAULT; + *tec =3D 0; /* unused */ + return PGM_ADDRESSING; } addr +=3D TARGET_PAGE_SIZE; } @@ -497,6 +494,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uin= t8_t ar, void *hostbuf, { int currlen, nr_pages, i; target_ulong *pages; + uint64_t tec; int ret; =20 if (kvm_enabled()) { @@ -510,8 +508,10 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, ui= nt8_t ar, void *hostbuf, + 1; pages =3D g_malloc(nr_pages * sizeof(*pages)); =20 - ret =3D translate_pages(cpu, laddr, nr_pages, pages, is_write); - if (ret =3D=3D 0 && hostbuf !=3D NULL) { + ret =3D translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); + if (ret) { + trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + } else if (hostbuf !=3D NULL) { /* Copy data by stepping through the area page by page */ for (i =3D 0; i < nr_pages; i++) { currlen =3D MIN(len, TARGET_PAGE_SIZE - (laddr % TARGET_PAGE_S= IZE)); --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708008; cv=none; d=zoho.com; s=zohoarc; b=S9jlpb+IajSq0QStvGvKm7OJuejTRd6MUMw4LqGTXmQxopuevNgJT9VdI8EpvRlUEtEoGwRaeVVWwya86AmPXcN9WTUAG8FVJsAbO3wiv95FEMwSpaen9LR4TZ4kjgH2rwzQnh0T8v4J5R6d4SvrAfj3PxOo5pPdvrRLTPV9EfQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570708008; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Thu, 10 Oct 2019 07:36:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWk2-0006UE-0s for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42386) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWk1-0006Tu-Ot; Thu, 10 Oct 2019 07:36:21 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E6EBA10CBC4B; Thu, 10 Oct 2019 11:36:20 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id C5FDF5C1B5; Thu, 10 Oct 2019 11:36:05 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 23/31] target/s390x: Remove fail variable from s390_cpu_tlb_fill Date: Thu, 10 Oct 2019 13:33:48 +0200 Message-Id: <20191010113356.5017-24-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.66]); Thu, 10 Oct 2019 11:36:21 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson Now that excp always contains a real exception number, we can use that instead of a separate fail variable. This allows a redundant test to be removed. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-12-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 6a0728b65f..98a1ee8317 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -127,7 +127,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, CPUS390XState *env =3D &cpu->env; target_ulong vaddr, raddr; uint64_t asc, tec; - int prot, fail, excp; + int prot, excp; =20 qemu_log_mask(CPU_LOG_MMU, "%s: addr 0x%" VADDR_PRIx " rw %d mmu_idx %= d\n", __func__, address, access_type, mmu_idx); @@ -141,20 +141,18 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, vaddr &=3D 0x7fffffff; } excp =3D mmu_translate(env, vaddr, access_type, asc, &raddr, &prot= , &tec); - fail =3D excp; } else if (mmu_idx =3D=3D MMU_REAL_IDX) { /* 31-Bit mode */ if (!(env->psw.mask & PSW_MASK_64)) { vaddr &=3D 0x7fffffff; } excp =3D mmu_translate_real(env, vaddr, access_type, &raddr, &prot= , &tec); - fail =3D excp; } else { g_assert_not_reached(); } =20 /* check out of RAM access */ - if (!fail && + if (!excp && !address_space_access_valid(&address_space_memory, raddr, TARGET_PAGE_SIZE, access_type, MEMTXATTRS_UNSPECIFIED)) { @@ -163,10 +161,9 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, in= t size, __func__, (uint64_t)raddr, (uint64_t)ram_size); excp =3D PGM_ADDRESSING; tec =3D 0; /* unused */ - fail =3D 1; } =20 - if (!fail) { + if (!excp) { qemu_log_mask(CPU_LOG_MMU, "%s: set tlb %" PRIx64 " -> %" PRIx64 " (%x)\n", __func__, (uint64_t)vaddr, (uint64_t)raddr, prot); @@ -178,13 +175,11 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, return false; } =20 - if (excp) { - if (excp !=3D PGM_ADDRESSING) { - stq_phys(env_cpu(env)->as, - env->psa + offsetof(LowCore, trans_exc_code), tec); - } - trigger_pgm_exception(env, excp, ILEN_AUTO); + if (excp !=3D PGM_ADDRESSING) { + stq_phys(env_cpu(env)->as, + env->psa + offsetof(LowCore, trans_exc_code), tec); } + trigger_pgm_exception(env, excp, ILEN_AUTO); cpu_restore_state(cs, retaddr, true); =20 /* --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708982; cv=none; d=zoho.com; s=zohoarc; b=NTA+a4ossF1qQGhqnwl9LE2XIarGeOYLXEqHSc1jt/0WwdyoPrfq7pRYb76+STmWAueOZz53LjUjbCelO83ZQ6iHm7jdqA9jQZCgVfQLTPpCfzvJEiZcKx29zGZw+qGbQIk+VCD831SLP0GMkEhKDvs1aS5aTS1HhRJsiVRwONI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570708982; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; 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Thu, 10 Oct 2019 07:36:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkD-0006YT-0v for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33724) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkC-0006Y6-R9; Thu, 10 Oct 2019 07:36:32 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 03D9B88FFF7; Thu, 10 Oct 2019 11:36:32 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3B0E65C1B5; Thu, 10 Oct 2019 11:36:21 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 24/31] target/s390x: Simplify helper_lra Date: Thu, 10 Oct 2019 13:33:49 +0200 Message-Id: <20191010113356.5017-25-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.68]); Thu, 10 Oct 2019 11:36:32 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson We currently call trigger_pgm_exception to set cs->exception_index and env->int_pgm_code and then read the values back and then reset cs->exception_index so that the exception is not delivered. Instead, use the exception type that we already have directly without ever triggering an exception that must be suppressed. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-13-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mem_helper.c | 17 +++-------------- 1 file changed, 3 insertions(+), 14 deletions(-) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index e15aa296dd..4254548935 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -2361,34 +2361,23 @@ void HELPER(sturg)(CPUS390XState *env, uint64_t add= r, uint64_t v1) /* load real address */ uint64_t HELPER(lra)(CPUS390XState *env, uint64_t addr) { - CPUState *cs =3D env_cpu(env); - uint32_t cc =3D 0; uint64_t asc =3D env->psw.mask & PSW_MASK_ASC; uint64_t ret, tec; - int old_exc, flags, exc; + int flags, exc, cc; =20 /* XXX incomplete - has more corner cases */ if (!(env->psw.mask & PSW_MASK_64) && (addr >> 32)) { tcg_s390_program_interrupt(env, PGM_SPECIAL_OP, GETPC()); } =20 - old_exc =3D cs->exception_index; exc =3D mmu_translate(env, addr, 0, asc, &ret, &flags, &tec); if (exc) { - /* - * We don't care about ILEN or TEC, as we're not going to - * deliver the exception -- thus resetting exception_index below. - * TODO: clean this up. - */ - trigger_pgm_exception(env, exc, ILEN_UNWIND); cc =3D 3; - } - if (cs->exception_index =3D=3D EXCP_PGM) { - ret =3D env->int_pgm_code | 0x80000000; + ret =3D exc | 0x80000000; } else { + cc =3D 0; ret |=3D addr & ~TARGET_PAGE_MASK; } - cs->exception_index =3D old_exc; =20 env->cc_op =3D cc; return ret; --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Thu, 10 Oct 2019 11:36:42 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4BB515C22C; Thu, 10 Oct 2019 11:36:32 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 25/31] target/s390x: Rely on unwinding in s390_cpu_tlb_fill Date: Thu, 10 Oct 2019 13:33:50 +0200 Message-Id: <20191010113356.5017-26-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 10 Oct 2019 11:36:42 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson We currently set ilen to AUTO, then overwrite that during unwinding, then overwrite that for the code access case. This can be simplified to setting ilen to our arbitrary value for the (undefined) code access case, then rely on unwinding to overwrite that with the correct value for the data access case. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-14-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 23 +++++++---------------- 1 file changed, 7 insertions(+), 16 deletions(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 98a1ee8317..8ce992e639 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int s= ize, { S390CPU *cpu =3D S390_CPU(cs); =20 - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_AUTO); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. = */ cpu->env.__excp_addr =3D address; @@ -179,24 +179,15 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, i= nt size, stq_phys(env_cpu(env)->as, env->psa + offsetof(LowCore, trans_exc_code), tec); } - trigger_pgm_exception(env, excp, ILEN_AUTO); - cpu_restore_state(cs, retaddr, true); =20 /* - * The ILC value for code accesses is undefined. The important - * thing here is to *not* leave env->int_pgm_ilen set to ILEN_AUTO, - * which would cause do_program_interrupt to attempt to read from - * env->psw.addr again. C.f. the condition in trigger_page_fault, - * but is not universally applied. - * - * ??? If we remove ILEN_AUTO, by moving the computation of ILEN - * into cpu_restore_state, then we may remove this entirely. + * For data accesses, ILEN will be filled in from the unwind info, + * within cpu_loop_exit_restore. For code accesses, retaddr =3D=3D 0, + * and so unwinding will not occur. However, ILEN is also undefined + * for that case -- we choose to set ILEN =3D 2. */ - if (access_type =3D=3D MMU_INST_FETCH) { - env->int_pgm_ilen =3D 2; - } - - cpu_loop_exit(cs); + trigger_pgm_exception(env, excp, 2); + cpu_loop_exit_restore(cs, retaddr); } =20 static void do_program_interrupt(CPUS390XState *env) --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708597; cv=none; d=zoho.com; s=zohoarc; b=CvACYKQh7Rn+950qAlgvWY8+WNTi9Y3IXUGgKb0F21/td7pk7aWoCKqEtmKzoS5qUc2CHg3B72aH6DOjdnBl0nnVSQ2sB3wee9i1KDhVT6m62FCEueZQSafN516GeUJ6uxdHRcAaUV6HgImk+CCEan4lPbIpAC5Fd9a6qzdN1Ck= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570708597; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=uHMsGGnWyFERoahnZ0omXl9LMDr0pe1evBEQpS9VhbE=; b=gvwCDGnRTzrpKHktk8TxEFsVXcJCfinLoVwF4mSdjfD0QJhfQ9v/DkjC1SZLuMG9tOnz639T7tamxaaHRVvypcc+uEof7VWisQ+HGEQwQkUhPkrST3FUX8WAyupDGLGZ8jrtTaldg47SZEYIQ/SWLODKhz9qbCrmt2zwUnTXZck= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570708597143414.50948167220986; Thu, 10 Oct 2019 04:56:37 -0700 (PDT) Received: from localhost ([::1]:36806 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIX3Y-0004TR-3l for importer@patchew.org; Thu, 10 Oct 2019 07:56:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50727) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkT-0006cO-W8 for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkT-0006bv-0k for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:31218) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkS-0006bg-RZ; Thu, 10 Oct 2019 07:36:48 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1913958; Thu, 10 Oct 2019 11:36:48 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id CDAC05C1B5; Thu, 10 Oct 2019 11:36:42 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 26/31] target/s390x: Rely on unwinding in s390_cpu_virt_mem_rw Date: Thu, 10 Oct 2019 13:33:51 +0200 Message-Id: <20191010113356.5017-27-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Thu, 10 Oct 2019 11:36:48 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson For TCG, we will always call s390_cpu_virt_mem_handle_exc, which will go through the unwinder to set ILEN. For KVM, we do not go through do_program_interrupt, so this argument is unused. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-15-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 869debd30a..df58fb73ba 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -510,7 +510,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uin= t8_t ar, void *hostbuf, =20 ret =3D translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_AUTO, tec); + trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); } else if (hostbuf !=3D NULL) { /* Copy data by stepping through the area page by page */ for (i =3D 0; i < nr_pages; i++) { --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570709200; cv=none; d=zoho.com; s=zohoarc; b=kR/5DDN95DF6zmlOjbj4H4J1A91lqKKfTezkwpy6LNchf4Cm7co3AgGfAawjsHr88ejZ/sFZgK6KIf/KVTZGc03sWUhdEgoI9wN0ZwMELcrOPFw1yGA0ngnWUEuYOlYdF8+3HuWDlU/O0zGpVvWNmcl9oU9MD3NWhmHIa1ydK1Y= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570709200; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=GK7x8RVqzGpKU35izZ5jflaUXwtmu0s8AmcDFU0CA2Q=; b=oJ4wn8dsPLkPKgtaxUynFIFxZTfH7FHSJ2rjDmP2RX7fX44ThVxcu3EXZzDnzL/Mnub1BMr5VmtKLXL0pk9WsZVhgyFf8OI2pQ4f3vgmYBacefETlVAOGcfJK5kmV0PUgD7J6V8EWhF+daSLYaF/NAfu0kBsKyqlK0eqhbAfjL0= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570709200099900.0963793760152; Thu, 10 Oct 2019 05:06:40 -0700 (PDT) Received: from localhost ([::1]:36896 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIXDK-0005ri-IA for importer@patchew.org; Thu, 10 Oct 2019 08:06:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50746) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iIWkW-0006fU-0P for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iIWkU-0006cS-QH for qemu-devel@nongnu.org; Thu, 10 Oct 2019 07:36:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:40905) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iIWkU-0006cC-Kt; Thu, 10 Oct 2019 07:36:50 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D934989AC7; Thu, 10 Oct 2019 11:36:49 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 616BB5C1B5; Thu, 10 Oct 2019 11:36:48 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 27/31] target/s390x: Remove ILEN_AUTO Date: Thu, 10 Oct 2019 13:33:52 +0200 Message-Id: <20191010113356.5017-28-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Thu, 10 Oct 2019 11:36:49 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson This setting is no longer used. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-16-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/cpu.h | 2 -- target/s390x/excp_helper.c | 3 --- 2 files changed, 5 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 18e7091763..e7a9a58e0f 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -806,8 +806,6 @@ void s390_io_interrupt(uint16_t subchannel_id, uint16_t= subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); /* instruction length set by unwind info */ #define ILEN_UNWIND 0 -/* automatically detect the instruction length */ -#define ILEN_AUTO 0xff #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t r= a); /* service interrupts are floating therefore we must not pass an cpustate = */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index 8ce992e639..c252e9a7d8 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -196,9 +196,6 @@ static void do_program_interrupt(CPUS390XState *env) LowCore *lowcore; int ilen =3D env->int_pgm_ilen; =20 - if (ilen =3D=3D ILEN_AUTO) { - ilen =3D get_ilen(cpu_ldub_code(env, env->psw.addr)); - } assert(ilen =3D=3D 2 || ilen =3D=3D 4 || ilen =3D=3D 6); =20 switch (env->int_pgm_code) { --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570708887; cv=none; d=zoho.com; s=zohoarc; b=cdc0cYu5ZSIUORjpDK0vUQRCVgoJosCvkUtiBMf5tCexm7mHKsee/+60UabsYss4x2YlNpon9x+DerF4s8YCyIK/n+utHL6N3BV5PNTuMK8XnqGN3KD89ZrrwF29yGtRmu9+xiZhY2gVj59YK54pVCU47WwcmcKa6sx0kc7McrE= ARC-Message-Signature: i=1; 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Thu, 10 Oct 2019 11:36:50 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 28/31] target/s390x: Remove ilen argument from trigger_access_exception Date: Thu, 10 Oct 2019 13:33:53 +0200 Message-Id: <20191010113356.5017-29-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.69]); Thu, 10 Oct 2019 11:36:51 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson The single caller passes ILEN_UNWIND; pass that along to trigger_pgm_exception directly. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-17-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index df58fb73ba..09c74f17dd 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -33,7 +33,7 @@ #define FS_WRITE 0x400 =20 static void trigger_access_exception(CPUS390XState *env, uint32_t type, - uint32_t ilen, uint64_t tec) + uint64_t tec) { S390CPU *cpu =3D env_archcpu(env); =20 @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, = uint32_t type, if (type !=3D PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code),= tec); } - trigger_pgm_exception(env, type, ilen); + trigger_pgm_exception(env, type, ILEN_UNWIND); } } =20 @@ -510,7 +510,7 @@ int s390_cpu_virt_mem_rw(S390CPU *cpu, vaddr laddr, uin= t8_t ar, void *hostbuf, =20 ret =3D translate_pages(cpu, laddr, nr_pages, pages, is_write, &tec); if (ret) { - trigger_access_exception(&cpu->env, ret, ILEN_UNWIND, tec); + trigger_access_exception(&cpu->env, ret, tec); } else if (hostbuf !=3D NULL) { /* Copy data by stepping through the area page by page */ for (i =3D 0; i < nr_pages; i++) { --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570709345; cv=none; d=zoho.com; s=zohoarc; b=F7pXJtG3BVINeVvebCjV/WlycuCcaBwACX5bRpZbZLXwYyic1YtL4El9Hf9JpxgZdLCH0ZEExFnofQULAELs2h55b8Grildu2zNX56dtsO413iYfIQImetYE9PFQ3ejMfPuS0YlQeQYwAEiG6kNvusPsqEDxC8u0gvcLBaKmZWE= ARC-Message-Signature: i=1; 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Thu, 10 Oct 2019 11:36:51 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 29/31] target/s390x: Remove ilen argument from trigger_pgm_exception Date: Thu, 10 Oct 2019 13:33:54 +0200 Message-Id: <20191010113356.5017-30-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 10 Oct 2019 11:36:53 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson All but one caller passes ILEN_UNWIND, which is not stored. For the one use case in s390_cpu_tlb_fill, set int_pgm_ilen directly, simply to avoid the assert within do_program_interrupt. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-18-richard.henderson@linaro.org> Signed-off-by: David Hildenbrand --- target/s390x/excp_helper.c | 7 ++++--- target/s390x/internal.h | 2 +- target/s390x/interrupt.c | 7 ++----- target/s390x/mmu_helper.c | 2 +- 4 files changed, 8 insertions(+), 10 deletions(-) diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index c252e9a7d8..e70c20d363 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -42,7 +42,7 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XSta= te *env, cpu_restore_state(cs, ra, true); qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n", env->psw.addr); - trigger_pgm_exception(env, code, ILEN_UNWIND); + trigger_pgm_exception(env, code); cpu_loop_exit(cs); } =20 @@ -96,7 +96,7 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int s= ize, { S390CPU *cpu =3D S390_CPU(cs); =20 - trigger_pgm_exception(&cpu->env, PGM_ADDRESSING, ILEN_UNWIND); + trigger_pgm_exception(&cpu->env, PGM_ADDRESSING); /* On real machines this value is dropped into LowMem. Since this is userland, simply put this someplace that cpu_loop can find it. = */ cpu->env.__excp_addr =3D address; @@ -186,7 +186,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int= size, * and so unwinding will not occur. However, ILEN is also undefined * for that case -- we choose to set ILEN =3D 2. */ - trigger_pgm_exception(env, excp, 2); + env->int_pgm_ilen =3D 2; + trigger_pgm_exception(env, excp); cpu_loop_exit_restore(cs, retaddr); } =20 diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c993c3ef40..d37816104d 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -317,7 +317,7 @@ void cpu_unmap_lowcore(LowCore *lowcore); =20 =20 /* interrupt.c */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ile= n); +void trigger_pgm_exception(CPUS390XState *env, uint32_t code); void cpu_inject_clock_comparator(S390CPU *cpu); void cpu_inject_cpu_timer(S390CPU *cpu); void cpu_inject_emergency_signal(S390CPU *cpu, uint16_t src_cpu_addr); diff --git a/target/s390x/interrupt.c b/target/s390x/interrupt.c index 2b71e03914..4cdbbc8849 100644 --- a/target/s390x/interrupt.c +++ b/target/s390x/interrupt.c @@ -22,16 +22,13 @@ #endif =20 /* Ensure to exit the TB after this call! */ -void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ile= n) +void trigger_pgm_exception(CPUS390XState *env, uint32_t code) { CPUState *cs =3D env_cpu(env); =20 cs->exception_index =3D EXCP_PGM; env->int_pgm_code =3D code; - /* If ILEN_UNWIND, int_pgm_ilen already has the correct value. */ - if (ilen !=3D ILEN_UNWIND) { - env->int_pgm_ilen =3D ilen; - } + /* env->int_pgm_ilen is already set, or will be set during unwinding */ } =20 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t r= a) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 09c74f17dd..90b81335f9 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -44,7 +44,7 @@ static void trigger_access_exception(CPUS390XState *env, = uint32_t type, if (type !=3D PGM_ADDRESSING) { stq_phys(cs->as, env->psa + offsetof(LowCore, trans_exc_code),= tec); } - trigger_pgm_exception(env, type, ILEN_UNWIND); + trigger_pgm_exception(env, type); } } =20 --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Thu, 10 Oct 2019 07:36:56 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3A728316D798; Thu, 10 Oct 2019 11:36:55 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id B66185C1B5; Thu, 10 Oct 2019 11:36:53 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 30/31] target/s390x: Remove ILEN_UNWIND Date: Thu, 10 Oct 2019 13:33:55 +0200 Message-Id: <20191010113356.5017-31-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Thu, 10 Oct 2019 11:36:55 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Richard Henderson , Thomas Huth , David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: Richard Henderson This setting is no longer used. Signed-off-by: Richard Henderson Message-Id: <20191001171614.8405-19-richard.henderson@linaro.org> Reviewed-by: David Hildenbrand Signed-off-by: David Hildenbrand --- target/s390x/cpu.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index e7a9a58e0f..17460ed7b3 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -804,8 +804,6 @@ int cpu_s390x_signal_handler(int host_signum, void *pin= fo, void *puc); void s390_crw_mchk(void); void s390_io_interrupt(uint16_t subchannel_id, uint16_t subchannel_nr, uint32_t io_int_parm, uint32_t io_int_word); -/* instruction length set by unwind info */ -#define ILEN_UNWIND 0 #define RA_IGNORED 0 void s390_program_interrupt(CPUS390XState *env, uint32_t code, uintptr_t r= a); /* service interrupts are floating therefore we must not pass an cpustate = */ --=20 2.21.0 From nobody Tue Apr 16 14:19:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Thu, 10 Oct 2019 07:36:58 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5931E81F07; Thu, 10 Oct 2019 11:36:57 +0000 (UTC) Received: from t460s.redhat.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 83C235C1B5; Thu, 10 Oct 2019 11:36:55 +0000 (UTC) From: David Hildenbrand To: Peter Maydell , qemu-devel@nongnu.org Subject: [PULL 31/31] s390x/tcg: MVCL: Exit to main loop if requested Date: Thu, 10 Oct 2019 13:33:56 +0200 Message-Id: <20191010113356.5017-32-david@redhat.com> In-Reply-To: <20191010113356.5017-1-david@redhat.com> References: <20191010113356.5017-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Thu, 10 Oct 2019 11:36:57 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , David Hildenbrand , Cornelia Huck , Richard Henderson , qemu-s390x@nongnu.org, Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" MVCL is interruptible and we should check for interrupts and process them after writing back the variables to the registers. Let's check for any exit requests and exit to the main loop. Introduce a new helper function for that: cpu_loop_exit_requested(). When booting Fedora 30, I can see a handful of these exits and it seems to work reliable. Also, Richard explained why this works correctly even when MVCL is called via EXECUTE: (1) TB with EXECUTE runs, at address Ae - env->psw_addr stored with Ae. - helper_ex() runs, memory address Am computed from D2a(X2a,B2a) or from psw.addr+RI2. - env->ex_value stored with memory value modified by R1a (2) TB of executee runs, - env->ex_value stored with 0. - helper_mvcl() runs, using and updating R1b, R1b+1, R2b, R2b+1. (3a) helper_mvcl() completes, - TB of executee continues, psw.addr +=3D ilen. - Next instruction is the one following EXECUTE. (3b) helper_mvcl() exits to main loop, - cpu_loop_exit_restore() unwinds psw.addr =3D Ae. - Next instruction is the EXECUTE itself... - goto 1. As the PoP mentiones that an interruptible instruction called via EXECUTE should avoid modifying storage/registers that are used by EXECUTE itself, it is fine to retrigger EXECUTE. Cc: Alex Benn=C3=A9e Cc: Peter Maydell Cc: Paolo Bonzini Suggested-by: Richard Henderson Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: David Hildenbrand --- include/exec/exec-all.h | 17 +++++++++++++++++ target/s390x/mem_helper.c | 11 ++++++++++- 2 files changed, 27 insertions(+), 1 deletion(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 49db07ba0b..04795c49bf 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -72,6 +72,23 @@ void QEMU_NORETURN cpu_loop_exit(CPUState *cpu); void QEMU_NORETURN cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); void QEMU_NORETURN cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); =20 +/** + * cpu_loop_exit_requested: + * @cpu: The CPU state to be tested + * + * Indicate if somebody asked for a return of the CPU to the main loop + * (e.g., via cpu_exit() or cpu_interrupt()). + * + * This is helpful for architectures that support interruptible + * instructions. After writing back all state to registers/memory, this + * call can be used to check if it makes sense to return to the main loop + * or to continue executing the interruptible instruction. + */ +static inline bool cpu_loop_exit_requested(CPUState *cpu) +{ + return (int32_t)atomic_read(&cpu_neg(cpu)->icount_decr.u32) < 0; +} + #if !defined(CONFIG_USER_ONLY) void cpu_reloading_memory_map(void); /** diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 4254548935..2325767f17 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1015,6 +1015,7 @@ uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r1= , uint32_t r2) uint64_t srclen =3D env->regs[r2 + 1] & 0xffffff; uint64_t src =3D get_address(env, r2); uint8_t pad =3D env->regs[r2 + 1] >> 24; + CPUState *cs =3D env_cpu(env); S390Access srca, desta; uint32_t cc, cur_len; =20 @@ -1065,7 +1066,15 @@ uint32_t HELPER(mvcl)(CPUS390XState *env, uint32_t r= 1, uint32_t r2) env->regs[r1 + 1] =3D deposit64(env->regs[r1 + 1], 0, 24, destlen); set_address_zero(env, r1, dest); =20 - /* TODO: Deliver interrupts. */ + /* + * MVCL is interruptible. Return to the main loop if requested aft= er + * writing back all state to registers. If no interrupt will get + * injected, we'll end up back in this handler and continue proces= sing + * the remaining parts. + */ + if (destlen && unlikely(cpu_loop_exit_requested(cs))) { + cpu_loop_exit_restore(cs, ra); + } } return cc; } --=20 2.21.0