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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id z9sm19135541wrl.35.2019.10.08.10.18.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 08 Oct 2019 10:18:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IKaS8RTHBXtjU4umm9TxJgozBl5pnbt1z64JULe41fo=; b=Csx+4V13gC3qgDV0eLlT1+8TisjHqgVTeDPEunDMr3qWRh8glQcAJirAXo1X+x7f7z cpTFMeqhvWwonHa4xWTNFzNghuFVIgra+5m9MyEvIgJRmQF0AbpKHfPCinAao9F2X8lO G0f0u3bsukY0VwBRL6tFA74VHqgcwb5d8nMlmqsf7kA6PMgpZ8Ms5SCKARzAfz6gk2Nk MlpLKg7I9Klo5FXiJ60DR4NWMl7OUXwBlLv8avu5mjuWC1jH+EpkAy6r/8fEIX94jIAH m+TkvCbK8GrKQjoFu0ARnagwxZTigqZW6emqz5++4AYj9Y7aUbSe+HBFBb8jKxFyrsJn 4ZgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IKaS8RTHBXtjU4umm9TxJgozBl5pnbt1z64JULe41fo=; b=JiOfzKeYIgXIeHlm9MvflVMbGcu3OPOIAvdYKSfJxTqU/KL6GOzDOA3oClIC+0UxNT gsLGjZhWPFFIbPQqANgyWGYR5KUYh1hnpwi8zXWjAsEFkAoOWh7Cw2O6e9WODt/RbzAm A8uG94zXDdC9rBfrq/URWLYnxeUoTreG5oGDf0VS4ZXShnnXIVENOG3zeEktj+3dAfWf rZvx5hyZVcW7ndk1/0hr9n+dMA5tan1lW6tfDojjdII3/YM+3NSkd/rZdGBFpQWEZXXO zfzYyet8CsEIR507ydjJiafl6UeKbtE0TehHMyikRk2ffY8xG7JeDUiCPJFGQXCmn53V m4AQ== X-Gm-Message-State: APjAAAW61pGPRkWN0VT7Jl2GvvMeq7TRqNXhu670EUzoK4JGchErxkQj 1wWdayQx0+szttNTEtwDZt8LDw== X-Google-Smtp-Source: APXvYqzDY0CNWKdQ+bPOoT5M6JXegvoHXdiDp+oLrTgLxO5mE1g5EuZxRcnbH6AMEN4rmIhIeilX6w== X-Received: by 2002:a7b:c753:: with SMTP id w19mr4976166wmk.25.1570555084986; Tue, 08 Oct 2019 10:18:04 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 17/21] hw/timer/imx_epit.c: Switch to transaction-based ptimer API Date: Tue, 8 Oct 2019 18:17:36 +0100 Message-Id: <20191008171740.9679-18-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191008171740.9679-1-peter.maydell@linaro.org> References: <20191008171740.9679-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Switch the imx_epit.c code away from bottom-half based ptimers to the new transaction-based ptimer API. This just requires adding begin/commit calls around the various places that modify the ptimer state, and using the new ptimer_init() function to create the timer. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- hw/timer/imx_epit.c | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/hw/timer/imx_epit.c b/hw/timer/imx_epit.c index 39810ac8b03..baf6338e1a6 100644 --- a/hw/timer/imx_epit.c +++ b/hw/timer/imx_epit.c @@ -17,7 +17,6 @@ #include "migration/vmstate.h" #include "hw/irq.h" #include "hw/misc/imx_ccm.h" -#include "qemu/main-loop.h" #include "qemu/module.h" #include "qemu/log.h" =20 @@ -74,6 +73,10 @@ static void imx_epit_update_int(IMXEPITState *s) } } =20 +/* + * Must be called from within a ptimer_transaction_begin/commit block + * for both s->timer_cmp and s->timer_reload. + */ static void imx_epit_set_freq(IMXEPITState *s) { uint32_t clksrc; @@ -105,6 +108,8 @@ static void imx_epit_reset(DeviceState *dev) s->lr =3D EPIT_TIMER_MAX; s->cmp =3D 0; s->cnt =3D 0; + ptimer_transaction_begin(s->timer_cmp); + ptimer_transaction_begin(s->timer_reload); /* stop both timers */ ptimer_stop(s->timer_cmp); ptimer_stop(s->timer_reload); @@ -117,6 +122,8 @@ static void imx_epit_reset(DeviceState *dev) /* if the timer is still enabled, restart it */ ptimer_run(s->timer_reload, 0); } + ptimer_transaction_commit(s->timer_cmp); + ptimer_transaction_commit(s->timer_reload); } =20 static uint32_t imx_epit_update_count(IMXEPITState *s) @@ -164,6 +171,7 @@ static uint64_t imx_epit_read(void *opaque, hwaddr offs= et, unsigned size) return reg_value; } =20 +/* Must be called from ptimer_transaction_begin/commit block for s->timer_= cmp */ static void imx_epit_reload_compare_timer(IMXEPITState *s) { if ((s->cr & (CR_EN | CR_OCIEN)) =3D=3D (CR_EN | CR_OCIEN)) { @@ -191,6 +199,8 @@ static void imx_epit_write(void *opaque, hwaddr offset,= uint64_t value, =20 switch (offset >> 2) { case 0: /* CR */ + ptimer_transaction_begin(s->timer_cmp); + ptimer_transaction_begin(s->timer_reload); =20 oldcr =3D s->cr; s->cr =3D value & 0x03ffffff; @@ -231,6 +241,9 @@ static void imx_epit_write(void *opaque, hwaddr offset,= uint64_t value, } else { ptimer_stop(s->timer_cmp); } + + ptimer_transaction_commit(s->timer_cmp); + ptimer_transaction_commit(s->timer_reload); break; =20 case 1: /* SR - ACK*/ @@ -244,6 +257,8 @@ static void imx_epit_write(void *opaque, hwaddr offset,= uint64_t value, case 2: /* LR - set ticks */ s->lr =3D value; =20 + ptimer_transaction_begin(s->timer_cmp); + ptimer_transaction_begin(s->timer_reload); if (s->cr & CR_RLD) { /* Also set the limit if the LRD bit is set */ /* If IOVW bit is set then set the timer value */ @@ -255,12 +270,16 @@ static void imx_epit_write(void *opaque, hwaddr offse= t, uint64_t value, } =20 imx_epit_reload_compare_timer(s); + ptimer_transaction_commit(s->timer_cmp); + ptimer_transaction_commit(s->timer_reload); break; =20 case 3: /* CMP */ s->cmp =3D value; =20 + ptimer_transaction_begin(s->timer_cmp); imx_epit_reload_compare_timer(s); + ptimer_transaction_commit(s->timer_cmp); =20 break; =20 @@ -281,6 +300,11 @@ static void imx_epit_cmp(void *opaque) imx_epit_update_int(s); } =20 +static void imx_epit_reload(void *opaque) +{ + /* No action required on rollover of timer_reload */ +} + static const MemoryRegionOps imx_epit_ops =3D { .read =3D imx_epit_read, .write =3D imx_epit_write, @@ -308,7 +332,6 @@ static void imx_epit_realize(DeviceState *dev, Error **= errp) { IMXEPITState *s =3D IMX_EPIT(dev); SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); - QEMUBH *bh; =20 DPRINTF("\n"); =20 @@ -317,10 +340,9 @@ static void imx_epit_realize(DeviceState *dev, Error *= *errp) 0x00001000); sysbus_init_mmio(sbd, &s->iomem); =20 - s->timer_reload =3D ptimer_init_with_bh(NULL, PTIMER_POLICY_DEFAULT); + s->timer_reload =3D ptimer_init(imx_epit_reload, s, PTIMER_POLICY_DEFA= ULT); =20 - bh =3D qemu_bh_new(imx_epit_cmp, s); - s->timer_cmp =3D ptimer_init_with_bh(bh, PTIMER_POLICY_DEFAULT); + s->timer_cmp =3D ptimer_init(imx_epit_cmp, s, PTIMER_POLICY_DEFAULT); } =20 static void imx_epit_class_init(ObjectClass *klass, void *data) --=20 2.20.1