From nobody Mon Feb 9 18:20:01 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570545200; cv=none; d=zoho.com; s=zohoarc; b=RLC165ZtpjtQAAotREbX2J/z2IK2g23Kg9bvm5S9w7+7W5EQcQQI+ea3VPgU1DpsgmSbFf/wxOVCI7jPi0MPF6rG3Ov2ctJac2zNQH7R5CUMO9rKURLpuVXkFG/MAn8smzXOnNFdKOqoJwxdPW9gSnmU1AlSSf8kfGkbtYgzSbk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570545200; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To; bh=7bPZdy9PxvHFJ8EAAbjBgMudhQq8S7uBtlge1o04RDk=; b=AK9J4Hc6xKqWFyhwmFUzeq0SfG2wWH/vxh8gPCURQsjF5knRq85JI9pC4toDsqLptzyLqpmmH3JmCVpI9fgd1q7YK4xiiJw/FXLAo1CBhlpZ93gfc6RkUOoFHEmbl/j3qFA2CAYLWivUsXVwjUqlPbhNGm0Z/YbpdGwRVCnnEJU= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570545200595190.25966772787683; Tue, 8 Oct 2019 07:33:20 -0700 (PDT) Received: from localhost ([::1]:56686 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHqYA-00041f-Q2 for importer@patchew.org; Tue, 08 Oct 2019 10:33:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50045) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHqRq-0006Wz-MR for qemu-devel@nongnu.org; Tue, 08 Oct 2019 10:26:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iHqRp-00008Q-JE for qemu-devel@nongnu.org; Tue, 08 Oct 2019 10:26:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:23807) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iHqRl-00005W-2U; Tue, 08 Oct 2019 10:26:41 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3C9D77FDF0; Tue, 8 Oct 2019 14:26:40 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-43.brq.redhat.com [10.40.204.43]) by smtp.corp.redhat.com (Postfix) with ESMTPS id AD2A919C69; Tue, 8 Oct 2019 14:26:27 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: Eduardo Habkost , qemu-devel@nongnu.org Subject: [PATCH v2 3/8] hw/ide/piix: Convert reset handler to DeviceReset Date: Tue, 8 Oct 2019 16:25:34 +0200 Message-Id: <20191008142539.7793-4-philmd@redhat.com> In-Reply-To: <20191008142539.7793-1-philmd@redhat.com> References: <20191008142539.7793-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Tue, 08 Oct 2019 14:26:40 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-block@nongnu.org, "Michael S. Tsirkin" , Aleksandar Rikalo , John Snow , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Aleksandar Markovic , Igor Mammedov , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The PIIX3/IDE is a PCI device within the PIIX3 chipset, it will be reset when the PCI bus it stands on is reset. Convert its reset handler into a proper Device reset method. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/ide/piix.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/ide/piix.c b/hw/ide/piix.c index fba6bc8bff..18b2c3b722 100644 --- a/hw/ide/piix.c +++ b/hw/ide/piix.c @@ -30,7 +30,6 @@ #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" #include "sysemu/dma.h" -#include "sysemu/reset.h" =20 #include "hw/ide/pci.h" #include "trace.h" @@ -103,9 +102,9 @@ static void bmdma_setup_bar(PCIIDEState *d) } } =20 -static void piix3_reset(void *opaque) +static void piix3_ide_reset(DeviceState *dev) { - PCIIDEState *d =3D opaque; + PCIIDEState *d =3D PCI_IDE(dev); PCIDevice *pd =3D PCI_DEVICE(d); uint8_t *pci_conf =3D pd->config; int i; @@ -154,8 +153,6 @@ static void pci_piix_ide_realize(PCIDevice *dev, Error = **errp) =20 pci_conf[PCI_CLASS_PROG] =3D 0x80; // legacy ATA mode =20 - qemu_register_reset(piix3_reset, d); - bmdma_setup_bar(d); pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, &d->bmdma_bar); =20 @@ -247,6 +244,7 @@ static void piix3_ide_class_init(ObjectClass *klass, vo= id *data) DeviceClass *dc =3D DEVICE_CLASS(klass); PCIDeviceClass *k =3D PCI_DEVICE_CLASS(klass); =20 + dc->reset =3D piix3_ide_reset; k->realize =3D pci_piix_ide_realize; k->exit =3D pci_piix_ide_exitfn; k->vendor_id =3D PCI_VENDOR_ID_INTEL; --=20 2.21.0