From nobody Fri Apr 19 11:03:20 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570468104; cv=none; d=zoho.com; s=zohoarc; b=FtTcd1Zigs1xo8L0ZPshCRt8QutsaeyC5RSNsS2iPsOSGDt39VurJgeB3F04U0c5DBiWCQ0UUPeYiRwJTo07F/ku7qzPJLSCp0S+fQo0KJsjnNdDnCCZEOfeMzm7fwsFOJfs5GyIUI2cxxALwtWITztqpGouxFYbzW4Kzk4uMSg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570468104; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=owW2GUOgtujxM+kOKkANYoglOzLyvGqyH6gw3+cEcaU=; b=co8SOz/LAcSJy70r+Jp1V/33HfxrIO+fH7NMcfXaLhhturvlEr6WcW6COVU7+VsfWRAaooLrBHhnWfrw9eY1OeFYxfRM0NrwbPy23d23KfIoUOz3cHAgmWLeaT+rCHIEGfKGRDhMW34LsWgVEPuj+8TVu8DzyTapbtWBAIE4t1c= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570468104188545.2161574148131; Mon, 7 Oct 2019 10:08:24 -0700 (PDT) Received: from localhost ([::1]:47924 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHWUg-0008HL-RX for importer@patchew.org; Mon, 07 Oct 2019 13:08:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36865) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHWSw-0006Gb-JH for qemu-devel@nongnu.org; Mon, 07 Oct 2019 13:06:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iHWSv-0004pQ-In for qemu-devel@nongnu.org; Mon, 07 Oct 2019 13:06:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36512) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iHWSr-0004o4-GY; Mon, 07 Oct 2019 13:06:29 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B375FC0568FA; Mon, 7 Oct 2019 17:06:28 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id BDF3E5D9CD; Mon, 7 Oct 2019 17:06:25 +0000 (UTC) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH 1/5] target/arm/kvm64: kvm64 cpus have timer registers Date: Mon, 7 Oct 2019 19:06:18 +0200 Message-Id: <20191007170622.1814-2-drjones@redhat.com> In-Reply-To: <20191007170622.1814-1-drjones@redhat.com> References: <20191007170622.1814-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 07 Oct 2019 17:06:28 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Add the missing GENERIC_TIMER feature to kvm64 cpus. We don't currently use these registers when KVM is enabled, but it's probably best we add the feature flag for consistency and potential future use. There's also precedent, as we add the PMU feature flag to KVM enabled guests, even though we don't use those registers either. This change was originally posted as a hunk of a different, never merged patch from Bijan Mottahedeh. Signed-off-by: Andrew Jones Reviewed-by: Richard Henderson --- target/arm/kvm64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 876184b8fe4d..5cafcb7d36dd 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -605,6 +605,7 @@ bool kvm_arm_get_host_cpu_features(ARMHostCPUFeatures *= ahcf) set_feature(&features, ARM_FEATURE_NEON); set_feature(&features, ARM_FEATURE_AARCH64); set_feature(&features, ARM_FEATURE_PMU); + set_feature(&features, ARM_FEATURE_GENERIC_TIMER); =20 ahcf->features =3D features; =20 --=20 2.20.1 From nobody Fri Apr 19 11:03:20 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570468226; cv=none; d=zoho.com; s=zohoarc; b=f0Astawy+GMj3wjzyUvMbjpahb/80x0uKzOEfR0AuNkmuFhvkxttZPsRhOF3TCaQf3ahs9Wt83jIG3ELOVYi2Owr/4F9jUlCJLOnSyWF5Z3wsI5Ed6hYHVa4MnhJtmzcjlK4VFmNEO0A/qJlV5qbEt4qOqpiUTlSt7P83njpMIA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570468226; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=f9lC9hFwAWs4VfcECOWBChN0Ee2FFnDZMKJGTwBku3s=; b=Foz39MUgxHKTIMk1EZZuswZ+zB4SgUphhdVfYc84jRaLSiNRZlfaRVVbZ4FX+d1F8fm1AEwxQlfsR7TQTVOI6JqIXh5T1l1dswLFmQA7MI7asjPV3M/cq+CVOiUVkRZMu8FZY7Gh06/m3oVSppfIaylBlCiN00Tfzi8fptxE2ZM= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570468226105627.9869468996814; Mon, 7 Oct 2019 10:10:26 -0700 (PDT) Received: from localhost ([::1]:47940 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHWWb-0001ya-Uh for importer@patchew.org; Mon, 07 Oct 2019 13:10:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36887) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHWSz-0006HC-M2 for qemu-devel@nongnu.org; Mon, 07 Oct 2019 13:06:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iHWSx-0004q8-M7 for qemu-devel@nongnu.org; Mon, 07 Oct 2019 13:06:37 -0400 Received: from mx1.redhat.com ([209.132.183.28]:33068) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iHWSt-0004od-JP; Mon, 07 Oct 2019 13:06:31 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4D49387701; Mon, 7 Oct 2019 17:06:30 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 070445D9CD; Mon, 7 Oct 2019 17:06:28 +0000 (UTC) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH 2/5] timer: arm: Introduce functions to get the host cntfrq Date: Mon, 7 Oct 2019 19:06:19 +0200 Message-Id: <20191007170622.1814-3-drjones@redhat.com> In-Reply-To: <20191007170622.1814-1-drjones@redhat.com> References: <20191007170622.1814-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.71]); Mon, 07 Oct 2019 17:06:30 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" When acceleration like KVM is in use it's necessary to use the host's counter frequency when converting ticks to or from time units. Signed-off-by: Andrew Jones Reviewed-by: Richard Henderson --- include/qemu/timer.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/include/qemu/timer.h b/include/qemu/timer.h index 85bc6eb00b21..8941ddea8242 100644 --- a/include/qemu/timer.h +++ b/include/qemu/timer.h @@ -1006,6 +1006,22 @@ static inline int64_t cpu_get_host_ticks(void) } #endif =20 +#if defined(__aarch64__) +static inline uint32_t cpu_get_host_tick_frequency(void) +{ + uint64_t frq; + asm volatile("mrs %0, cntfrq_el0" : "=3Dr" (frq)); + return frq; +} +#elif defined(__arm__) +static inline uint32_t cpu_get_host_tick_frequency(void) +{ + uint32_t frq; + asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=3Dr" (frq)); + return frq; +} +#endif + #ifdef CONFIG_PROFILER static inline int64_t profile_getclock(void) { --=20 2.20.1 From nobody Fri Apr 19 11:03:20 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570468562; cv=none; d=zoho.com; s=zohoarc; b=jhTNUwLp26Uus0z9OLouMDZ9CwniRZGBnYn1TlgwdVhNRhOToaOWABbT3CKHXYcWlz8VIuy7l/nXaB3Khs4VG6w9KZiAagCMXqVKP/RUxE6W9tITt7FvXDTlLWz1/Xp/Yu8agr0nhU2eZQlxC4ty8y9AhQOYVA1/a7kTJP6V1jA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570468562; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=icXGJqHLQO07pfbl4+Fw7NYQ3ut2SUmAHMvos+/3IYk=; b=LSrGk9i4r8d06s4ZqavDyuH97/c1kdKYnIxvK0vig9Cr6kTz4EUxPPPmqdMeMFaV3awlFHq7Nj5tmtEWmnk3HnKCZ04Fb/07r8JQnYBOQAHvL8urhuckK9oR5998IMuygtFxneMCziAfGSAGdsArTJ2U0nbzyffZBqAIfGZTC3I= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570468562182645.5361131920776; Mon, 7 Oct 2019 10:16:02 -0700 (PDT) Received: from localhost ([::1]:48010 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHWby-0006tR-4i for importer@patchew.org; Mon, 07 Oct 2019 13:15:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36938) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHWT2-0006M9-H6 for qemu-devel@nongnu.org; Mon, 07 Oct 2019 13:06:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iHWT0-0004rQ-Ve for qemu-devel@nongnu.org; Mon, 07 Oct 2019 13:06:40 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53596) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iHWSv-0004pL-VA; Mon, 07 Oct 2019 13:06:34 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 301BE307CDC0; Mon, 7 Oct 2019 17:06:33 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 94E995D9C9; Mon, 7 Oct 2019 17:06:30 +0000 (UTC) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH 3/5] target/arm/kvm: Implement cpu feature kvm-adjvtime Date: Mon, 7 Oct 2019 19:06:20 +0200 Message-Id: <20191007170622.1814-4-drjones@redhat.com> In-Reply-To: <20191007170622.1814-1-drjones@redhat.com> References: <20191007170622.1814-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Mon, 07 Oct 2019 17:06:33 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" When kvm-adjvtime is enabled the guest's cntvct[_el0] won't count the time when the VM is stopped. That time is skipped by updating cntvoff[_el2] on each transition to vm_running using the current QEMU_CLOCK_VIRTUAL time. QEMU_CLOCK_VIRTUAL only ticks when the VM is running. This patch only provides the implementation. A subsequent patch will provide the CPU property allowing the feature to be enabled. Reported-by: Bijan Mottahedeh Suggested-by: Bijan Mottahedeh Signed-off-by: Andrew Jones Reviewed-by: Richard Henderson --- target/arm/cpu.h | 3 +++ target/arm/kvm.c | 20 ++++++++++++++++++++ target/arm/kvm32.c | 15 +++++++++++++++ target/arm/kvm64.c | 15 +++++++++++++++ target/arm/kvm_arm.h | 12 ++++++++++++ 5 files changed, 65 insertions(+) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 5b9c3e4cd73d..923bd5e6384d 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -821,6 +821,9 @@ struct ARMCPU { /* KVM init features for this CPU */ uint32_t kvm_init_features[7]; =20 + /* KVM CPU features */ + bool kvm_adjvtime; + /* Uniprocessor system with MP extensions */ bool mp_is_up; =20 diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 7a540d9591f9..f79b9b8ef57a 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -571,6 +571,26 @@ int kvm_arm_sync_mpstate_to_qemu(ARMCPU *cpu) return 0; } =20 +void kvm_arm_set_virtual_time(CPUState *cs) +{ + uint64_t cnt; + struct kvm_one_reg reg =3D { + .id =3D KVM_REG_ARM_TIMER_CNT, + .addr =3D (uintptr_t)&cnt, + }; + int ret; + + cnt =3D muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), + cpu_get_host_tick_frequency(), + NANOSECONDS_PER_SECOND); + + ret =3D kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); + if (ret) { + error_report("Failed to set KVM_REG_ARM_TIMER_CNT"); + abort(); + } +} + int kvm_put_vcpu_events(ARMCPU *cpu) { CPUARMState *env =3D &cpu->env; diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c index 32bf8d6757c4..79c6013066a9 100644 --- a/target/arm/kvm32.c +++ b/target/arm/kvm32.c @@ -16,6 +16,7 @@ #include "qemu-common.h" #include "cpu.h" #include "qemu/timer.h" +#include "sysemu/runstate.h" #include "sysemu/kvm.h" #include "kvm_arm.h" #include "internals.h" @@ -183,6 +184,18 @@ int kvm_arm_cpreg_level(uint64_t regidx) return KVM_PUT_RUNTIME_STATE; } =20 +static void kvm_arm_vm_state_change(void *opaque, int running, RunState st= ate) +{ + CPUState *cs =3D opaque; + ARMCPU *cpu =3D ARM_CPU(cs); + + if (running) { + if (cpu->kvm_adjvtime) { + kvm_arm_set_virtual_time(cs); + } + } +} + #define ARM_CPU_ID_MPIDR 0, 0, 0, 5 =20 int kvm_arch_init_vcpu(CPUState *cs) @@ -198,6 +211,8 @@ int kvm_arch_init_vcpu(CPUState *cs) return -EINVAL; } =20 + qemu_add_vm_change_state_handler(kvm_arm_vm_state_change, cs); + /* Determine init features for this CPU */ memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features)); if (cpu->start_powered_off) { diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 5cafcb7d36dd..494cf7f8a5cd 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -23,6 +23,7 @@ #include "qemu/host-utils.h" #include "qemu/main-loop.h" #include "exec/gdbstub.h" +#include "sysemu/runstate.h" #include "sysemu/kvm.h" #include "sysemu/kvm_int.h" #include "kvm_arm.h" @@ -720,6 +721,18 @@ static int kvm_arm_sve_set_vls(CPUState *cs) return kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, ®); } =20 +static void kvm_arm_vm_state_change(void *opaque, int running, RunState st= ate) +{ + CPUState *cs =3D opaque; + ARMCPU *cpu =3D ARM_CPU(cs); + + if (running) { + if (cpu->kvm_adjvtime) { + kvm_arm_set_virtual_time(cs); + } + } +} + #define ARM_CPU_ID_MPIDR 3, 0, 0, 0, 5 =20 int kvm_arch_init_vcpu(CPUState *cs) @@ -735,6 +748,8 @@ int kvm_arch_init_vcpu(CPUState *cs) return -EINVAL; } =20 + qemu_add_vm_change_state_handler(kvm_arm_vm_state_change, cs); + /* Determine init features for this CPU */ memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features)); if (cpu->start_powered_off) { diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index a1cc6513f72b..d506c4e84be6 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -232,6 +232,16 @@ void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *= map); */ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu); =20 +/** + * void kvm_arm_set_virtual_time: + * @cs: CPUState + * + * Sets the guest's virtual counter offset to the difference of the host's + * current time and QEMU's QEMU_CLOCK_VIRTUAL time. This allows the + * guest's virtual counter to only reflect VM running time. + */ +void kvm_arm_set_virtual_time(CPUState *cs); + /** * kvm_arm_aarch32_supported: * @cs: CPUState @@ -323,6 +333,8 @@ static inline int kvm_arm_vgic_probe(void) return 0; } =20 +static inline void kvm_arm_set_virtual_time(CPUState *cs) {} + static inline void kvm_arm_pmu_set_irq(CPUState *cs, int irq) {} static inline void kvm_arm_pmu_init(CPUState *cs) {} =20 --=20 2.20.1 From nobody Fri Apr 19 11:03:20 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1570468400; cv=none; d=zoho.com; s=zohoarc; b=EJDs1cl9Y6/4ZCQTCxn74LYpnAYr2qMHvQ80VlQrcFXk34phLpsDmfpj0VQSzGnJZ6YaReDrMN/AIbszeRqdX0XoAbRiEy+WDlnSajkpMUifiQHgR0prgX3zd0PCN7sXq+iGBadcIt1+y1gkKnWtB39bC9PKGukEtZZ8iCc57Cg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570468400; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=OdHacEIWSF/2zTal5cic3lzuYQuJHS07vdSHU/gNiKY=; b=Rx1mzeltuBSY1YByjMn10utKjEKuiHMSD76zrPDuByBevm+oP9PZSMvJ+IZRxODVQq3F4G++2IxI9Prf5RCx+sSLpXgTc6n/KkZO+0zNQHUmsw94iVYOSGNdwaVre+ZPqzmHhE0L9PFMco5mI+aFhVA1Nr11p6XjTnDc1i5S7f0= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570468400348744.7423753697574; Mon, 7 Oct 2019 10:13:20 -0700 (PDT) Received: from localhost ([::1]:47970 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHWZT-0004jw-3H for importer@patchew.org; Mon, 07 Oct 2019 13:13:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36927) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iHWT2-0006LT-22 for qemu-devel@nongnu.org; Mon, 07 Oct 2019 13:06:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iHWT0-0004rL-Sq for qemu-devel@nongnu.org; Mon, 07 Oct 2019 13:06:39 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47802) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iHWSx-0004pu-KH; Mon, 07 Oct 2019 13:06:36 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C0BC710C050B; Mon, 7 Oct 2019 17:06:34 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 77FF65D9C9; Mon, 7 Oct 2019 17:06:33 +0000 (UTC) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH 4/5] tests/arm-cpu-features: Check feature default values Date: Mon, 7 Oct 2019 19:06:21 +0200 Message-Id: <20191007170622.1814-5-drjones@redhat.com> In-Reply-To: <20191007170622.1814-1-drjones@redhat.com> References: <20191007170622.1814-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.65]); Mon, 07 Oct 2019 17:06:34 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" If we know what the default value should be then we can test for that as well as the feature existence. Signed-off-by: Andrew Jones Reviewed-by: Richard Henderson --- tests/arm-cpu-features.c | 44 ++++++++++++++++++++++++++++++++-------- 1 file changed, 35 insertions(+), 9 deletions(-) diff --git a/tests/arm-cpu-features.c b/tests/arm-cpu-features.c index 92668efb8f56..ee444b04010f 100644 --- a/tests/arm-cpu-features.c +++ b/tests/arm-cpu-features.c @@ -141,6 +141,32 @@ static bool resp_get_feature(QDict *resp, const char *= feature) qobject_unref(_resp); \ }) =20 +#define assert_has_feature_enabled(qts, cpu_type, feature) \ +({ \ + QDict *_resp, *_props; \ + \ + _resp =3D do_query_no_props(qts, cpu_type); \ + g_assert(_resp); \ + g_assert(resp_has_props(_resp)); \ + _props =3D resp_get_props(_resp); \ + g_assert(qdict_get(_props, feature)); \ + g_assert(qdict_get_bool(_props, feature)); \ + qobject_unref(_resp); \ +}) + +#define assert_has_feature_disabled(qts, cpu_type, feature) \ +({ \ + QDict *_resp, *_props; \ + \ + _resp =3D do_query_no_props(qts, cpu_type); \ + g_assert(_resp); \ + g_assert(resp_has_props(_resp)); \ + _props =3D resp_get_props(_resp); \ + g_assert(qdict_get(_props, feature)); \ + g_assert(!qdict_get_bool(_props, feature)); \ + qobject_unref(_resp); \ +}) + static void assert_type_full(QTestState *qts) { const char *error; @@ -387,16 +413,16 @@ static void test_query_cpu_model_expansion(const void= *data) assert_error(qts, "host", "The CPU type 'host' requires KVM", NULL); =20 /* Test expected feature presence/absence for some cpu types */ - assert_has_feature(qts, "max", "pmu"); - assert_has_feature(qts, "cortex-a15", "pmu"); + assert_has_feature_enabled(qts, "max", "pmu"); + assert_has_feature_enabled(qts, "cortex-a15", "pmu"); assert_has_not_feature(qts, "cortex-a15", "aarch64"); =20 if (g_str_equal(qtest_get_arch(), "aarch64")) { - assert_has_feature(qts, "max", "aarch64"); - assert_has_feature(qts, "max", "sve"); - assert_has_feature(qts, "max", "sve128"); - assert_has_feature(qts, "cortex-a57", "pmu"); - assert_has_feature(qts, "cortex-a57", "aarch64"); + assert_has_feature_enabled(qts, "max", "aarch64"); + assert_has_feature_enabled(qts, "max", "sve"); + assert_has_feature_enabled(qts, "max", "sve128"); + assert_has_feature_enabled(qts, "cortex-a57", "pmu"); + assert_has_feature_enabled(qts, "cortex-a57", "aarch64"); =20 sve_tests_default(qts, "max"); =20 @@ -417,7 +443,7 @@ static void test_query_cpu_model_expansion_kvm(const vo= id *data) =20 qts =3D qtest_init(MACHINE "-accel kvm -cpu host"); =20 - assert_has_feature(qts, "host", "pmu"); + assert_has_feature_enabled(qts, "host", "pmu"); =20 if (g_str_equal(qtest_get_arch(), "aarch64")) { bool kvm_supports_sve; @@ -427,7 +453,7 @@ static void test_query_cpu_model_expansion_kvm(const vo= id *data) QDict *resp; char *error; =20 - assert_has_feature(qts, "host", "aarch64"); + assert_has_feature_enabled(qts, "host", "aarch64"); =20 assert_error(qts, "cortex-a15", "We cannot guarantee the CPU type 'cortex-a15' works " --=20 2.20.1 From nobody Fri Apr 19 11:03:20 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Mon, 07 Oct 2019 13:06:37 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5A21A307CDD1; Mon, 7 Oct 2019 17:06:36 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1275E5D9C9; Mon, 7 Oct 2019 17:06:34 +0000 (UTC) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Subject: [RFC PATCH 5/5] target/arm/cpu: Add the kvm-adjvtime CPU property Date: Mon, 7 Oct 2019 19:06:22 +0200 Message-Id: <20191007170622.1814-6-drjones@redhat.com> In-Reply-To: <20191007170622.1814-1-drjones@redhat.com> References: <20191007170622.1814-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.49]); Mon, 07 Oct 2019 17:06:36 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, bijan.mottahedeh@oracle.com, maz@kernel.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" kvm-adjvtime is a KVM specific CPU property and a first of its kind. To accommodate it we also add kvm_arm_add_vcpu_properties() and a KVM specific CPU properties description to the CPU features document. Signed-off-by: Andrew Jones Reviewed-by: Richard Henderson --- docs/arm-cpu-features.rst | 27 ++++++++++++++++++++++++++- target/arm/cpu.c | 2 ++ target/arm/cpu64.c | 1 + target/arm/kvm.c | 27 +++++++++++++++++++++++++++ target/arm/kvm_arm.h | 11 +++++++++++ target/arm/monitor.c | 1 + tests/arm-cpu-features.c | 4 ++++ 7 files changed, 72 insertions(+), 1 deletion(-) diff --git a/docs/arm-cpu-features.rst b/docs/arm-cpu-features.rst index 1b367e22e16e..5c317296845f 100644 --- a/docs/arm-cpu-features.rst +++ b/docs/arm-cpu-features.rst @@ -31,7 +31,9 @@ supporting the feature or only supporting the feature und= er certain configurations. For example, the `aarch64` CPU feature, which, when disabled, enables the optional AArch32 CPU feature, is only supported when using the KVM accelerator and when running on a host CPU type that -supports the feature. +supports the feature. While `aarch64` currently only works with KVM, +it could work with TCG. CPU features that are specific to KVM are +prefixed with "kvm-" and are described in "KVM VCPU Features". =20 CPU Feature Probing =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D @@ -171,6 +173,29 @@ disabling many SVE vector lengths would be quite verbo= se, the `sve` CPU properties have special semantics (see "SVE CPU Property Parsing Semantics"). =20 +KVM VCPU Features +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +KVM VCPU features are CPU features that are specific to KVM, such as +paravirt features or features that enable CPU virtualization extensions. +The features' CPU properties are only available when KVM is enabled and are +named with the prefix "kvm-". KVM VCPU features may be probed, enabled, a= nd +disabled in the same way as other CPU features. Below is the list of KVM +VCPU features and their descriptions. + + kvm-adjvtime When enabled, each time the VM transitions back + to running state the VCPU's vitual counter is + updated to ensure stopped time is not counted. + This avoids time jumps surprising guest OSes and + applications, as long as they use the virtual + counter for timekeeping, but has the side effect + of the virtual and physical counters diverging. + All timekeeping based on the virtual counter wi= ll + appear to lag behind any timekeeping that does + not subtract VM stopped time. The guest may + resynchronize its virtual counter with other ti= me + sources as needed. + SVE CPU Properties =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 7695ae551218..d8ad26438f9f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2483,6 +2483,7 @@ static void arm_max_initfn(Object *obj) =20 if (kvm_enabled()) { kvm_arm_set_cpu_features_from_host(cpu); + kvm_arm_add_vcpu_properties(obj); } else { cortex_a15_initfn(obj); =20 @@ -2674,6 +2675,7 @@ static void arm_host_initfn(Object *obj) if (arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { aarch64_add_sve_properties(obj); } + kvm_arm_add_vcpu_properties(obj); arm_cpu_post_init(obj); } =20 diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 68baf0482ffa..c9a657a178ce 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -620,6 +620,7 @@ static void aarch64_max_initfn(Object *obj) =20 if (kvm_enabled()) { kvm_arm_set_cpu_features_from_host(cpu); + kvm_arm_add_vcpu_properties(obj); } else { uint64_t t; uint32_t u; diff --git a/target/arm/kvm.c b/target/arm/kvm.c index f79b9b8ef57a..1652e3febe51 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -17,6 +17,8 @@ #include "qemu/timer.h" #include "qemu/error-report.h" #include "qemu/main-loop.h" +#include "qom/object.h" +#include "qapi/error.h" #include "sysemu/sysemu.h" #include "sysemu/kvm.h" #include "sysemu/kvm_int.h" @@ -179,6 +181,31 @@ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu) env->features =3D arm_host_cpu_features.features; } =20 +static bool kvm_adjvtime_get(Object *obj, Error **errp) +{ + return ARM_CPU(obj)->kvm_adjvtime; +} + +static void kvm_adjvtime_set(Object *obj, bool value, Error **errp) +{ + ARM_CPU(obj)->kvm_adjvtime =3D value; +} + +/* KVM VCPU properties should be prefixed with "kvm-". */ +void kvm_arm_add_vcpu_properties(Object *obj) +{ + if (!kvm_enabled()) { + return; + } + + object_property_add_bool(obj, "kvm-adjvtime", kvm_adjvtime_get, + kvm_adjvtime_set, &error_abort); + object_property_set_description(obj, "kvm-adjvtime", + "Set on to enable the adjustment of " + "the virtual counter. VM stopped time " + "will not be counted.", &error_abort); +} + bool kvm_arm_pmu_supported(CPUState *cpu) { KVMState *s =3D KVM_STATE(current_machine->accelerator); diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h index d506c4e84be6..5d8077df6a4a 100644 --- a/target/arm/kvm_arm.h +++ b/target/arm/kvm_arm.h @@ -232,6 +232,15 @@ void kvm_arm_sve_get_vls(CPUState *cs, unsigned long *= map); */ void kvm_arm_set_cpu_features_from_host(ARMCPU *cpu); =20 +/** + * void kvm_arm_add_vcpu_properties: + * @obj: The CPU object to add the properties to + * + * Add all KVM specific CPU properties to the CPU object. These + * are the CPU properties with "kvm-" prefixed names. + */ +void kvm_arm_add_vcpu_properties(Object *obj); + /** * void kvm_arm_set_virtual_time: * @cs: CPUState @@ -308,6 +317,8 @@ static inline void kvm_arm_set_cpu_features_from_host(A= RMCPU *cpu) cpu->host_cpu_probe_failed =3D true; } =20 +static inline void kvm_arm_add_vcpu_properties(Object *obj) {} + static inline bool kvm_arm_aarch32_supported(CPUState *cs) { return false; diff --git a/target/arm/monitor.c b/target/arm/monitor.c index e912ed2cefa0..a89976fe7e4b 100644 --- a/target/arm/monitor.c +++ b/target/arm/monitor.c @@ -103,6 +103,7 @@ static const char *cpu_model_advertised_features[] =3D { "sve128", "sve256", "sve384", "sve512", "sve640", "sve768", "sve896", "sve1024", "sve1152", "sve1280", "sve1408", "sve1536", "sve1664", "sve1792", "sve1920", "sve2048", + "kvm-adjvtime", NULL }; =20 diff --git a/tests/arm-cpu-features.c b/tests/arm-cpu-features.c index ee444b04010f..c207a2bec9e9 100644 --- a/tests/arm-cpu-features.c +++ b/tests/arm-cpu-features.c @@ -417,6 +417,8 @@ static void test_query_cpu_model_expansion(const void *= data) assert_has_feature_enabled(qts, "cortex-a15", "pmu"); assert_has_not_feature(qts, "cortex-a15", "aarch64"); =20 + assert_has_not_feature(qts, "max", "kvm-adjvtime"); + if (g_str_equal(qtest_get_arch(), "aarch64")) { assert_has_feature_enabled(qts, "max", "aarch64"); assert_has_feature_enabled(qts, "max", "sve"); @@ -445,6 +447,8 @@ static void test_query_cpu_model_expansion_kvm(const vo= id *data) =20 assert_has_feature_enabled(qts, "host", "pmu"); =20 + assert_has_feature_disabled(qts, "host", "kvm-adjvtime"); + if (g_str_equal(qtest_get_arch(), "aarch64")) { bool kvm_supports_sve; char max_name[8], name[8]; --=20 2.20.1