From nobody Wed Nov 12 11:57:23 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570205721; cv=none; d=zoho.com; s=zohoarc; b=bom/h+Za85/e58oLBQDpz2nk0465TuMwjgsCwHSIIuQMKrNxOs0ARrO7U2iaAVY/KC6gMEy7XJpax/dsbkpXv1jn0U5tLJ1PebYBbGyubiaxAuzxA+FTpfwBGeA6lYIL5JRdq5VPvP/6hc2lakOswrYYfRcAPz/BVKlrTebxN18= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570205721; h=Content-Type:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=sUePgMF8GDXIjJxVgSYhyboitYbq0wiByaj6rIQbZtE=; b=ivkrh+/wfbERJkI4XjpJiSFkO+pHFVgOwbxjzNXIx6yW6xhi89ytEQucxgmTv1DLWc9UsoispnD9OXY5swJQxg/13dQUk05gkwhHMgVViKvsurNEh6sPpaOWwIwIvcwXF+bxmXwo5K45P63fEe4lt+hV5D1XjzgqVaRzyrC8nBs= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570205721088716.7810433916397; Fri, 4 Oct 2019 09:15:21 -0700 (PDT) Received: from localhost ([::1]:50146 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iGQEh-0003Gy-9a for importer@patchew.org; Fri, 04 Oct 2019 12:15:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42291) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iGPuc-0006MH-CB for qemu-devel@nongnu.org; Fri, 04 Oct 2019 11:54:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iGPuZ-0000cl-Bv for qemu-devel@nongnu.org; Fri, 04 Oct 2019 11:54:34 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:2245 helo=huawei.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iGPuP-0000Uo-Pn; Fri, 04 Oct 2019 11:54:22 -0400 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id C8CD5155CB26E3B1BFA7; Fri, 4 Oct 2019 23:54:17 +0800 (CST) Received: from S00345302A-PC.china.huawei.com (10.202.227.237) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.439.0; Fri, 4 Oct 2019 23:54:11 +0800 From: Shameer Kolothum To: , , , Subject: [PATCH 4/5] hw/arm/boot: Expose the pmem nodes in the DT Date: Fri, 4 Oct 2019 16:53:01 +0100 Message-ID: <20191004155302.4632-5-shameerali.kolothum.thodi@huawei.com> X-Mailer: git-send-email 2.12.0.windows.1 In-Reply-To: <20191004155302.4632-1-shameerali.kolothum.thodi@huawei.com> References: <20191004155302.4632-1-shameerali.kolothum.thodi@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.202.227.237] X-CFilter-Loop: Reflected X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 45.249.212.191 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, lersek@redhat.com, linuxarm@huawei.com, xuwei5@hisilicon.com, shannon.zhaosl@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Eric Auger In case of NV-DIMM slots, let's add /pmem DT nodes. Signed-off-by: Eric Auger Signed-off-by: Shameer Kolothum --- hw/arm/boot.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index c264864c11..bd6d72b33e 100644 --- a/hw/arm/boot.c +++ b/hw/arm/boot.c @@ -20,6 +20,7 @@ #include "hw/boards.h" #include "sysemu/reset.h" #include "hw/loader.h" +#include "hw/mem/memory-device.h" #include "elf.h" #include "sysemu/device_tree.h" #include "qemu/config-file.h" @@ -523,6 +524,44 @@ static void fdt_add_psci_node(void *fdt) qemu_fdt_setprop_cell(fdt, "/psci", "migrate", migrate_fn); } =20 +static int fdt_add_pmem_node(void *fdt, uint32_t acells, uint32_t scells) +{ + MemoryDeviceInfoList *info, *info_list =3D qmp_memory_device_list(); + MemoryDeviceInfo *mi; + int ret; + + for (info =3D info_list; info !=3D NULL; info =3D info->next) { + mi =3D info->value; + + if (mi->type =3D=3D MEMORY_DEVICE_INFO_KIND_NVDIMM) { + PCDIMMDeviceInfo *di =3D mi->u.nvdimm.data; + char *nodename; + + nodename =3D g_strdup_printf("/pmem@%" PRIx64, di->addr); + qemu_fdt_add_subnode(fdt, nodename); + qemu_fdt_setprop_string(fdt, nodename, "compatible", "pmem-reg= ion"); + ret =3D qemu_fdt_setprop_sized_cells(fdt, nodename, "reg", ace= lls, + di->addr, scells, di->size); + /* only set the NUMA ID if it is specified */ + if (!ret && di->node >=3D 0) { + ret =3D qemu_fdt_setprop_cell(fdt, nodename, "numa-node-id= ", + di->node); + } + + g_free(nodename); + + if (ret < 0) { + fprintf(stderr, "couldn't add NVDIMM /memory@%"PRIx64" nod= e\n", + di->addr); + goto out; + } + } + } +out: + qapi_free_MemoryDeviceInfoList(info_list); + return ret; +} + int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo, hwaddr addr_limit, AddressSpace *as, MachineState *ms) { @@ -622,6 +661,12 @@ int arm_load_dtb(hwaddr addr, const struct arm_boot_in= fo *binfo, } } =20 + rc =3D fdt_add_pmem_node(fdt, acells, scells); + if (rc < 0) { + fprintf(stderr, "couldn't add pmem memory nodes\n"); + goto fail; + } + rc =3D fdt_path_offset(fdt, "/chosen"); if (rc < 0) { qemu_fdt_add_subnode(fdt, "/chosen"); --=20 2.17.1