From nobody Wed Nov 12 11:55:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1570183698; cv=none; d=zoho.com; s=zohoarc; b=UGUJ3AKMYJVIL+E/JKqB2aVIsF0KGUKzxkZMbi5pYjvnYgb6r+tLVxE2Ca9UpLGwgaCBulvCNQ27z/lp1ALwXkvUzeL69SdO548yOYgrwcTP+HjR4aiyOFKJm7HHZrcpR2lJddq2Q7GW7X/R3Gpz5EZW5r2zEBVoCHHFfxOTfhk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1570183698; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=anctZCbj/1j7BgXl3O7m4QHLlmo2Y3b//tKhjWlR4E4=; b=G5aqGBGOxaU8DCI5BL9C9kClMQJK9QDTxqUZk+FEWtBEUfTkBi7HcuwYySEnoVFvEsAGX8UsPaT909Rslt/o4pYjCB3gkC+UavVZ/o9ZMP6/NpUqvpFVN3O8MyeM0+mrH0p/F0hyCRFE7yOU7M4HXf4m7xZtDTyf8fuJtBYvYFk= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1570183698868366.0488631277675; Fri, 4 Oct 2019 03:08:18 -0700 (PDT) Received: from localhost ([::1]:44666 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iGKVU-0001IW-NU for importer@patchew.org; Fri, 04 Oct 2019 06:08:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52785) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iGK2i-0005Lt-FY for qemu-devel@nongnu.org; Fri, 04 Oct 2019 05:38:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iGK2g-0005U4-J1 for qemu-devel@nongnu.org; Fri, 04 Oct 2019 05:38:32 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:48665 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iGK2g-0005Rc-3T; Fri, 04 Oct 2019 05:38:30 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 46l4YL6sWQz9sS6; Fri, 4 Oct 2019 19:37:58 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1570181878; bh=QmCNEYj6rsNSU0nPBYpM3iu9q/HkIOe/NTiRHUO55lM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DA7UU1pbu9w0TtmTCb9ho8OLzKRtkR9oN1hr6R+momIKh95rO1by5zB/V5+fOo+oh BZ8zfRE/ZnEi49Fg56pCDJyXcbx0Z6GPJce8+F3LHYHbMF+CyZ3ODX6rUmQQ5KyK43 qhGOv7Sitc0HQOy0k7hXvHQyPjbJ7BhtOzYFRfN0= From: David Gibson To: peter.maydell@linaro.org Subject: [PULL 29/53] spapr-pci: Stop providing assigned-addresses Date: Fri, 4 Oct 2019 19:37:23 +1000 Message-Id: <20191004093747.31350-30-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191004093747.31350-1-david@gibson.dropbear.id.au> References: <20191004093747.31350-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, aik@ozlabs.ru, qemu-devel@nongnu.org, groug@kaod.org, qemu-ppc@nongnu.org, clg@kaod.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Alexey Kardashevskiy QEMU does not allocate PCI resources (BARs) in any case - coldplug devices are configured by the firmware and hotplug devices rely on the guest system to do the assignment via the PCI rescan mechanism. Also in order to create non empty "assigned-addresses", the device has to be enabled (i.e. PCI_COMMAND needs the MMIO bit set) first as otherwise io_regions[i].addr are -1, and devices are not enabled at this point. This removes "assigned-addresses" and leaves it to those who actually do resource allocation. Signed-off-by: Alexey Kardashevskiy Message-Id: <20190927022651.71642-1-aik@ozlabs.ru> Signed-off-by: David Gibson --- hw/ppc/spapr_pci.c | 42 +++++++----------------------------------- 1 file changed, 7 insertions(+), 35 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 7b71ad7c74..c1c9634755 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -835,7 +835,7 @@ static char *spapr_phb_get_loc_code(SpaprPhbState *sphb= , PCIDevice *pdev) #define b_fff(x) b_x((x), 8, 3) /* function number */ #define b_rrrrrrrr(x) b_x((x), 0, 8) /* register number */ =20 -/* for 'reg'/'assigned-addresses' OF properties */ +/* for 'reg' OF properties */ #define RESOURCE_CELLS_SIZE 2 #define RESOURCE_CELLS_ADDRESS 3 =20 @@ -849,17 +849,14 @@ typedef struct ResourceFields { =20 typedef struct ResourceProps { ResourceFields reg[8]; - ResourceFields assigned[7]; uint32_t reg_len; - uint32_t assigned_len; } ResourceProps; =20 -/* fill in the 'reg'/'assigned-resources' OF properties for +/* fill in the 'reg' OF properties for * a PCI device. 'reg' describes resource requirements for a - * device's IO/MEM regions, 'assigned-addresses' describes the - * actual resource assignments. + * device's IO/MEM regions. * - * the properties are arrays of ('phys-addr', 'size') pairs describing + * the property is an array of ('phys-addr', 'size') pairs describing * the addressable regions of the PCI device, where 'phys-addr' is a * RESOURCE_CELLS_ADDRESS-tuple of 32-bit integers corresponding to * (phys.hi, phys.mid, phys.lo), and 'size' is a @@ -888,18 +885,7 @@ typedef struct ResourceProps { * phys.mid and phys.lo correspond respectively to the hi/lo portions * of the actual address of the region. * - * how the phys-addr/size values are used differ slightly between - * 'reg' and 'assigned-addresses' properties. namely, 'reg' has - * an additional description for the config space region of the - * device, and in the case of QEMU has n=3D0 and phys.mid=3Dphys.lo=3D0 - * to describe the region as relocatable, with an address-mapping - * that corresponds directly to the PHB's address space for the - * resource. 'assigned-addresses' always has n=3D1 set with an absolute - * address assigned for the resource. in general, 'assigned-addresses' - * won't be populated, since addresses for PCI devices are generally - * unmapped initially and left to the guest to assign. - * - * note also that addresses defined in these properties are, at least + * note also that addresses defined in this property are, at least * for PAPR guests, relative to the PHBs IO/MEM windows, and * correspond directly to the addresses in the BARs. * @@ -913,8 +899,8 @@ static void populate_resource_props(PCIDevice *d, Resou= rceProps *rp) uint32_t dev_id =3D (b_bbbbbbbb(bus_num) | b_ddddd(PCI_SLOT(d->devfn)) | b_fff(PCI_FUNC(d->devfn))); - ResourceFields *reg, *assigned; - int i, reg_idx =3D 0, assigned_idx =3D 0; + ResourceFields *reg; + int i, reg_idx =3D 0; =20 /* config space region */ reg =3D &rp->reg[reg_idx++]; @@ -943,21 +929,9 @@ static void populate_resource_props(PCIDevice *d, Reso= urceProps *rp) reg->phys_lo =3D 0; reg->size_hi =3D cpu_to_be32(d->io_regions[i].size >> 32); reg->size_lo =3D cpu_to_be32(d->io_regions[i].size); - - if (d->io_regions[i].addr =3D=3D PCI_BAR_UNMAPPED) { - continue; - } - - assigned =3D &rp->assigned[assigned_idx++]; - assigned->phys_hi =3D cpu_to_be32(be32_to_cpu(reg->phys_hi) | b_n(= 1)); - assigned->phys_mid =3D cpu_to_be32(d->io_regions[i].addr >> 32); - assigned->phys_lo =3D cpu_to_be32(d->io_regions[i].addr); - assigned->size_hi =3D reg->size_hi; - assigned->size_lo =3D reg->size_lo; } =20 rp->reg_len =3D reg_idx * sizeof(ResourceFields); - rp->assigned_len =3D assigned_idx * sizeof(ResourceFields); } =20 typedef struct PCIClass PCIClass; @@ -1471,8 +1445,6 @@ static int spapr_dt_pci_device(SpaprPhbState *sphb, P= CIDevice *dev, =20 populate_resource_props(dev, &rp); _FDT(fdt_setprop(fdt, offset, "reg", (uint8_t *)rp.reg, rp.reg_len)); - _FDT(fdt_setprop(fdt, offset, "assigned-addresses", - (uint8_t *)rp.assigned, rp.assigned_len)); =20 if (sphb->pcie_ecs && pci_is_express(dev)) { _FDT(fdt_setprop_cell(fdt, offset, "ibm,pci-config-space-type", 0x= 1)); --=20 2.21.0