From nobody Tue Feb 10 06:44:08 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1569876446; cv=none; d=zoho.com; s=zohoarc; b=UPtXtI9MGFKMrcLjrgGu0zxbXQue/HBa/EId3cmqZKa8o7MZNUCPzenfW0fR+Lx5Hw6kpOpsUsoFK8zmI5Hk0IGXMhDOoy1aOpnD90OUVwzK85SGH7D8BIZY4vqmlqQPC6B6ugrIbUh2+kWmIFCighSiOTTskgYj2604dooZ+zI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569876446; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=BGOdnUQ7n88wshKpceGoTB4ILfGRgsQjpAICNmjMH9Y=; b=Mewz4wLOlvu0D4fXs0i849n1CCr6JdlHj6vBnj04SGo3NNQ56AEk2ubBQvwhUq1y6tGYJUcb29mxg/683zjTb7Q0qUqFLvQnT84MZfPg6F64Ej+l1dVBA65y1T9I7GQtNBReqSPezP5s8elBSJw8JahX7gMrQC3u18g5obPTUrg= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1569876445970330.7745065421784; Mon, 30 Sep 2019 13:47:25 -0700 (PDT) Received: from localhost ([::1]:57128 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iF2Zo-0003C8-Ch for importer@patchew.org; Mon, 30 Sep 2019 16:47:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45058) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iF2BC-00050M-43 for qemu-devel@nongnu.org; Mon, 30 Sep 2019 16:21:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iF2BA-0005pW-SF for qemu-devel@nongnu.org; Mon, 30 Sep 2019 16:21:57 -0400 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]:38893) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iF2BA-0005p9-MX for qemu-devel@nongnu.org; Mon, 30 Sep 2019 16:21:56 -0400 Received: by mail-pf1-x443.google.com with SMTP id h195so6232119pfe.5 for ; Mon, 30 Sep 2019 13:21:56 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id r28sm15336802pfg.62.2019.09.30.13.21.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Sep 2019 13:21:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=BGOdnUQ7n88wshKpceGoTB4ILfGRgsQjpAICNmjMH9Y=; b=mieC1GDejv/UZEP3ApfvREDw5Bmg/f7WChqK9wp2Dqhm/fSkuwefySH+bVl1dIpvT7 5jeHSy5LNuxd1R24thDVO8ukY3Bjui5XYXduOATSrCCv5SPOqMyDOe7sokYlj1OLDlnw V+q2HJWQziD90WnGhdC79KxhizabEnUm2wK6BKbThWpYNdnm5QsZrjDmnHHD9NMThMYj UzlKsCybinoq5vDiH2TAx7q9VUlKYsGWl2Nn3UZssJsrOz4+TpxAb97T9XXDRmA1SIJq e3CK3RRZaUGgI7dBk8WybvIVVT1EM+Ehu7kpScgYcYxDynIpenG8l9gpyJqK3BOw4AjZ fSpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=BGOdnUQ7n88wshKpceGoTB4ILfGRgsQjpAICNmjMH9Y=; b=a8C62K5Z3qA0uS4xtTUzTS9xu4XM1jZuSmkyUOwaXJflk+b97tPFIpgFlku3hoYnB5 w0wuVxwgT3RrydthGKHoCShtuJtudvhOlMrMVNhlyrP+IA89uxWCXD3b9nNULh98oqQq iPgQJWms+jNONHwBgMYnBtpQtVLz4BvQNtXpslp9Oo9uLsHRVxjRhCmXFFj8kxr1vldt AxEXwiD3VO/FQGt/G5yQ5fE9lPL3sfz8QuP+PzsRUuRNCJTAv5rtSO/JtzgG12VOedsI XbXZh0in7w9do30T1+nKpllo1gmL7TnbRET15toCW6pG8KCAMLYTELegLvq70LbSVPEB 4Hkw== X-Gm-Message-State: APjAAAUcsdODnH8CUgm+NWVJTSKaRYGdiLvMzoVr7auy9WrId6We69y7 hb+uyOhbsRnYhG0wF53Q4xnJFMp2sxg= X-Google-Smtp-Source: APXvYqyao1mwnDBuz0kXimarnkqAgAAxi0vvirb8CZmni874A1EQOv5NakBFwC4FGZZmg41BBBl1Rw== X-Received: by 2002:a17:90a:2687:: with SMTP id m7mr1135371pje.25.1569874915433; Mon, 30 Sep 2019 13:21:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v7 22/22] tcg/ppc: Update vector support for v3.00 dup/dupi Date: Mon, 30 Sep 2019 13:21:25 -0700 Message-Id: <20190930202125.21064-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190930202125.21064-1-richard.henderson@linaro.org> References: <20190930202125.21064-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.cave-ayland@ilande.co.uk, amarkovic@wavecomp.com, hsp.cat7@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" These new instructions are conditional on MSR.VEC for TX=3D1, so we can consider these Altivec instructions. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.inc.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 5b7d1bd2dc..d308d69aba 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -596,11 +596,14 @@ static int tcg_target_const_match(tcg_target_long val= , TCGType type, =20 #define XXPERMDI (OPCD(60) | (10 << 3) | 7) /* v2.06, force ax=3Dbx=3Dt= x=3D1 */ #define XXSEL (OPCD(60) | (3 << 4) | 0xf) /* v2.06, force ax=3Dbx=3Dc= x=3Dtx=3D1 */ +#define XXSPLTIB (OPCD(60) | (360 << 1) | 1) /* v3.00, force tx=3D1 */ =20 #define MFVSRD (XO31(51) | 1) /* v2.07, force sx=3D1 */ #define MFVSRWZ (XO31(115) | 1) /* v2.07, force sx=3D1 */ #define MTVSRD (XO31(179) | 1) /* v2.07, force tx=3D1 */ #define MTVSRWZ (XO31(243) | 1) /* v2.07, force tx=3D1 */ +#define MTVSRDD (XO31(435) | 1) /* v3.00, force tx=3D1 */ +#define MTVSRWS (XO31(403) | 1) /* v3.00, force tx=3D1 */ =20 #define RT(r) ((r)<<21) #define RS(r) ((r)<<21) @@ -931,6 +934,10 @@ static void tcg_out_dupi_vec(TCGContext *s, TCGType ty= pe, TCGReg ret, return; } } + if (have_isa_3_00 && val =3D=3D (tcg_target_long)dup_const(MO_8, val))= { + tcg_out32(s, XXSPLTIB | VRT(ret) | ((val & 0xff) << 11)); + return; + } =20 /* * Otherwise we must load the value from the constant pool. @@ -3021,7 +3028,22 @@ static bool tcg_out_dup_vec(TCGContext *s, TCGType t= ype, unsigned vece, TCGReg dst, TCGReg src) { tcg_debug_assert(dst >=3D TCG_REG_V0); - tcg_debug_assert(src >=3D TCG_REG_V0); + + /* Splat from integer reg allowed via constraints for v3.00. */ + if (src < TCG_REG_V0) { + tcg_debug_assert(have_isa_3_00); + switch (vece) { + case MO_64: + tcg_out32(s, MTVSRDD | VRT(dst) | RA(src) | RB(src)); + return true; + case MO_32: + tcg_out32(s, MTVSRWS | VRT(dst) | RA(src)); + return true; + default: + /* Fail, so that we fall back on either dupm or mov+dup. */ + return false; + } + } =20 /* * Recall we use (or emulate) VSX integer loads, so the integer is @@ -3482,6 +3504,7 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpc= ode op) static const TCGTargetOpDef sub2 =3D { .args_ct_str =3D { "r", "r", "rI", "rZM", "r", "r" } }; static const TCGTargetOpDef v_r =3D { .args_ct_str =3D { "v", "r" } }; + static const TCGTargetOpDef v_vr =3D { .args_ct_str =3D { "v", "vr" } = }; static const TCGTargetOpDef v_v =3D { .args_ct_str =3D { "v", "v" } }; static const TCGTargetOpDef v_v_v =3D { .args_ct_str =3D { "v", "v", "= v" } }; static const TCGTargetOpDef v_v_v_v @@ -3651,8 +3674,9 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpc= ode op) return &v_v_v; case INDEX_op_not_vec: case INDEX_op_neg_vec: - case INDEX_op_dup_vec: return &v_v; + case INDEX_op_dup_vec: + return have_isa_3_00 ? &v_vr : &v_v; case INDEX_op_ld_vec: case INDEX_op_st_vec: case INDEX_op_dupm_vec: --=20 2.17.1