From nobody Wed Nov 12 10:18:38 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1569564854; cv=none; d=zoho.com; s=zohoarc; b=cIHTLMa7TgylM9P7eHufykD/J3EHQunzdOT1IaNiH/EeXDaw1X9sNso3L2N2k5p1KjY8riCuuFSkeOf+lGOW9p4JXmlI43AeCRVFiBXb4ANRWenjvzIpgw4tVUMZ2XH4daBFSbnVkExD9EuhQpCf9efju7ycmvQHx9Hd/+r13TI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569564854; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=R/OMU6h0p1ErOUCPyWZhCZ87qPQoDKoMZjZmVQkbKF8=; b=HjRBdlt9cJ5Zb+hd86DEwmPy93WH52inT//DNMBFDi1DH2lrA82RUd4yUkHva4YGcmUpEJ6a+o9Eqd4wUhZW+S8qMs1PHQZhE9EAPj7N1boQ0V2ZwhpbUYJDlMcZhUfm+3Ju643Hi4QoYSkToVGhZIeIWMrHOjAi5S9gfpXvx9c= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1569564854098968.1207717148149; Thu, 26 Sep 2019 23:14:14 -0700 (PDT) Received: from localhost ([::1]:46632 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDjIg-0008KW-1N for importer@patchew.org; Fri, 27 Sep 2019 02:00:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47389) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDj9P-0006kd-6r for qemu-devel@nongnu.org; Fri, 27 Sep 2019 01:50:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDj9N-0004xD-9P for qemu-devel@nongnu.org; Fri, 27 Sep 2019 01:50:43 -0400 Received: from bilbo.ozlabs.org ([203.11.71.1]:45355 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iDj9M-0004ti-9H; Fri, 27 Sep 2019 01:50:41 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 46fgrC65BWz9sPZ; Fri, 27 Sep 2019 15:50:35 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1569563435; bh=uJH95fv8zdCK834D504Ee3NB5qBHe2oNm3GGUw9V7Ao=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=llGBsZuc3TdmdcfKo6dGZLbg88pv8XVMatYWyJS9yf5/DjSE6bIp67BzBV7xWqmNA cQl0cxW+ZkKD/n/2hhOQ4IHUptDJU1qJrQkChs4LfDBDChKsJFJ7LOSiCXGISOB8ob L4zzA9MVQJ+YP+MnVuNuTv+1V1tZCm1mD9PsE+Eg= From: David Gibson To: qemu-devel@nongnu.org, clg@kaod.org, qemu-ppc@nongnu.org Subject: [PATCH v2 05/33] xics: Merge TYPE_ICS_BASE and TYPE_ICS_SIMPLE classes Date: Fri, 27 Sep 2019 15:50:00 +1000 Message-Id: <20190927055028.11493-6-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190927055028.11493-1-david@gibson.dropbear.id.au> References: <20190927055028.11493-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jason Wang , Riku Voipio , groug@kaod.org, Laurent Vivier , Paolo Bonzini , =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , philmd@redhat.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" TYPE_ICS_SIMPLE is the only subtype of TYPE_ICS_BASE that's ever instantiated. The existence of different classes is mostly a hang over from when we (misguidedly) had separate subtypes for the KVM and non-KVM version of the device. There could be some call for an abstract base type for ICS variants that use a different representation of their state (PowerNV PHB3 might want this). The current split isn't really in the right place for that though. If we need this in future, we can re-implement it more in line with what we actually need. So, collapse the two classes together into just TYPE_ICS. Signed-off-by: David Gibson Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz --- hw/intc/xics.c | 86 ++++++++++++++----------------------------- hw/ppc/pnv_psi.c | 2 +- hw/ppc/spapr_irq.c | 4 +- include/hw/ppc/xics.h | 16 +++----- 4 files changed, 36 insertions(+), 72 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 82e6f09259..dfe7dbd254 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -555,7 +555,7 @@ static void ics_reset_irq(ICSIRQState *irq) =20 static void ics_reset(DeviceState *dev) { - ICSState *ics =3D ICS_BASE(dev); + ICSState *ics =3D ICS(dev); int i; uint8_t flags[ics->nr_irqs]; =20 @@ -573,7 +573,7 @@ static void ics_reset(DeviceState *dev) if (kvm_irqchip_in_kernel()) { Error *local_err =3D NULL; =20 - ics_set_kvm_state(ICS_BASE(dev), &local_err); + ics_set_kvm_state(ICS(dev), &local_err); if (local_err) { error_report_err(local_err); } @@ -585,47 +585,15 @@ static void ics_reset_handler(void *dev) ics_reset(dev); } =20 -static void ics_simple_realize(DeviceState *dev, Error **errp) +static void ics_realize(DeviceState *dev, Error **errp) { - ICSState *ics =3D ICS_SIMPLE(dev); - ICSStateClass *icsc =3D ICS_BASE_GET_CLASS(ics); + ICSState *ics =3D ICS(dev); Error *local_err =3D NULL; - - icsc->parent_realize(dev, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - - qemu_register_reset(ics_reset_handler, ics); -} - -static void ics_simple_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc =3D DEVICE_CLASS(klass); - ICSStateClass *isc =3D ICS_BASE_CLASS(klass); - - device_class_set_parent_realize(dc, ics_simple_realize, - &isc->parent_realize); -} - -static const TypeInfo ics_simple_info =3D { - .name =3D TYPE_ICS_SIMPLE, - .parent =3D TYPE_ICS_BASE, - .instance_size =3D sizeof(ICSState), - .class_init =3D ics_simple_class_init, - .class_size =3D sizeof(ICSStateClass), -}; - -static void ics_base_realize(DeviceState *dev, Error **errp) -{ - ICSState *ics =3D ICS_BASE(dev); Object *obj; - Error *err =3D NULL; =20 - obj =3D object_property_get_link(OBJECT(dev), ICS_PROP_XICS, &err); + obj =3D object_property_get_link(OBJECT(dev), ICS_PROP_XICS, &local_er= r); if (!obj) { - error_propagate_prepend(errp, err, + error_propagate_prepend(errp, local_err, "required link '" ICS_PROP_XICS "' not found: "); return; @@ -637,16 +605,18 @@ static void ics_base_realize(DeviceState *dev, Error = **errp) return; } ics->irqs =3D g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); + + qemu_register_reset(ics_reset_handler, ics); } =20 -static void ics_base_instance_init(Object *obj) +static void ics_instance_init(Object *obj) { - ICSState *ics =3D ICS_BASE(obj); + ICSState *ics =3D ICS(obj); =20 ics->offset =3D XICS_IRQ_BASE; } =20 -static int ics_base_pre_save(void *opaque) +static int ics_pre_save(void *opaque) { ICSState *ics =3D opaque; =20 @@ -657,7 +627,7 @@ static int ics_base_pre_save(void *opaque) return 0; } =20 -static int ics_base_post_load(void *opaque, int version_id) +static int ics_post_load(void *opaque, int version_id) { ICSState *ics =3D opaque; =20 @@ -675,7 +645,7 @@ static int ics_base_post_load(void *opaque, int version= _id) return 0; } =20 -static const VMStateDescription vmstate_ics_base_irq =3D { +static const VMStateDescription vmstate_ics_irq =3D { .name =3D "ics/irq", .version_id =3D 2, .minimum_version_id =3D 1, @@ -689,45 +659,44 @@ static const VMStateDescription vmstate_ics_base_irq = =3D { }, }; =20 -static const VMStateDescription vmstate_ics_base =3D { +static const VMStateDescription vmstate_ics =3D { .name =3D "ics", .version_id =3D 1, .minimum_version_id =3D 1, - .pre_save =3D ics_base_pre_save, - .post_load =3D ics_base_post_load, + .pre_save =3D ics_pre_save, + .post_load =3D ics_post_load, .fields =3D (VMStateField[]) { /* Sanity check */ VMSTATE_UINT32_EQUAL(nr_irqs, ICSState, NULL), =20 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(irqs, ICSState, nr_irqs, - vmstate_ics_base_irq, + vmstate_ics_irq, ICSIRQState), VMSTATE_END_OF_LIST() }, }; =20 -static Property ics_base_properties[] =3D { +static Property ics_properties[] =3D { DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0), DEFINE_PROP_END_OF_LIST(), }; =20 -static void ics_base_class_init(ObjectClass *klass, void *data) +static void ics_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 - dc->realize =3D ics_base_realize; - dc->props =3D ics_base_properties; + dc->realize =3D ics_realize; + dc->props =3D ics_properties; dc->reset =3D ics_reset; - dc->vmsd =3D &vmstate_ics_base; + dc->vmsd =3D &vmstate_ics; } =20 -static const TypeInfo ics_base_info =3D { - .name =3D TYPE_ICS_BASE, +static const TypeInfo ics_info =3D { + .name =3D TYPE_ICS, .parent =3D TYPE_DEVICE, - .abstract =3D true, .instance_size =3D sizeof(ICSState), - .instance_init =3D ics_base_instance_init, - .class_init =3D ics_base_class_init, + .instance_init =3D ics_instance_init, + .class_init =3D ics_class_init, .class_size =3D sizeof(ICSStateClass), }; =20 @@ -767,8 +736,7 @@ void ics_set_irq_type(ICSState *ics, int srcno, bool ls= i) =20 static void xics_register_types(void) { - type_register_static(&ics_simple_info); - type_register_static(&ics_base_info); + type_register_static(&ics_info); type_register_static(&icp_info); type_register_static(&xics_fabric_info); } diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 8ea81e9d8e..a997f16bb4 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -469,7 +469,7 @@ static void pnv_psi_power8_instance_init(Object *obj) Pnv8Psi *psi8 =3D PNV8_PSI(obj); =20 object_initialize_child(obj, "ics-psi", &psi8->ics, sizeof(psi8->ics), - TYPE_ICS_SIMPLE, &error_abort, NULL); + TYPE_ICS, &error_abort, NULL); } =20 static const uint8_t irq_to_xivr[] =3D { diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index ac189c5796..6c45d2a3c0 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -98,7 +98,7 @@ static void spapr_irq_init_xics(SpaprMachineState *spapr,= int nr_irqs, Object *obj; Error *local_err =3D NULL; =20 - obj =3D object_new(TYPE_ICS_SIMPLE); + obj =3D object_new(TYPE_ICS); object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort); object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr), &error_fatal); @@ -109,7 +109,7 @@ static void spapr_irq_init_xics(SpaprMachineState *spap= r, int nr_irqs, return; } =20 - spapr->ics =3D ICS_BASE(obj); + spapr->ics =3D ICS(obj); =20 xics_spapr_init(spapr); } diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 7efd49c02c..1e6a9300eb 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -89,17 +89,13 @@ struct PnvICPState { uint32_t links[3]; }; =20 -#define TYPE_ICS_BASE "ics-base" -#define ICS_BASE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_BASE) +#define TYPE_ICS "ics" +#define ICS(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS) =20 -/* Retain ics for sPAPR for migration from existing sPAPR guests */ -#define TYPE_ICS_SIMPLE "ics" -#define ICS_SIMPLE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SIMPLE) - -#define ICS_BASE_CLASS(klass) \ - OBJECT_CLASS_CHECK(ICSStateClass, (klass), TYPE_ICS_BASE) -#define ICS_BASE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ICSStateClass, (obj), TYPE_ICS_BASE) +#define ICS_CLASS(klass) \ + OBJECT_CLASS_CHECK(ICSStateClass, (klass), TYPE_ICS) +#define ICS_GET_CLASS(obj) \ + OBJECT_GET_CLASS(ICSStateClass, (obj), TYPE_ICS) =20 struct ICSStateClass { DeviceClass parent_class; --=20 2.21.0