From nobody Mon May 6 12:28:32 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1569515835; cv=none; d=zoho.com; s=zohoarc; b=VsbFBpdcNNJvsZxawWpLSFvc71cdysuisazkY2xRRPSUWfGHbE0cdQ4+gf5fGpbM//S8nZ2Cw+A+Clb5kfxYuqn/zhjona3R84SQKA1Dw88ifIxdLxfCUJQpOCGAyp9u6YveXjkMt394Op78WzZOTCoEtxhtfSezasJuA+cxyEw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569515835; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Sender:Subject:To:ARC-Authentication-Results; bh=zRO1PsXuONfaA2YRQv4PkOdm9CbcZ0IMy+rFY09A2DE=; b=b/uVDK7Atzy7h2WPe/wdrHqtlm/voV4VB5hlg4Rzsq91YyZfNu8acbGnBtM6H4J/U8j4X2kxUgxiGWXNqTg0UKZCu0+uaw/okvq0nimOj28g9h8S9f01LWUqtjG1/5ARPUVLak68WOrd+qle4k4CSL/oo6E/fU4FoNPF0V0qtCQ= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1569515835026194.9436448941442; Thu, 26 Sep 2019 09:37:15 -0700 (PDT) Received: from localhost ([::1]:40790 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWlT-0003ML-NR for importer@patchew.org; Thu, 26 Sep 2019 12:37:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40982) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDMoa-0002do-BI for qemu-devel@nongnu.org; Thu, 26 Sep 2019 01:59:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDMoX-0001d0-VL for qemu-devel@nongnu.org; Thu, 26 Sep 2019 01:59:42 -0400 Received: from mga12.intel.com ([192.55.52.136]:6144) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iDMoX-0001OC-NB for qemu-devel@nongnu.org; Thu, 26 Sep 2019 01:59:41 -0400 Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Sep 2019 22:59:33 -0700 Received: from a23004-02.sh.intel.com ([10.239.9.19]) by fmsmga007.fm.intel.com with ESMTP; 25 Sep 2019 22:59:31 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,550,1559545200"; d="scan'208";a="189900932" From: qi1.zhang@intel.com To: qemu-devel@nongnu.org Subject: [PATCH] intel_iommu: TM field should not be in reserved bits Date: Thu, 26 Sep 2019 13:49:22 +0800 Message-Id: <20190926054922.21110-1-qi1.zhang@intel.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.136 X-Mailman-Approved-At: Thu, 26 Sep 2019 12:31:53 -0400 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qi1.zhang@intel.com, ehabkost@redhat.com, mst@redhat.com, pbonzini@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: "Zhang, Qi" When dt is supported, TM field should not be Reserved(0). Refer to VT-d Spec 9.8 Signed-off-by: Zhang, Qi Signed-off-by: Qi, Yadong --- hw/i386/intel_iommu.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index f1de8fdb75..2696ceeb9d 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -3567,6 +3567,13 @@ static void vtd_init(IntelIOMMUState *s) =20 if (x86_iommu->dt_supported) { s->ecap |=3D VTD_ECAP_DT; + vtd_paging_entry_rsvd_field[1] &=3D ~(1ULL << 62); + vtd_paging_entry_rsvd_field[2] &=3D ~(1ULL << 62); + vtd_paging_entry_rsvd_field[3] &=3D ~(1ULL << 62); + + vtd_paging_entry_rsvd_field[5] &=3D ~(1ULL << 62); + vtd_paging_entry_rsvd_field[6] &=3D ~(1ULL << 62); + vtd_paging_entry_rsvd_field[7] &=3D ~(1ULL << 62); } =20 if (x86_iommu->pt_supported) { --=20 2.20.1