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Wed, 25 Sep 2019 11:46:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 09/16] cputlb: Move NOTDIRTY handling from I/O path to TLB path Date: Wed, 25 Sep 2019 11:45:41 -0700 Message-Id: <20190925184548.30673-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190925184548.30673-1-richard.henderson@linaro.org> References: <20190925184548.30673-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: pass (identity @linaro.org) Pages that we want to track for NOTDIRTY are RAM. We do not really need to go through the I/O path to handle them. Acked-by: David Hildenbrand Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Richard Henderson --- include/exec/cpu-common.h | 2 -- accel/tcg/cputlb.c | 26 +++++++++++++++++--- exec.c | 50 --------------------------------------- memory.c | 16 ------------- 4 files changed, 23 insertions(+), 71 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 1c0e03ddc2..81753bbb34 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -100,8 +100,6 @@ void qemu_flush_coalesced_mmio_buffer(void); =20 void cpu_flush_icache_range(hwaddr start, hwaddr len); =20 -extern struct MemoryRegion io_mem_notdirty; - typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque); =20 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque); diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 404ec57a4e..7e9a0f7ac8 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -905,7 +905,7 @@ static uint64_t io_readx(CPUArchState *env, CPUIOTLBEnt= ry *iotlbentry, mr =3D section->mr; mr_offset =3D (iotlbentry->addr & TARGET_PAGE_MASK) + addr; cpu->mem_io_pc =3D retaddr; - if (mr !=3D &io_mem_notdirty && !cpu->can_do_io) { + if (!cpu->can_do_io) { cpu_io_recompile(cpu, retaddr); } =20 @@ -946,7 +946,7 @@ static void io_writex(CPUArchState *env, CPUIOTLBEntry = *iotlbentry, section =3D iotlb_to_section(cpu, iotlbentry->addr, iotlbentry->attrs); mr =3D section->mr; mr_offset =3D (iotlbentry->addr & TARGET_PAGE_MASK) + addr; - if (mr !=3D &io_mem_notdirty && !cpu->can_do_io) { + if (!cpu->can_do_io) { cpu_io_recompile(cpu, retaddr); } cpu->mem_io_vaddr =3D addr; @@ -1612,7 +1612,7 @@ store_helper(CPUArchState *env, target_ulong addr, ui= nt64_t val, need_swap =3D size > 1 && (tlb_addr & TLB_BSWAP); =20 /* Handle I/O access. */ - if (likely(tlb_addr & (TLB_MMIO | TLB_NOTDIRTY))) { + if (tlb_addr & TLB_MMIO) { io_writex(env, iotlbentry, mmu_idx, val, addr, retaddr, op ^ (need_swap * MO_BSWAP)); return; @@ -1625,6 +1625,26 @@ store_helper(CPUArchState *env, target_ulong addr, u= int64_t val, =20 haddr =3D (void *)((uintptr_t)addr + entry->addend); =20 + /* Handle clean RAM pages. */ + if (tlb_addr & TLB_NOTDIRTY) { + NotDirtyInfo ndi; + + /* We require mem_io_pc in tb_invalidate_phys_page_range. */ + env_cpu(env)->mem_io_pc =3D retaddr; + + memory_notdirty_write_prepare(&ndi, env_cpu(env), addr, + addr + iotlbentry->addr, size); + + if (unlikely(need_swap)) { + store_memop(haddr, val, op ^ MO_BSWAP); + } else { + store_memop(haddr, val, op); + } + + memory_notdirty_write_complete(&ndi); + return; + } + /* * Keep these two store_memop separate to ensure that the compiler * is able to fold the entire function to a single instruction. diff --git a/exec.c b/exec.c index ea8c0b18ac..dc7001f115 100644 --- a/exec.c +++ b/exec.c @@ -88,7 +88,6 @@ static MemoryRegion *system_io; AddressSpace address_space_io; AddressSpace address_space_memory; =20 -MemoryRegion io_mem_notdirty; static MemoryRegion io_mem_unassigned; #endif =20 @@ -191,7 +190,6 @@ typedef struct subpage_t { } subpage_t; =20 #define PHYS_SECTION_UNASSIGNED 0 -#define PHYS_SECTION_NOTDIRTY 1 =20 static void io_mem_init(void); static void memory_map_init(void); @@ -1472,9 +1470,6 @@ hwaddr memory_region_section_get_iotlb(CPUState *cpu, if (memory_region_is_ram(section->mr)) { /* Normal RAM. */ iotlb =3D memory_region_get_ram_addr(section->mr) + xlat; - if (!section->readonly) { - iotlb |=3D PHYS_SECTION_NOTDIRTY; - } } else { AddressSpaceDispatch *d; =20 @@ -2783,42 +2778,6 @@ void memory_notdirty_write_complete(NotDirtyInfo *nd= i) } } =20 -/* Called within RCU critical section. */ -static void notdirty_mem_write(void *opaque, hwaddr ram_addr, - uint64_t val, unsigned size) -{ - NotDirtyInfo ndi; - - memory_notdirty_write_prepare(&ndi, current_cpu, current_cpu->mem_io_v= addr, - ram_addr, size); - - stn_p(qemu_map_ram_ptr(NULL, ram_addr), size, val); - memory_notdirty_write_complete(&ndi); -} - -static bool notdirty_mem_accepts(void *opaque, hwaddr addr, - unsigned size, bool is_write, - MemTxAttrs attrs) -{ - return is_write; -} - -static const MemoryRegionOps notdirty_mem_ops =3D { - .write =3D notdirty_mem_write, - .valid.accepts =3D notdirty_mem_accepts, - .endianness =3D DEVICE_NATIVE_ENDIAN, - .valid =3D { - .min_access_size =3D 1, - .max_access_size =3D 8, - .unaligned =3D false, - }, - .impl =3D { - .min_access_size =3D 1, - .max_access_size =3D 8, - .unaligned =3D false, - }, -}; - /* Generate a debug exception if a watchpoint has been hit. */ void cpu_check_watchpoint(CPUState *cpu, vaddr addr, vaddr len, MemTxAttrs attrs, int flags, uintptr_t ra) @@ -3014,13 +2973,6 @@ static void io_mem_init(void) { memory_region_init_io(&io_mem_unassigned, NULL, &unassigned_mem_ops, N= ULL, NULL, UINT64_MAX); - - /* io_mem_notdirty calls tb_invalidate_phys_page_fast, - * which can be called without the iothread mutex. - */ - memory_region_init_io(&io_mem_notdirty, NULL, ¬dirty_mem_ops, NULL, - NULL, UINT64_MAX); - memory_region_clear_global_locking(&io_mem_notdirty); } =20 AddressSpaceDispatch *address_space_dispatch_new(FlatView *fv) @@ -3030,8 +2982,6 @@ AddressSpaceDispatch *address_space_dispatch_new(Flat= View *fv) =20 n =3D dummy_section(&d->map, fv, &io_mem_unassigned); assert(n =3D=3D PHYS_SECTION_UNASSIGNED); - n =3D dummy_section(&d->map, fv, &io_mem_notdirty); - assert(n =3D=3D PHYS_SECTION_NOTDIRTY); =20 d->phys_map =3D (PhysPageEntry) { .ptr =3D PHYS_MAP_NODE_NIL, .skip = =3D 1 }; =20 diff --git a/memory.c b/memory.c index 57c44c97db..a99b8c0767 100644 --- a/memory.c +++ b/memory.c @@ -434,10 +434,6 @@ static MemTxResult memory_region_read_accessor(Memory= Region *mr, tmp =3D mr->ops->read(mr->opaque, addr, size); if (mr->subpage) { trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, s= ize); - } else if (mr =3D=3D &io_mem_notdirty) { - /* Accesses to code which has previously been translated into a TB= show - * up in the MMIO path, as accesses to the io_mem_notdirty - * MemoryRegion. */ } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { hwaddr abs_addr =3D memory_region_to_absolute_addr(mr, addr); trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, s= ize); @@ -460,10 +456,6 @@ static MemTxResult memory_region_read_with_attrs_acces= sor(MemoryRegion *mr, r =3D mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs); if (mr->subpage) { trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, s= ize); - } else if (mr =3D=3D &io_mem_notdirty) { - /* Accesses to code which has previously been translated into a TB= show - * up in the MMIO path, as accesses to the io_mem_notdirty - * MemoryRegion. */ } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) { hwaddr abs_addr =3D memory_region_to_absolute_addr(mr, addr); trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, s= ize); @@ -484,10 +476,6 @@ static MemTxResult memory_region_write_accessor(Memory= Region *mr, =20 if (mr->subpage) { trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, = size); - } else if (mr =3D=3D &io_mem_notdirty) { - /* Accesses to code which has previously been translated into a TB= show - * up in the MMIO path, as accesses to the io_mem_notdirty - * MemoryRegion. */ } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { hwaddr abs_addr =3D memory_region_to_absolute_addr(mr, addr); trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, = size); @@ -508,10 +496,6 @@ static MemTxResult memory_region_write_with_attrs_acce= ssor(MemoryRegion *mr, =20 if (mr->subpage) { trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, = size); - } else if (mr =3D=3D &io_mem_notdirty) { - /* Accesses to code which has previously been translated into a TB= show - * up in the MMIO path, as accesses to the io_mem_notdirty - * MemoryRegion. */ } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) { hwaddr abs_addr =3D memory_region_to_absolute_addr(mr, addr); trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, = size); --=20 2.17.1