From nobody Wed May 8 22:58:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1569301430; cv=none; d=zoho.com; s=zohoarc; b=dP1QjSRSCnzjpskd2n55XcSrY3vBZLC4136JjDQTS+bHzj6Oea96dVJcESH4LFviWiNviZUazhkkPjxJd1ynn09ECmSY8SxhadojMcrg+kWO0b3k3xflzrrg6hS1tOaPwgphu6K+VpJ9y4b7htmQvhN6ABf6LBy6KlENP3littI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569301430; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=YhFYE9ri8/Khyy3gUWAL7y4z2XusRfj7govjBJxhmdI=; b=iw3B65YLHCh+spfCrH3u5oUxhtTJt00etQ+JlYQDxj5wkiCrX1aZSrD/E9c0k5BG7KshtlNrxy3YgO+0q3MrBwVXxMIqVMwHpgBAV7BKP6ZlbelfxuUs9kt+ukd8oSPMHPnGWFSMyyyvRxv2bOk40wg2pWhRPAUtCK570lEt4s4= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1569301429654930.0117728145268; Mon, 23 Sep 2019 22:03:49 -0700 (PDT) Received: from localhost ([::1]:40790 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCczG-0003OU-Hs for importer@patchew.org; Tue, 24 Sep 2019 01:03:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51584) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCcvl-0001GC-U7 for qemu-devel@nongnu.org; Tue, 24 Sep 2019 01:00:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iCcvk-0001vp-2R for qemu-devel@nongnu.org; Tue, 24 Sep 2019 01:00:05 -0400 Received: from ozlabs.org ([203.11.71.1]:34373) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iCcvi-0001rg-NY; Tue, 24 Sep 2019 01:00:04 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 46cps83p1vz9sPD; Tue, 24 Sep 2019 14:59:56 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1569301196; bh=CvwrAC3YNsifjass31Cq0ZCI6Lt+s97hXdSNPYk/dZc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=En3nNHVuYna+AcTJ0tsJ/brqNOxhIi8t6rQdLmbWPil1MudyZcsjdlK7Duo2miAqd CZSyWy74tS4B/Ch89FRXoQpN2+OR44bxclHGl49lZVslBP9njhRbSO1+ojsTQukTJq SAXImau6jSEcyiKbwT49OayQv2ijZkntfSBLFqMQ= From: David Gibson To: qemu-ppc@nongnu.org, clg@kaod.org Subject: [PATCH 1/4] xics: Eliminate 'reject', 'resend' and 'eoi' class hooks Date: Tue, 24 Sep 2019 14:59:49 +1000 Message-Id: <20190924045952.11412-2-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190924045952.11412-1-david@gibson.dropbear.id.au> References: <20190924045952.11412-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gkurz@kaod.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Currently ics_reject(), ics_resend() and ics_eoi() indirect through class methods. But there's only one implementation of each method, the one in TYPE_ICS_SIMPLE. TYPE_ICS_BASE has no implementation, but it's never instantiated, and has no other subtypes. So clean up by eliminating the method and just having ics_reject(), ics_resend() and ics_eoi() contain the logic directly. Signed-off-by: David Gibson Reviewed-by stands :) Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/trace-events | 4 ++-- hw/intc/xics.c | 54 +++++++++++-------------------------------- include/hw/ppc/xics.h | 4 ---- 3 files changed, 15 insertions(+), 47 deletions(-) diff --git a/hw/intc/trace-events b/hw/intc/trace-events index 719f46b516..fdc716c2cc 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -70,8 +70,8 @@ xics_ics_simple_set_irq_msi(int srcno, int nr) "set_irq_m= si: srcno %d [irq 0x%x] xics_masked_pending(void) "set_irq_msi: masked pending" xics_ics_simple_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq= 0x%x]" xics_ics_simple_write_xive(int nr, int srcno, int server, uint8_t priority= ) "ics_write_xive: irq 0x%x [src %d] server 0x%x prio 0x%x" -xics_ics_simple_reject(int nr, int srcno) "reject irq 0x%x [src %d]" -xics_ics_simple_eoi(int nr) "ics_eoi: irq 0x%x" +xics_ics_reject(int nr, int srcno) "reject irq 0x%x [src %d]" +xics_ics_eoi(int nr) "ics_eoi: irq 0x%x" =20 # s390_flic_kvm.c flic_create_device(int err) "flic: create device failed %d" diff --git a/hw/intc/xics.c b/hw/intc/xics.c index b2fca2975c..93139b0189 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -98,32 +98,8 @@ void ics_pic_print_info(ICSState *ics, Monitor *mon) #define XISR(icp) (((icp)->xirr) & XISR_MASK) #define CPPR(icp) (((icp)->xirr) >> 24) =20 -static void ics_reject(ICSState *ics, uint32_t nr) -{ - ICSStateClass *k =3D ICS_BASE_GET_CLASS(ics); - - if (k->reject) { - k->reject(ics, nr); - } -} - -void ics_resend(ICSState *ics) -{ - ICSStateClass *k =3D ICS_BASE_GET_CLASS(ics); - - if (k->resend) { - k->resend(ics); - } -} - -static void ics_eoi(ICSState *ics, int nr) -{ - ICSStateClass *k =3D ICS_BASE_GET_CLASS(ics); - - if (k->eoi) { - k->eoi(ics, nr); - } -} +static void ics_reject(ICSState *ics, uint32_t nr); +static void ics_eoi(ICSState *ics, uint32_t nr); =20 static void icp_check_ipi(ICPState *icp) { @@ -427,7 +403,7 @@ Object *icp_create(Object *cpu, const char *type, XICSF= abric *xi, Error **errp) /* * ICS: Source layer */ -static void ics_simple_resend_msi(ICSState *ics, int srcno) +static void ics_resend_msi(ICSState *ics, int srcno) { ICSIRQState *irq =3D ics->irqs + srcno; =20 @@ -440,7 +416,7 @@ static void ics_simple_resend_msi(ICSState *ics, int sr= cno) } } =20 -static void ics_simple_resend_lsi(ICSState *ics, int srcno) +static void ics_resend_lsi(ICSState *ics, int srcno) { ICSIRQState *irq =3D ics->irqs + srcno; =20 @@ -478,7 +454,7 @@ static void ics_simple_set_irq_lsi(ICSState *ics, int s= rcno, int val) } else { irq->status &=3D ~XICS_STATUS_ASSERTED; } - ics_simple_resend_lsi(ics, srcno); + ics_resend_lsi(ics, srcno); } =20 void ics_simple_set_irq(void *opaque, int srcno, int val) @@ -512,7 +488,7 @@ static void ics_simple_write_xive_msi(ICSState *ics, in= t srcno) =20 static void ics_simple_write_xive_lsi(ICSState *ics, int srcno) { - ics_simple_resend_lsi(ics, srcno); + ics_resend_lsi(ics, srcno); } =20 void ics_simple_write_xive(ICSState *ics, int srcno, int server, @@ -534,11 +510,11 @@ void ics_simple_write_xive(ICSState *ics, int srcno, = int server, } } =20 -static void ics_simple_reject(ICSState *ics, uint32_t nr) +static void ics_reject(ICSState *ics, uint32_t nr) { ICSIRQState *irq =3D ics->irqs + nr - ics->offset; =20 - trace_xics_ics_simple_reject(nr, nr - ics->offset); + trace_xics_ics_reject(nr, nr - ics->offset); if (irq->flags & XICS_FLAGS_IRQ_MSI) { irq->status |=3D XICS_STATUS_REJECTED; } else if (irq->flags & XICS_FLAGS_IRQ_LSI) { @@ -546,26 +522,26 @@ static void ics_simple_reject(ICSState *ics, uint32_t= nr) } } =20 -static void ics_simple_resend(ICSState *ics) +void ics_resend(ICSState *ics) { int i; =20 for (i =3D 0; i < ics->nr_irqs; i++) { /* FIXME: filter by server#? */ if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) { - ics_simple_resend_lsi(ics, i); + ics_resend_lsi(ics, i); } else { - ics_simple_resend_msi(ics, i); + ics_resend_msi(ics, i); } } } =20 -static void ics_simple_eoi(ICSState *ics, uint32_t nr) +static void ics_eoi(ICSState *ics, uint32_t nr) { int srcno =3D nr - ics->offset; ICSIRQState *irq =3D ics->irqs + srcno; =20 - trace_xics_ics_simple_eoi(nr); + trace_xics_ics_eoi(nr); =20 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_LSI) { irq->status &=3D ~XICS_STATUS_SENT; @@ -617,10 +593,6 @@ static void ics_simple_class_init(ObjectClass *klass, = void *data) &isc->parent_realize); device_class_set_parent_reset(dc, ics_simple_reset, &isc->parent_reset); - - isc->reject =3D ics_simple_reject; - isc->resend =3D ics_simple_resend; - isc->eoi =3D ics_simple_eoi; } =20 static const TypeInfo ics_simple_info =3D { diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 64a2c8862a..34d7985b7c 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -106,10 +106,6 @@ struct ICSStateClass { =20 DeviceRealize parent_realize; DeviceReset parent_reset; - - void (*reject)(ICSState *s, uint32_t irq); - void (*resend)(ICSState *s); - void (*eoi)(ICSState *s, uint32_t irq); }; =20 struct ICSState { --=20 2.21.0 From nobody Wed May 8 22:58:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1569301603; cv=none; d=zoho.com; s=zohoarc; b=HRfW3UWjmObP7J37R+b7LI4JsUlLT5gu2Ebq3ySkjXDZ5lzutvIhWf0xks/EATANARM3MZQJSoUFpgfu/Mte4UCtzLfkNYqQJKZKXFRemWH8hC45kFanDlzJBY5iTttxmyrlR0r3y4aA+HiXs3b0cR+chmp8tdgoKNtcLdT1b/I= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569301603; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=GsV6n+dGcWWlhxpYDWee8zHKACJGcEOJKMhrkyQlKNI=; b=Oho/Yo8BZn6IvXxiALK/6i4y4D1ijrApc2+rWy2/NmUWepeFNQpdTc8AiBVEO+gH8jSqv2t7nouLqQm4iLchAQG1abE2kC0aUaTj+cxGoKmYlMVEUJKTh33vdjSKuGexoar3fG4E/CSbUwna4HKMAZ3eAQCS/6tL+XYZZtL9tZU= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1569301603789582.3823308549361; Mon, 23 Sep 2019 22:06:43 -0700 (PDT) Received: from localhost ([::1]:40828 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCd2A-0006WC-Jw for importer@patchew.org; Tue, 24 Sep 2019 01:06:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51590) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCcvm-0001GE-8e for qemu-devel@nongnu.org; Tue, 24 Sep 2019 01:00:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iCcvk-0001wP-Et for qemu-devel@nongnu.org; Tue, 24 Sep 2019 01:00:06 -0400 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:54705 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iCcvj-0001rj-DV; Tue, 24 Sep 2019 01:00:04 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 46cps82hvMz9sDB; Tue, 24 Sep 2019 14:59:56 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1569301196; bh=NvzW3pnMMJChizCRdRFvUt5F8TLEmnoMIBQj4iEAKrA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O54prG5rBf/QhOYKtPtaBC8J/MnLepKXEPiKqb3iVA80pz9Wc694HfeTazRg3A6GP 6lHT6o3eiiGAx7Wxb0D2mDfFq8H9HtNH1FzzYntOYfkkteU+8ZUyrxUC15XcdD0f98 C4eh739OMtJRA+C2PUtJsgdI8V8IezhfcYvaDfnY= From: David Gibson To: qemu-ppc@nongnu.org, clg@kaod.org Subject: [PATCH 2/4] xics: Merge reset and realize hooks Date: Tue, 24 Sep 2019 14:59:50 +1000 Message-Id: <20190924045952.11412-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190924045952.11412-1-david@gibson.dropbear.id.au> References: <20190924045952.11412-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gkurz@kaod.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Currently TYPE_XICS_BASE and TYPE_XICS_SIMPLE have their own reset and realize methods, using the standard technique for having the subtype call the supertype's methods before doing its own thing. But TYPE_XICS_SIMPLE is the only subtype of TYPE_XICS_BASE ever instantiated, so there's no point having the split here. Merge them together into just ics_reset() and ics_realize() functions. Signed-off-by: David Gibson Reviewed-by stands :) Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/xics.c | 97 ++++++++++++++++--------------------------- include/hw/ppc/xics.h | 3 -- 2 files changed, 35 insertions(+), 65 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 93139b0189..db0e532bd9 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -548,68 +548,13 @@ static void ics_eoi(ICSState *ics, uint32_t nr) } } =20 -static void ics_simple_reset(DeviceState *dev) -{ - ICSStateClass *icsc =3D ICS_BASE_GET_CLASS(dev); - - icsc->parent_reset(dev); - - if (kvm_irqchip_in_kernel()) { - Error *local_err =3D NULL; - - ics_set_kvm_state(ICS_BASE(dev), &local_err); - if (local_err) { - error_report_err(local_err); - } - } -} - -static void ics_simple_reset_handler(void *dev) -{ - ics_simple_reset(dev); -} - -static void ics_simple_realize(DeviceState *dev, Error **errp) -{ - ICSState *ics =3D ICS_SIMPLE(dev); - ICSStateClass *icsc =3D ICS_BASE_GET_CLASS(ics); - Error *local_err =3D NULL; - - icsc->parent_realize(dev, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - - qemu_register_reset(ics_simple_reset_handler, ics); -} - -static void ics_simple_class_init(ObjectClass *klass, void *data) -{ - DeviceClass *dc =3D DEVICE_CLASS(klass); - ICSStateClass *isc =3D ICS_BASE_CLASS(klass); - - device_class_set_parent_realize(dc, ics_simple_realize, - &isc->parent_realize); - device_class_set_parent_reset(dc, ics_simple_reset, - &isc->parent_reset); -} - -static const TypeInfo ics_simple_info =3D { - .name =3D TYPE_ICS_SIMPLE, - .parent =3D TYPE_ICS_BASE, - .instance_size =3D sizeof(ICSState), - .class_init =3D ics_simple_class_init, - .class_size =3D sizeof(ICSStateClass), -}; - static void ics_reset_irq(ICSIRQState *irq) { irq->priority =3D 0xff; irq->saved_priority =3D 0xff; } =20 -static void ics_base_reset(DeviceState *dev) +static void ics_reset(DeviceState *dev) { ICSState *ics =3D ICS_BASE(dev); int i; @@ -625,17 +570,31 @@ static void ics_base_reset(DeviceState *dev) ics_reset_irq(ics->irqs + i); ics->irqs[i].flags =3D flags[i]; } + + if (kvm_irqchip_in_kernel()) { + Error *local_err =3D NULL; + + ics_set_kvm_state(ICS_BASE(dev), &local_err); + if (local_err) { + error_report_err(local_err); + } + } +} + +static void ics_reset_handler(void *dev) +{ + ics_reset(dev); } =20 -static void ics_base_realize(DeviceState *dev, Error **errp) +static void ics_realize(DeviceState *dev, Error **errp) { ICSState *ics =3D ICS_BASE(dev); + Error *local_err =3D NULL; Object *obj; - Error *err =3D NULL; =20 - obj =3D object_property_get_link(OBJECT(dev), ICS_PROP_XICS, &err); + obj =3D object_property_get_link(OBJECT(dev), ICS_PROP_XICS, &local_er= r); if (!obj) { - error_propagate_prepend(errp, err, + error_propagate_prepend(errp, local_err, "required link '" ICS_PROP_XICS "' not found: "); return; @@ -647,8 +606,22 @@ static void ics_base_realize(DeviceState *dev, Error *= *errp) return; } ics->irqs =3D g_malloc0(ics->nr_irqs * sizeof(ICSIRQState)); + + qemu_register_reset(ics_reset_handler, ics); +} + +static void ics_simple_class_init(ObjectClass *klass, void *data) +{ } =20 +static const TypeInfo ics_simple_info =3D { + .name =3D TYPE_ICS_SIMPLE, + .parent =3D TYPE_ICS_BASE, + .instance_size =3D sizeof(ICSState), + .class_init =3D ics_simple_class_init, + .class_size =3D sizeof(ICSStateClass), +}; + static void ics_base_instance_init(Object *obj) { ICSState *ics =3D ICS_BASE(obj); @@ -725,9 +698,9 @@ static void ics_base_class_init(ObjectClass *klass, voi= d *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 - dc->realize =3D ics_base_realize; + dc->realize =3D ics_realize; dc->props =3D ics_base_properties; - dc->reset =3D ics_base_reset; + dc->reset =3D ics_reset; dc->vmsd =3D &vmstate_ics_base; } =20 diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 34d7985b7c..0eb39c2561 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -103,9 +103,6 @@ struct PnvICPState { =20 struct ICSStateClass { DeviceClass parent_class; - - DeviceRealize parent_realize; - DeviceReset parent_reset; }; =20 struct ICSState { --=20 2.21.0 From nobody Wed May 8 22:58:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1569301431; cv=none; d=zoho.com; s=zohoarc; b=QJVI04RdCbs2dC1hxGLSEyAde2EU0/S2ONxDTqumSPBibWPgpWXVD1Y2IqR0fdJpB+wif2rUsimd9yltr4pW0EcoOHcP6b5nNtuKyNxATeq1+RQAWEGKGXE4T0HX3wWdGCWxGL7DdRDp3zzMyAzijqwxx/8hXnaVPpseTwssQMU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1569301431; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Tue, 24 Sep 2019 01:00:06 -0400 Received: from ozlabs.org ([203.11.71.1]:35417) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iCcvi-0001rd-Tc; Tue, 24 Sep 2019 01:00:04 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 46cps85RGfz9sPK; Tue, 24 Sep 2019 14:59:56 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1569301196; bh=jieX3bvlDk3Zuj1bT4ejJqbSYhuoB6uZKJfg3cchYts=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=USS9ronWFbPgbQ1pPgYYVlxyYfwkEoPaafNrbr0Qy8c18XkE//ic+k0btOsKSBNfL Fv0dfMu4YdJYhl5W4JtHwYDuPZwPbqQRcopVEB/MJN5RwVAfajvOoRhQStdTW3ZUNA Ynv0TURPGbzuMEtUl/7zLzdlQdDTg1Zzb9VQVX0w= From: David Gibson To: qemu-ppc@nongnu.org, clg@kaod.org Subject: [PATCH 3/4] xics: Rename misleading ics_simple_*() functions Date: Tue, 24 Sep 2019 14:59:51 +1000 Message-Id: <20190924045952.11412-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190924045952.11412-1-david@gibson.dropbear.id.au> References: <20190924045952.11412-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 203.11.71.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gkurz@kaod.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" There are a number of ics_simple_*() functions that aren't actually specific to TYPE_XICS_SIMPLE at all, and are equally valid on TYPE_XICS_BASE. Rename them to ics_*() accordingly. Signed-off-by: David Gibson Reviewed-by stands :) Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/trace-events | 6 +++--- hw/intc/xics.c | 29 ++++++++++++++--------------- hw/intc/xics_spapr.c | 12 ++++++------ hw/ppc/pnv_psi.c | 4 ++-- hw/ppc/spapr_irq.c | 2 +- include/hw/ppc/xics.h | 6 +++--- 6 files changed, 29 insertions(+), 30 deletions(-) diff --git a/hw/intc/trace-events b/hw/intc/trace-events index fdc716c2cc..527c3f76ca 100644 --- a/hw/intc/trace-events +++ b/hw/intc/trace-events @@ -66,10 +66,10 @@ xics_icp_accept(uint32_t old_xirr, uint32_t new_xirr) "= icp_accept: XIRR 0x%"PRIx xics_icp_eoi(int server, uint32_t xirr, uint32_t new_xirr) "icp_eoi: serve= r %d given XIRR 0x%"PRIx32" new XIRR 0x%"PRIx32 xics_icp_irq(int server, int nr, uint8_t priority) "cpu %d trying to deliv= er irq 0x%"PRIx32" priority 0x%x" xics_icp_raise(uint32_t xirr, uint8_t pending_priority) "raising IRQ new X= IRR=3D0x%x new pending priority=3D0x%x" -xics_ics_simple_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq= 0x%x]" +xics_ics_set_irq_msi(int srcno, int nr) "set_irq_msi: srcno %d [irq 0x%x]" xics_masked_pending(void) "set_irq_msi: masked pending" -xics_ics_simple_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq= 0x%x]" -xics_ics_simple_write_xive(int nr, int srcno, int server, uint8_t priority= ) "ics_write_xive: irq 0x%x [src %d] server 0x%x prio 0x%x" +xics_ics_set_irq_lsi(int srcno, int nr) "set_irq_lsi: srcno %d [irq 0x%x]" +xics_ics_write_xive(int nr, int srcno, int server, uint8_t priority) "ics_= write_xive: irq 0x%x [src %d] server 0x%x prio 0x%x" xics_ics_reject(int nr, int srcno) "reject irq 0x%x [src %d]" xics_ics_eoi(int nr) "ics_eoi: irq 0x%x" =20 diff --git a/hw/intc/xics.c b/hw/intc/xics.c index db0e532bd9..9ae51bbc76 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -428,11 +428,11 @@ static void ics_resend_lsi(ICSState *ics, int srcno) } } =20 -static void ics_simple_set_irq_msi(ICSState *ics, int srcno, int val) +static void ics_set_irq_msi(ICSState *ics, int srcno, int val) { ICSIRQState *irq =3D ics->irqs + srcno; =20 - trace_xics_ics_simple_set_irq_msi(srcno, srcno + ics->offset); + trace_xics_ics_set_irq_msi(srcno, srcno + ics->offset); =20 if (val) { if (irq->priority =3D=3D 0xff) { @@ -444,11 +444,11 @@ static void ics_simple_set_irq_msi(ICSState *ics, int= srcno, int val) } } =20 -static void ics_simple_set_irq_lsi(ICSState *ics, int srcno, int val) +static void ics_set_irq_lsi(ICSState *ics, int srcno, int val) { ICSIRQState *irq =3D ics->irqs + srcno; =20 - trace_xics_ics_simple_set_irq_lsi(srcno, srcno + ics->offset); + trace_xics_ics_set_irq_lsi(srcno, srcno + ics->offset); if (val) { irq->status |=3D XICS_STATUS_ASSERTED; } else { @@ -457,7 +457,7 @@ static void ics_simple_set_irq_lsi(ICSState *ics, int s= rcno, int val) ics_resend_lsi(ics, srcno); } =20 -void ics_simple_set_irq(void *opaque, int srcno, int val) +void ics_set_irq(void *opaque, int srcno, int val) { ICSState *ics =3D (ICSState *)opaque; =20 @@ -467,13 +467,13 @@ void ics_simple_set_irq(void *opaque, int srcno, int = val) } =20 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_LSI) { - ics_simple_set_irq_lsi(ics, srcno, val); + ics_set_irq_lsi(ics, srcno, val); } else { - ics_simple_set_irq_msi(ics, srcno, val); + ics_set_irq_msi(ics, srcno, val); } } =20 -static void ics_simple_write_xive_msi(ICSState *ics, int srcno) +static void ics_write_xive_msi(ICSState *ics, int srcno) { ICSIRQState *irq =3D ics->irqs + srcno; =20 @@ -486,13 +486,13 @@ static void ics_simple_write_xive_msi(ICSState *ics, = int srcno) icp_irq(ics, irq->server, srcno + ics->offset, irq->priority); } =20 -static void ics_simple_write_xive_lsi(ICSState *ics, int srcno) +static void ics_write_xive_lsi(ICSState *ics, int srcno) { ics_resend_lsi(ics, srcno); } =20 -void ics_simple_write_xive(ICSState *ics, int srcno, int server, - uint8_t priority, uint8_t saved_priority) +void ics_write_xive(ICSState *ics, int srcno, int server, + uint8_t priority, uint8_t saved_priority) { ICSIRQState *irq =3D ics->irqs + srcno; =20 @@ -500,13 +500,12 @@ void ics_simple_write_xive(ICSState *ics, int srcno, = int server, irq->priority =3D priority; irq->saved_priority =3D saved_priority; =20 - trace_xics_ics_simple_write_xive(ics->offset + srcno, srcno, server, - priority); + trace_xics_ics_write_xive(ics->offset + srcno, srcno, server, priority= ); =20 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_LSI) { - ics_simple_write_xive_lsi(ics, srcno); + ics_write_xive_lsi(ics, srcno); } else { - ics_simple_write_xive_msi(ics, srcno); + ics_write_xive_msi(ics, srcno); } } =20 diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 6577be0d92..3e9444813a 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -179,7 +179,7 @@ static void rtas_set_xive(PowerPCCPU *cpu, SpaprMachine= State *spapr, } =20 srcno =3D nr - ics->offset; - ics_simple_write_xive(ics, srcno, server, priority, priority); + ics_write_xive(ics, srcno, server, priority, priority); =20 rtas_st(rets, 0, RTAS_OUT_SUCCESS); } @@ -243,8 +243,8 @@ static void rtas_int_off(PowerPCCPU *cpu, SpaprMachineS= tate *spapr, } =20 srcno =3D nr - ics->offset; - ics_simple_write_xive(ics, srcno, ics->irqs[srcno].server, 0xff, - ics->irqs[srcno].priority); + ics_write_xive(ics, srcno, ics->irqs[srcno].server, 0xff, + ics->irqs[srcno].priority); =20 rtas_st(rets, 0, RTAS_OUT_SUCCESS); } @@ -276,9 +276,9 @@ static void rtas_int_on(PowerPCCPU *cpu, SpaprMachineSt= ate *spapr, } =20 srcno =3D nr - ics->offset; - ics_simple_write_xive(ics, srcno, ics->irqs[srcno].server, - ics->irqs[srcno].saved_priority, - ics->irqs[srcno].saved_priority); + ics_write_xive(ics, srcno, ics->irqs[srcno].server, + ics->irqs[srcno].saved_priority, + ics->irqs[srcno].saved_priority); =20 rtas_st(rets, 0, RTAS_OUT_SUCCESS); } diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 88ba8e7b9b..8ea81e9d8e 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -311,7 +311,7 @@ static void pnv_psi_set_xivr(PnvPsi *psi, uint32_t reg,= uint64_t val) * do for now but a more accurate implementation would instead * use a fixed server/prio and a remapper of the generated irq. */ - ics_simple_write_xive(ics, src, server, prio, prio); + ics_write_xive(ics, src, server, prio, prio); } =20 static uint64_t pnv_psi_reg_read(PnvPsi *psi, uint32_t offset, bool mmio) @@ -514,7 +514,7 @@ static void pnv_psi_power8_realize(DeviceState *dev, Er= ror **errp) ics_set_irq_type(ics, i, true); } =20 - psi->qirqs =3D qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irq= s); + psi->qirqs =3D qemu_allocate_irqs(ics_set_irq, ics, ics->nr_irqs); =20 /* XSCOM region for PSI registers */ pnv_xscom_region_init(&psi->xscom_regs, OBJECT(dev), &pnv_psi_xscom_op= s, diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index d8f46b6797..ac189c5796 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -210,7 +210,7 @@ static void spapr_irq_set_irq_xics(void *opaque, int sr= cno, int val) { SpaprMachineState *spapr =3D opaque; =20 - ics_simple_set_irq(spapr->ics, srcno, val); + ics_set_irq(spapr->ics, srcno, val); } =20 static void spapr_irq_reset_xics(SpaprMachineState *spapr, Error **errp) diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 0eb39c2561..92628e7cab 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -168,9 +168,9 @@ uint32_t icp_accept(ICPState *ss); uint32_t icp_ipoll(ICPState *ss, uint32_t *mfrr); void icp_eoi(ICPState *icp, uint32_t xirr); =20 -void ics_simple_write_xive(ICSState *ics, int nr, int server, - uint8_t priority, uint8_t saved_priority); -void ics_simple_set_irq(void *opaque, int srcno, int val); +void ics_write_xive(ICSState *ics, int nr, int server, + uint8_t priority, uint8_t saved_priority); +void ics_set_irq(void *opaque, int srcno, int val); =20 static inline bool ics_irq_free(ICSState *ics, uint32_t srcno) { --=20 2.21.0 From nobody Wed May 8 22:58:51 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; 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Mon, 23 Sep 2019 22:08:53 -0700 (PDT) Received: from localhost ([::1]:40848 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCd4B-0008Po-SN for importer@patchew.org; Tue, 24 Sep 2019 01:08:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51589) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iCcvm-0001GD-8C for qemu-devel@nongnu.org; Tue, 24 Sep 2019 01:00:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iCcvk-0001w2-8G for qemu-devel@nongnu.org; Tue, 24 Sep 2019 01:00:06 -0400 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:41027 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iCcvj-0001rh-21; Tue, 24 Sep 2019 01:00:04 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 46cps84lN4z9sP7; Tue, 24 Sep 2019 14:59:56 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1569301196; bh=v/bvaDusoHtbVksWbv6wuUI+7+7m/wPijmJz4VnYCZc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=P4ykigGqfYouPQOdvx7GGht/pBgm/2er/rLUTnRFXu69awdO+gHVObQu2sZQvWJvs WDHWAngYpeH7P7e8dYLxLVieMjEZtg2TtuVUJqZP8LHvMjNJ3JUM+Loy8JGjCf4JEX j3Qe61iwx/CSER1fkD6/HWMNC12cxkf3dMztOHeY= From: David Gibson To: qemu-ppc@nongnu.org, clg@kaod.org Subject: [PATCH 4/4] xics: Merge TYPE_ICS_BASE and TYPE_ICS_SIMPLE classes Date: Tue, 24 Sep 2019 14:59:52 +1000 Message-Id: <20190924045952.11412-5-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190924045952.11412-1-david@gibson.dropbear.id.au> References: <20190924045952.11412-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: gkurz@kaod.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" TYPE_ICS_SIMPLE is the only subtype of TYPE_ICS_BASE that's ever instantiated, and the only one we're ever likely to want. The existence of different classes is just a hang over from when we (misguidedly) had separate subtypes for the KVM and non-KVM version of the device. So, collapse the two classes together into just TYPE_ICS. Signed-off-by: David Gibson Reviewed-by stands :) Reviewed-by: C=C3=A9dric Le Goater Reviewed-by: Greg Kurz Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/xics.c | 57 ++++++++++++++++--------------------------- hw/ppc/pnv_psi.c | 2 +- hw/ppc/spapr_irq.c | 4 +-- include/hw/ppc/xics.h | 17 ++----------- 4 files changed, 26 insertions(+), 54 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 9ae51bbc76..388dbba870 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -555,7 +555,7 @@ static void ics_reset_irq(ICSIRQState *irq) =20 static void ics_reset(DeviceState *dev) { - ICSState *ics =3D ICS_BASE(dev); + ICSState *ics =3D ICS(dev); int i; uint8_t flags[ics->nr_irqs]; =20 @@ -573,7 +573,7 @@ static void ics_reset(DeviceState *dev) if (kvm_irqchip_in_kernel()) { Error *local_err =3D NULL; =20 - ics_set_kvm_state(ICS_BASE(dev), &local_err); + ics_set_kvm_state(ICS(dev), &local_err); if (local_err) { error_report_err(local_err); } @@ -587,7 +587,7 @@ static void ics_reset_handler(void *dev) =20 static void ics_realize(DeviceState *dev, Error **errp) { - ICSState *ics =3D ICS_BASE(dev); + ICSState *ics =3D ICS(dev); Error *local_err =3D NULL; Object *obj; =20 @@ -609,26 +609,14 @@ static void ics_realize(DeviceState *dev, Error **err= p) qemu_register_reset(ics_reset_handler, ics); } =20 -static void ics_simple_class_init(ObjectClass *klass, void *data) +static void ics_instance_init(Object *obj) { -} - -static const TypeInfo ics_simple_info =3D { - .name =3D TYPE_ICS_SIMPLE, - .parent =3D TYPE_ICS_BASE, - .instance_size =3D sizeof(ICSState), - .class_init =3D ics_simple_class_init, - .class_size =3D sizeof(ICSStateClass), -}; - -static void ics_base_instance_init(Object *obj) -{ - ICSState *ics =3D ICS_BASE(obj); + ICSState *ics =3D ICS(obj); =20 ics->offset =3D XICS_IRQ_BASE; } =20 -static int ics_base_pre_save(void *opaque) +static int ics_pre_save(void *opaque) { ICSState *ics =3D opaque; =20 @@ -639,7 +627,7 @@ static int ics_base_pre_save(void *opaque) return 0; } =20 -static int ics_base_post_load(void *opaque, int version_id) +static int ics_post_load(void *opaque, int version_id) { ICSState *ics =3D opaque; =20 @@ -657,7 +645,7 @@ static int ics_base_post_load(void *opaque, int version= _id) return 0; } =20 -static const VMStateDescription vmstate_ics_base_irq =3D { +static const VMStateDescription vmstate_ics_irq =3D { .name =3D "ics/irq", .version_id =3D 2, .minimum_version_id =3D 1, @@ -671,46 +659,44 @@ static const VMStateDescription vmstate_ics_base_irq = =3D { }, }; =20 -static const VMStateDescription vmstate_ics_base =3D { +static const VMStateDescription vmstate_ics =3D { .name =3D "ics", .version_id =3D 1, .minimum_version_id =3D 1, - .pre_save =3D ics_base_pre_save, - .post_load =3D ics_base_post_load, + .pre_save =3D ics_pre_save, + .post_load =3D ics_post_load, .fields =3D (VMStateField[]) { /* Sanity check */ VMSTATE_UINT32_EQUAL(nr_irqs, ICSState, NULL), =20 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(irqs, ICSState, nr_irqs, - vmstate_ics_base_irq, + vmstate_ics_irq, ICSIRQState), VMSTATE_END_OF_LIST() }, }; =20 -static Property ics_base_properties[] =3D { +static Property ics_properties[] =3D { DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0), DEFINE_PROP_END_OF_LIST(), }; =20 -static void ics_base_class_init(ObjectClass *klass, void *data) +static void ics_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->realize =3D ics_realize; - dc->props =3D ics_base_properties; + dc->props =3D ics_properties; dc->reset =3D ics_reset; - dc->vmsd =3D &vmstate_ics_base; + dc->vmsd =3D &vmstate_ics; } =20 -static const TypeInfo ics_base_info =3D { - .name =3D TYPE_ICS_BASE, +static const TypeInfo ics_info =3D { + .name =3D TYPE_ICS, .parent =3D TYPE_DEVICE, - .abstract =3D true, .instance_size =3D sizeof(ICSState), - .instance_init =3D ics_base_instance_init, - .class_init =3D ics_base_class_init, - .class_size =3D sizeof(ICSStateClass), + .instance_init =3D ics_instance_init, + .class_init =3D ics_class_init, }; =20 static const TypeInfo xics_fabric_info =3D { @@ -749,8 +735,7 @@ void ics_set_irq_type(ICSState *ics, int srcno, bool ls= i) =20 static void xics_register_types(void) { - type_register_static(&ics_simple_info); - type_register_static(&ics_base_info); + type_register_static(&ics_info); type_register_static(&icp_info); type_register_static(&xics_fabric_info); } diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c index 8ea81e9d8e..a997f16bb4 100644 --- a/hw/ppc/pnv_psi.c +++ b/hw/ppc/pnv_psi.c @@ -469,7 +469,7 @@ static void pnv_psi_power8_instance_init(Object *obj) Pnv8Psi *psi8 =3D PNV8_PSI(obj); =20 object_initialize_child(obj, "ics-psi", &psi8->ics, sizeof(psi8->ics), - TYPE_ICS_SIMPLE, &error_abort, NULL); + TYPE_ICS, &error_abort, NULL); } =20 static const uint8_t irq_to_xivr[] =3D { diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index ac189c5796..6c45d2a3c0 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -98,7 +98,7 @@ static void spapr_irq_init_xics(SpaprMachineState *spapr,= int nr_irqs, Object *obj; Error *local_err =3D NULL; =20 - obj =3D object_new(TYPE_ICS_SIMPLE); + obj =3D object_new(TYPE_ICS); object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort); object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr), &error_fatal); @@ -109,7 +109,7 @@ static void spapr_irq_init_xics(SpaprMachineState *spap= r, int nr_irqs, return; } =20 - spapr->ics =3D ICS_BASE(obj); + spapr->ics =3D ICS(obj); =20 xics_spapr_init(spapr); } diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 92628e7cab..d8cf206a69 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -89,21 +89,8 @@ struct PnvICPState { uint32_t links[3]; }; =20 -#define TYPE_ICS_BASE "ics-base" -#define ICS_BASE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_BASE) - -/* Retain ics for sPAPR for migration from existing sPAPR guests */ -#define TYPE_ICS_SIMPLE "ics" -#define ICS_SIMPLE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_SIMPLE) - -#define ICS_BASE_CLASS(klass) \ - OBJECT_CLASS_CHECK(ICSStateClass, (klass), TYPE_ICS_BASE) -#define ICS_BASE_GET_CLASS(obj) \ - OBJECT_GET_CLASS(ICSStateClass, (obj), TYPE_ICS_BASE) - -struct ICSStateClass { - DeviceClass parent_class; -}; +#define TYPE_ICS "ics" +#define ICS(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS) =20 struct ICSState { /*< private >*/ --=20 2.21.0