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[87.145.222.13]) by smtp.gmail.com with ESMTPSA id w4sm4763458wrv.66.2019.09.21.02.18.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 21 Sep 2019 02:18:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=YFkDlbtTLaDvMV/pREAHdafP45HpbWmWpHCAz24UooI=; b=UmPq6v1MlBWx/PBFaIdJQ8RBsSxWwp8WoUtxrXkcGD3uZx9tw2eJf/Ryn3s9fDzBqi CsrWE6CJds3f568zVAxSsYLs39gns4PxJh6UFOiLhi8p8HVTS7imsQemFFzgzgV1Psqh yDvLd9GhF/JCjWs8Sd+DyWAa+4k2fMiRxQuWBzjqh/qvy+L62UthUh4AoMehlW0cYmvK +d7NxP+i80xhGpFtVqp2i7rNbT9AqkhOHHCM4ffxurl6V6WgpzMopM3lf9OBOp2TBMjx Je5EcfE3mBYluMW60YZTXqKzIAPBjdrQ/I/IfO6lX5KPjcW+La8snFzlRux3wG9zoA2f TN0w== X-Gm-Message-State: APjAAAXooqgosoHVgs+X8JPIX112DlpYdyPT3TBwdAU9oHVLQ3cJX99z 7yoTQKH7Pozt06qE5QYMD14PJQAT X-Google-Smtp-Source: APXvYqwxrFAONqztqFFfEz5Y19NfGk4MzQbIHiIiLqGfnrmE2vYajpsBP6/GYje3thvgwp5X5KA9qA== X-Received: by 2002:a1c:4886:: with SMTP id v128mr6574227wma.176.1569057483747; Sat, 21 Sep 2019 02:18:03 -0700 (PDT) From: Thomas Huth To: qemu-devel@nongnu.org Subject: [PATCH] hw/m68k/next-cube: Avoid static RTC variables and introduce control register Date: Sat, 21 Sep 2019 11:17:38 +0200 Message-Id: <20190921091738.26953-1-huth@tuxfamily.org> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.128.67 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Laurent Vivier , peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Coverity currently complains that the "if (0x00 & (0x80 >> (phase - 8))" in next-cube.c can never be true. Right it is. The "0x00" is meant as value of the control register of the RTC, which is currently not implemented yet. Thus, let's add a register variable for this now. However, the RTC registers are currently defined as static variables in nextscr2_write(), which is quite ugly. Thus let's also move the RTC variables to the main machine state instead. In the long run, we should likely even refactor the whole RTC code into a separate device in a separate file, but that's something for calm winter nights later... as a first step, cleaning up the static variables and shutting up the warning from Coverity should be sufficient. Signed-off-by: Thomas Huth Reviewed-by: Richard Henderson --- hw/m68k/next-cube.c | 72 +++++++++++++++++++++++++-------------------- 1 file changed, 40 insertions(+), 32 deletions(-) diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c index 9a4a7328f9..2f305afa9f 100644 --- a/hw/m68k/next-cube.c +++ b/hw/m68k/next-cube.c @@ -60,6 +60,15 @@ typedef struct next_dma { uint32_t size; } next_dma; =20 +typedef struct NextRtc { + uint8_t ram[32]; + uint8_t command; + uint8_t value; + uint8_t status; + uint8_t control; + uint8_t retval; +} NextRtc; + typedef struct { MachineState parent; =20 @@ -77,7 +86,7 @@ typedef struct { uint32_t scr1; uint32_t scr2; =20 - uint8_t rtc_ram[32]; + NextRtc rtc; } NeXTState; =20 /* Thanks to NeXT forums for this */ @@ -105,11 +114,8 @@ static void nextscr2_write(NeXTState *s, uint32_t val,= int size) static int led; static int phase; static uint8_t old_scr2; - static uint8_t rtc_command; - static uint8_t rtc_value; - static uint8_t rtc_status =3D 0x90; - static uint8_t rtc_return; uint8_t scr2_2; + NextRtc *rtc =3D &s->rtc; =20 if (size =3D=3D 4) { scr2_2 =3D (val >> 8) & 0xFF; @@ -135,52 +141,53 @@ static void nextscr2_write(NeXTState *s, uint32_t val= , int size) if (((old_scr2 & SCR2_RTCLK) !=3D (scr2_2 & SCR2_RTCLK)) && ((scr2_2 & SCR2_RTCLK) =3D=3D 0)) { if (phase < 8) { - rtc_command =3D (rtc_command << 1) | - ((scr2_2 & SCR2_RTDATA) ? 1 : 0); + rtc->command =3D (rtc->command << 1) | + ((scr2_2 & SCR2_RTDATA) ? 1 : 0); } if (phase >=3D 8 && phase < 16) { - rtc_value =3D (rtc_value << 1) | ((scr2_2 & SCR2_RTDATA) ?= 1 : 0); + rtc->value =3D (rtc->value << 1) | + ((scr2_2 & SCR2_RTDATA) ? 1 : 0); =20 /* if we read RAM register, output RT_DATA bit */ - if (rtc_command <=3D 0x1F) { + if (rtc->command <=3D 0x1F) { scr2_2 =3D scr2_2 & (~SCR2_RTDATA); - if (s->rtc_ram[rtc_command] & (0x80 >> (phase - 8))) { + if (rtc->ram[rtc->command] & (0x80 >> (phase - 8))) { scr2_2 |=3D SCR2_RTDATA; } =20 - rtc_return =3D (rtc_return << 1) | - ((scr2_2 & SCR2_RTDATA) ? 1 : 0); + rtc->retval =3D (rtc->retval << 1) | + ((scr2_2 & SCR2_RTDATA) ? 1 : 0); } /* read the status 0x30 */ - if (rtc_command =3D=3D 0x30) { + if (rtc->command =3D=3D 0x30) { scr2_2 =3D scr2_2 & (~SCR2_RTDATA); /* for now status =3D 0x98 (new rtc + FTU) */ - if (rtc_status & (0x80 >> (phase - 8))) { + if (rtc->status & (0x80 >> (phase - 8))) { scr2_2 |=3D SCR2_RTDATA; } =20 - rtc_return =3D (rtc_return << 1) | - ((scr2_2 & SCR2_RTDATA) ? 1 : 0); + rtc->retval =3D (rtc->retval << 1) | + ((scr2_2 & SCR2_RTDATA) ? 1 : 0); } /* read the status 0x31 */ - if (rtc_command =3D=3D 0x31) { + if (rtc->command =3D=3D 0x31) { scr2_2 =3D scr2_2 & (~SCR2_RTDATA); /* for now 0x00 */ - if (0x00 & (0x80 >> (phase - 8))) { + if (rtc->control & (0x80 >> (phase - 8))) { scr2_2 |=3D SCR2_RTDATA; } - rtc_return =3D (rtc_return << 1) | - ((scr2_2 & SCR2_RTDATA) ? 1 : 0); + rtc->retval =3D (rtc->retval << 1) | + ((scr2_2 & SCR2_RTDATA) ? 1 : 0); } =20 - if ((rtc_command >=3D 0x20) && (rtc_command <=3D 0x2F)) { + if ((rtc->command >=3D 0x20) && (rtc->command <=3D 0x2F)) { scr2_2 =3D scr2_2 & (~SCR2_RTDATA); /* for now 0x00 */ time_t time_h =3D time(NULL); struct tm *info =3D localtime(&time_h); int ret =3D 0; =20 - switch (rtc_command) { + switch (rtc->command) { case 0x20: ret =3D SCR2_TOBCD(info->tm_sec); break; @@ -205,22 +212,22 @@ static void nextscr2_write(NeXTState *s, uint32_t val= , int size) if (ret & (0x80 >> (phase - 8))) { scr2_2 |=3D SCR2_RTDATA; } - rtc_return =3D (rtc_return << 1) | - ((scr2_2 & SCR2_RTDATA) ? 1 : 0); + rtc->retval =3D (rtc->retval << 1) | + ((scr2_2 & SCR2_RTDATA) ? 1 : 0); } =20 } =20 phase++; if (phase =3D=3D 16) { - if (rtc_command >=3D 0x80 && rtc_command <=3D 0x9F) { - s->rtc_ram[rtc_command - 0x80] =3D rtc_value; + if (rtc->command >=3D 0x80 && rtc->command <=3D 0x9F) { + rtc->ram[rtc->command - 0x80] =3D rtc->value; } /* write to x30 register */ - if (rtc_command =3D=3D 0xB1) { + if (rtc->command =3D=3D 0xB1) { /* clear FTU */ - if (rtc_value & 0x04) { - rtc_status =3D rtc_status & (~0x18); + if (rtc->value & 0x04) { + rtc->status =3D rtc->status & (~0x18); s->int_status =3D s->int_status & (~0x04); } } @@ -229,8 +236,8 @@ static void nextscr2_write(NeXTState *s, uint32_t val, = int size) } else { /* else end or abort */ phase =3D -1; - rtc_command =3D 0; - rtc_value =3D 0; + rtc->command =3D 0; + rtc->value =3D 0; } s->scr2 =3D val & 0xFFFF00FF; s->scr2 |=3D scr2_2 << 8; @@ -881,9 +888,10 @@ static void next_cube_init(MachineState *machine) /* 0x0000XX00 << vital bits */ ns->scr1 =3D 0x00011102; ns->scr2 =3D 0x00ff0c80; + ns->rtc.status =3D 0x90; =20 /* Load RTC RAM - TODO: provide possibility to load contents from file= */ - memcpy(ns->rtc_ram, rtc_ram2, 32); + memcpy(ns->rtc.ram, rtc_ram2, 32); =20 /* 64MB RAM starting at 0x04000000 */ memory_region_allocate_system_memory(ram, NULL, "next.ram", ram_size); --=20 2.21.0