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X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PULL 02/12] aspeed: add a GPIO controller to the SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Rashmica Gupta Signed-off-by: Rashmica Gupta Reviewed-by: C=C3=A9dric Le Goater Signed-off-by: C=C3=A9dric Le Goater Message-id: 20190904070506.1052-3-clg@kaod.org Signed-off-by: Peter Maydell --- include/hw/arm/aspeed_soc.h | 3 +++ hw/arm/aspeed_soc.c | 17 +++++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 976fd6be93f..a56effebc16 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -23,6 +23,7 @@ #include "hw/watchdog/wdt_aspeed.h" #include "hw/net/ftgmac100.h" #include "target/arm/cpu.h" +#include "hw/gpio/aspeed_gpio.h" =20 #define ASPEED_SPIS_NUM 2 #define ASPEED_WDTS_NUM 3 @@ -48,6 +49,7 @@ typedef struct AspeedSoCState { AspeedSDMCState sdmc; AspeedWDTState wdt[ASPEED_WDTS_NUM]; FTGMAC100State ftgmac100[ASPEED_MACS_NUM]; + AspeedGPIOState gpio; } AspeedSoCState; =20 #define TYPE_ASPEED_SOC "aspeed-soc" @@ -61,6 +63,7 @@ typedef struct AspeedSoCInfo { int spis_num; const char *fmc_typename; const char **spi_typename; + const char *gpio_typename; int wdts_num; const int *irqmap; const hwaddr *memmap; diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 9ee81048326..04480875d0d 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -125,6 +125,7 @@ static const AspeedSoCInfo aspeed_socs[] =3D { .spis_num =3D 1, .fmc_typename =3D "aspeed.smc.fmc", .spi_typename =3D aspeed_soc_ast2400_typenames, + .gpio_typename =3D "aspeed.gpio-ast2400", .wdts_num =3D 2, .irqmap =3D aspeed_soc_ast2400_irqmap, .memmap =3D aspeed_soc_ast2400_memmap, @@ -137,6 +138,7 @@ static const AspeedSoCInfo aspeed_socs[] =3D { .spis_num =3D 1, .fmc_typename =3D "aspeed.smc.fmc", .spi_typename =3D aspeed_soc_ast2400_typenames, + .gpio_typename =3D "aspeed.gpio-ast2400", .wdts_num =3D 2, .irqmap =3D aspeed_soc_ast2400_irqmap, .memmap =3D aspeed_soc_ast2400_memmap, @@ -149,6 +151,7 @@ static const AspeedSoCInfo aspeed_socs[] =3D { .spis_num =3D 1, .fmc_typename =3D "aspeed.smc.fmc", .spi_typename =3D aspeed_soc_ast2400_typenames, + .gpio_typename =3D "aspeed.gpio-ast2400", .wdts_num =3D 2, .irqmap =3D aspeed_soc_ast2400_irqmap, .memmap =3D aspeed_soc_ast2400_memmap, @@ -161,6 +164,7 @@ static const AspeedSoCInfo aspeed_socs[] =3D { .spis_num =3D 2, .fmc_typename =3D "aspeed.smc.ast2500-fmc", .spi_typename =3D aspeed_soc_ast2500_typenames, + .gpio_typename =3D "aspeed.gpio-ast2500", .wdts_num =3D 3, .irqmap =3D aspeed_soc_ast2500_irqmap, .memmap =3D aspeed_soc_ast2500_memmap, @@ -247,6 +251,9 @@ static void aspeed_soc_init(Object *obj) =20 sysbus_init_child_obj(obj, "xdma", OBJECT(&s->xdma), sizeof(s->xdma), TYPE_ASPEED_XDMA); + + sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio), + sc->info->gpio_typename); } =20 static void aspeed_soc_realize(DeviceState *dev, Error **errp) @@ -426,6 +433,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error= **errp) sc->info->memmap[ASPEED_XDMA]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->xdma), 0, aspeed_soc_get_irq(s, ASPEED_XDMA)); + + /* GPIO */ + object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, sc->info->memmap[ASPEED_G= PIO]); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, + aspeed_soc_get_irq(s, ASPEED_GPIO)); } static Property aspeed_soc_properties[] =3D { DEFINE_PROP_UINT32("num-cpus", AspeedSoCState, num_cpus, 0), --=20 2.20.1