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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Date: Tue, 3 Sep 2019 09:08:49 -0700
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Subject: [Qemu-devel] [PATCH 27/36] tcg: Check for watchpoints in
probe_write()
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Cc: peter.maydell@linaro.org, David Hildenbrand <david@redhat.com>
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From: David Hildenbrand <david@redhat.com>
Let size > 0 indicate a promise to write to those bytes.
Check for write watchpoints in the probed range.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190823100741.9621-10-david@redhat.com>
[rth: Recompute index after tlb_fill; check TLB_WATCHPOINT.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
accel/tcg/cputlb.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 9a9a626938..010c4c6e3c 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1086,13 +1086,24 @@ void probe_write(CPUArchState *env, target_ulong ad=
dr, int size, int mmu_idx,
{
uintptr_t index =3D tlb_index(env, mmu_idx, addr);
CPUTLBEntry *entry =3D tlb_entry(env, mmu_idx, addr);
+ target_ulong tlb_addr =3D tlb_addr_write(entry);
=20
- if (!tlb_hit(tlb_addr_write(entry), addr)) {
- /* TLB entry is for a different page */
+ if (unlikely(!tlb_hit(tlb_addr, addr))) {
if (!VICTIM_TLB_HIT(addr_write, addr)) {
tlb_fill(env_cpu(env), addr, size, MMU_DATA_STORE,
mmu_idx, retaddr);
+ /* TLB resize via tlb_fill may have moved the entry. */
+ index =3D tlb_index(env, mmu_idx, addr);
+ entry =3D tlb_entry(env, mmu_idx, addr);
}
+ tlb_addr =3D tlb_addr_write(entry);
+ }
+
+ /* Handle watchpoints. */
+ if ((tlb_addr & TLB_WATCHPOINT) && size > 0) {
+ cpu_check_watchpoint(env_cpu(env), addr, size,
+ env_tlb(env)->d[mmu_idx].iotlb[index].attrs,
+ BP_MEM_WRITE, retaddr);
}
}
=20
--=20
2.17.1