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[97.113.7.119]) by smtp.gmail.com with ESMTPSA id 127sm28089711pfy.56.2019.09.03.09.09.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2019 09:09:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bqopH4IHC6JwFjvyUE21txeIhpfHSXwxJEKmWcLZGEA=; b=hCG4En9/lls3POlFLDUIBv+WFRva2oYKDZUEkbP38DxL3jMVR270pJ8bERazBDsF8o ylzOvrw2Ixl3Pv3ZpZ1oURxynJR6Cu6Ge7d2tzTWeSoPYyDwbPurXWySG1G4y6AeoXbO hL6PpiWLpbyCPDpIhxfIIjIbDo7ljv6hS2GgkQ8s30VKC/Ww3ZYmANjKhhu4HLxAtUvX NBtjmpID1wTFA4E9SKQjWcBvKBLe8kgHW/V9gebkcff82wVX6wDw3hKJOLz2oH2TUTh6 hsQLKYvEJJxpurZQIhltFh7Zcn/1ODYLfHJCwmltvixGXwOh/ZZ0TujqM8nC6fXtDP2f MnTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bqopH4IHC6JwFjvyUE21txeIhpfHSXwxJEKmWcLZGEA=; b=P3ulD6FhDkdCBKvrdqI1XyJF9+V3bAn3Pm49TExChpOAaFQXj4sm8IPIAgR1IrIZUb 0Y9OwKMr03nHOP2lKamYP188CARIKH5x+Pmc1WUhx6IIZOyTuhsszYVQshZq60aLH9QP YAn/aJ0+E5tN4u5ebmuEE6+arIAcK+YNxu+WydxjgwY/CX7oI5WPjy6awhs3klZQWOzQ tHKIWkW8zNRdgagXh3Tq4L/waEjjZDsO4KG5FqBWIh2V7teBOPcyRWqpmRqTRerwaK3p BgTTMaL2vsmiaYJ1eEqSpeETHPtaPGlsYXrQOxnvJxWTmjw/Gfqy0p2yLZo3fUTJD4qI XdBg== X-Gm-Message-State: APjAAAUMS3idBYIQ+XDpN+vtOwPNpGWO8wfZk9Syof+iyipI9JxF+xeg efB1lS0UQC52i+n+gvL18B193piLe0E= X-Google-Smtp-Source: APXvYqznJY27MalcuN8Xh8BrzUL6r3gpRVCBmoU/6JpYmUW1XgZNui/frUOd2gb/BjAcUWTTCuHDvQ== X-Received: by 2002:a63:e20a:: with SMTP id q10mr30395763pgh.24.1567526970256; Tue, 03 Sep 2019 09:09:30 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 3 Sep 2019 09:08:46 -0700 Message-Id: <20190903160858.5296-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190903160858.5296-1-richard.henderson@linaro.org> References: <20190903160858.5296-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::543 Subject: [Qemu-devel] [PATCH 24/36] cputlb: Fix size operand for tlb_fill on unaligned store X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We are currently passing the size of the full write to the tlb_fill for the second page. Instead pass the real size of the write to that page. This argument is unused within all tlb_fill, except to be logged via tracing, so in practice this makes no difference. But in a moment we'll need the value of size2 for watchpoints, and if we've computed the value we might as well use it. Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index c9576bebcf..7fb67d2f05 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1504,6 +1504,8 @@ store_helper(CPUArchState *env, target_ulong addr, ui= nt64_t val, uintptr_t index2; CPUTLBEntry *entry2; target_ulong page2, tlb_addr2; + size_t size2; + do_unaligned_access: /* * Ensure the second page is in the TLB. Note that the first page @@ -1511,13 +1513,14 @@ store_helper(CPUArchState *env, target_ulong addr, = uint64_t val, * cannot evict the first. */ page2 =3D (addr + size) & TARGET_PAGE_MASK; + size2 =3D (addr + size) & ~TARGET_PAGE_MASK; index2 =3D tlb_index(env, mmu_idx, page2); entry2 =3D tlb_entry(env, mmu_idx, page2); tlb_addr2 =3D tlb_addr_write(entry2); if (!tlb_hit_page(tlb_addr2, page2) && !victim_tlb_hit(env, mmu_idx, index2, tlb_off, page2 & TARGET_PAGE_MASK)) { - tlb_fill(env_cpu(env), page2, size, MMU_DATA_STORE, + tlb_fill(env_cpu(env), page2, size2, MMU_DATA_STORE, mmu_idx, retaddr); } =20 --=20 2.17.1