From nobody Mon May 6 00:59:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1566482483; cv=none; d=zoho.com; s=zohoarc; b=mi6GA2tf0iO8F0aCRlbTHRxVIEfEyJogjru+Der+t5GL/18TCl1Q0hk4lvknCFJXFNSfwKXQVeFMbNoQ9az6dP6LuvXY4d5MSQJKfh+gcP0tIQfK/sgwR53X2dS2VfCigVjSuY2RMfXiW/nFfkcPBUQz4NgVOXWsPDeA56V05+g= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566482483; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=C0TZ2fV4aD+Ge0u7IsEKiEkybRdvvxYoodzLgg2uCxY=; b=eA/Kccer5R2hKnjUVJTZO7cx64ulV9Snm/r5llA+2BmqP7XPKlm1rBts0M+pem1YvINAvocZ8J/bCP7EWkEumjnglomUFvh4o5P25Niq9wgRVeyD+GW3P24EqOfZ/o5fg0yWg6oL3DC3eXHxYsECw1bg4x3PkCHLmn5wgQIEBUQ= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 156648248362689.22264911388015; Thu, 22 Aug 2019 07:01:23 -0700 (PDT) Received: from localhost ([::1]:43512 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0neP-0001m8-JR for importer@patchew.org; Thu, 22 Aug 2019 10:01:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48304) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0nc4-0008QB-F0 for qemu-devel@nongnu.org; Thu, 22 Aug 2019 09:58:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0nc3-0004CK-8T for qemu-devel@nongnu.org; Thu, 22 Aug 2019 09:58:52 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49280) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i0nc3-0004A5-1G; Thu, 22 Aug 2019 09:58:51 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4D0AC10F23E0; Thu, 22 Aug 2019 13:58:49 +0000 (UTC) Received: from localhost (dhcp-192-222.str.redhat.com [10.33.192.222]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 6FFF05D6A7; Thu, 22 Aug 2019 13:58:46 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Thu, 22 Aug 2019 15:58:33 +0200 Message-Id: <20190822135839.32340-3-cohuck@redhat.com> In-Reply-To: <20190822135839.32340-1-cohuck@redhat.com> References: <20190822135839.32340-1-cohuck@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.66]); Thu, 22 Aug 2019 13:58:49 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 1/7] s390x/tcg: Fix VERIM with 32/64 bit elements X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Hildenbrand , Cornelia Huck , qemu-devel@nongnu.org, qemu-stable@nongnu.org, Stefano Brivio , qemu-s390x@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: David Hildenbrand Wrong order of operands. The constant always comes last. Makes QEMU crash reliably on specific git fetch invocations. Reported-by: Stefano Brivio Signed-off-by: David Hildenbrand Message-Id: <20190814151242.27199-1-david@redhat.com> Reviewed-by: Cornelia Huck Fixes: 5c4b0ab460ef ("s390x/tcg: Implement VECTOR ELEMENT ROTATE AND INSERT= UNDER MASK") Cc: qemu-stable@nongnu.org Signed-off-by: Cornelia Huck --- target/s390x/translate_vx.inc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.in= c.c index 41d5cf869f94..0caddb3958cd 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -213,7 +213,7 @@ static void get_vec_element_ptr_i64(TCGv_ptr ptr, uint8= _t reg, TCGv_i64 enr, vec_full_reg_offset(v3), ptr, 16, 16, data, fn) #define gen_gvec_3i(v1, v2, v3, c, gen) \ tcg_gen_gvec_3i(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ - vec_full_reg_offset(v3), c, 16, 16, gen) + vec_full_reg_offset(v3), 16, 16, c, gen) #define gen_gvec_4(v1, v2, v3, v4, gen) \ tcg_gen_gvec_4(vec_full_reg_offset(v1), vec_full_reg_offset(v2), \ vec_full_reg_offset(v3), vec_full_reg_offset(v4), \ --=20 2.20.1 From nobody Mon May 6 00:59:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Thu, 22 Aug 2019 09:58:54 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 755F62BFDC; Thu, 22 Aug 2019 13:58:53 +0000 (UTC) Received: from localhost (dhcp-192-222.str.redhat.com [10.33.192.222]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C30135D9E5; Thu, 22 Aug 2019 13:58:50 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Thu, 22 Aug 2019 15:58:34 +0200 Message-Id: <20190822135839.32340-4-cohuck@redhat.com> In-Reply-To: <20190822135839.32340-1-cohuck@redhat.com> References: <20190822135839.32340-1-cohuck@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Thu, 22 Aug 2019 13:58:53 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 2/7] s390x/mmu: Trace the right value if setting/getting the storage key fails X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , qemu-s390x@nongnu.org, Cornelia Huck , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: David Hildenbrand We want to trace the actual return value, not "0". Fixes: 0f5f669147b5 ("s390x: Enable new s390-storage-keys device") Reviewed-by: Cornelia Huck Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand Message-Id: <20190816084708.602-2-david@redhat.com> Signed-off-by: Cornelia Huck --- target/s390x/mmu_helper.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 7a563110f016..6cf74502ef1e 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -423,7 +423,8 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, *raddr =3D mmu_real2abs(env, *raddr); =20 if (r =3D=3D 0 && *raddr < ram_size) { - if (skeyclass->get_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key)) { + r =3D skeyclass->get_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); + if (r) { trace_get_skeys_nonzero(r); return 0; } @@ -436,7 +437,8 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, key |=3D SK_C; } =20 - if (skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key)) { + r =3D skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); + if (r) { trace_set_skeys_nonzero(r); return 0; } --=20 2.20.1 From nobody Mon May 6 00:59:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1566482951; cv=none; d=zoho.com; s=zohoarc; b=nWZsSFe89ufd9vYCr3RcbdqbmqhiXZSF7qwEOgExBwYks5vpErvMCGLN8w4aWfvfGsY205cipyQeAUp3cRs6rhLfq9UXtXlJShVoeweEKT17IJYGhQganwN9gfRlF9fskzMxx34W5mwibYnMk7ED6rct4jz3c8KfUkDYphHklKI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566482951; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Thu, 22 Aug 2019 13:58:56 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 3/7] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , qemu-s390x@nongnu.org, Cornelia Huck , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: David Hildenbrand Let's select the ASC before calling the function. This is a prepararion to remove the ASC magic depending on the access mode from mmu_translate. There is currently no way to distinguish if we have code or data access. For now, we were using code access, because especially when debugging with the gdbstub, we want to read and disassemble what we single-step. Note: KVM guest can now no longer be crashed using qmp/hmp/gdbstub if they happen to be in AR mode. Reviewed-by: Thomas Huth Reviewed-by: Cornelia Huck Signed-off-by: David Hildenbrand Message-Id: <20190816084708.602-3-david@redhat.com> Signed-off-by: Cornelia Huck --- target/s390x/helper.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 1350ad319aba..948c0398d461 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -58,6 +58,11 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr = vaddr) vaddr &=3D 0x7fffffff; } =20 + /* We want to read the code (e.g., see what we are single-stepping).*/ + if (asc !=3D PSW_ASC_HOME) { + asc =3D PSW_ASC_PRIMARY; + } + if (mmu_translate(env, vaddr, MMU_INST_FETCH, asc, &raddr, &prot, fals= e)) { return -1; } --=20 2.20.1 From nobody Mon May 6 00:59:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1566483057; cv=none; d=zoho.com; s=zohoarc; b=l9DdHRqpmbG41U4VCasOKwZ/hCbRN84FznZ1YYGrZSy75NYrBJdmnxlD8JAxVV2EttB4QExWvjzI1NG4BeG+XniMgnfnpTeR6hIFhcG2/NwTQBpNnOnMhI01thJverdSo7x/U0TzBNeQJyApBm8lbQl5RBJ86mwjoCfK3BL4L6o= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566483057; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=o/CWLdZNzcw/Wmcdx3hlCnU9GtAFJBkblk+Jar8eUSI=; b=H5dYF/J7o/ykgaeZHmIAj7+S7YOm3i/URJTTpV7Er2F/EwzFm/OS2WVn/qtRgDDXziwvjuQA/21uWU/CU0dAzj+gGjV36BzWIakSAjJFX5Wxzl+LtIrffpfDcsqeY+0n/UKerTeJq3O7nWYj+cazJVpshnMDUQ/+bJ80XC9Y538= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1566483057017505.40639818360455; Thu, 22 Aug 2019 07:10:57 -0700 (PDT) Received: from localhost ([::1]:43630 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0nnj-0004mI-Ph for importer@patchew.org; Thu, 22 Aug 2019 10:10:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48433) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0ncE-0000CN-Ji for qemu-devel@nongnu.org; Thu, 22 Aug 2019 09:59:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0ncD-0004J0-AI for qemu-devel@nongnu.org; Thu, 22 Aug 2019 09:59:02 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51350) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i0ncD-0004IE-3D; Thu, 22 Aug 2019 09:59:01 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 650B48D6CC6; Thu, 22 Aug 2019 13:59:00 +0000 (UTC) Received: from localhost (dhcp-192-222.str.redhat.com [10.33.192.222]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BB4E160606; Thu, 22 Aug 2019 13:58:57 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Thu, 22 Aug 2019 15:58:36 +0200 Message-Id: <20190822135839.32340-6-cohuck@redhat.com> In-Reply-To: <20190822135839.32340-1-cohuck@redhat.com> References: <20190822135839.32340-1-cohuck@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.69]); Thu, 22 Aug 2019 13:59:00 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 4/7] s390x/tcg: Rework MMU selection for instruction fetches X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , qemu-s390x@nongnu.org, Cornelia Huck , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: David Hildenbrand Instructions are always fetched from primary address space, except when in home address mode. Perform the selection directly in cpu_mmu_index(). get_mem_index() is only used to perform data access, instructions are fetched via cpu_lduw_code(), which translates to cpu_mmu_index(env, true). We don't care about restricting the access permissions of the TLB entries anymore, as we no longer enter PRIMARY entries into the SECONDARY MMU. Cleanup related code a bit. Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand Reviewed-by: Cornelia Huck Message-Id: <20190816084708.602-4-david@redhat.com> Signed-off-by: Cornelia Huck --- target/s390x/cpu.h | 7 +++++++ target/s390x/mmu_helper.c | 38 +++++++++++++++----------------------- 2 files changed, 22 insertions(+), 23 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 3d9de25f7ce3..79202c098096 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -332,6 +332,13 @@ static inline int cpu_mmu_index(CPUS390XState *env, bo= ol ifetch) return MMU_REAL_IDX; } =20 + if (ifetch) { + if ((env->psw.mask & PSW_MASK_ASC) =3D=3D PSW_ASC_HOME) { + return MMU_HOME_IDX; + } + return MMU_PRIMARY_IDX; + } + switch (env->psw.mask & PSW_MASK_ASC) { case PSW_ASC_PRIMARY: return MMU_PRIMARY_IDX; diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 6cf74502ef1e..40b6c1fc36a9 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -350,8 +350,9 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, { static S390SKeysState *ss; static S390SKeysClass *skeyclass; - int r =3D -1; + uint64_t asce; uint8_t key; + int r; =20 if (unlikely(!ss)) { ss =3D s390_get_skeys_device(); @@ -381,36 +382,21 @@ int mmu_translate(CPUS390XState *env, target_ulong va= ddr, int rw, uint64_t asc, =20 if (!(env->psw.mask & PSW_MASK_DAT)) { *raddr =3D vaddr; - r =3D 0; - goto out; + goto nodat; } =20 switch (asc) { case PSW_ASC_PRIMARY: PTE_DPRINTF("%s: asc=3Dprimary\n", __func__); - r =3D mmu_translate_asce(env, vaddr, asc, env->cregs[1], raddr, fl= ags, - rw, exc); + asce =3D env->cregs[1]; break; case PSW_ASC_HOME: PTE_DPRINTF("%s: asc=3Dhome\n", __func__); - r =3D mmu_translate_asce(env, vaddr, asc, env->cregs[13], raddr, f= lags, - rw, exc); + asce =3D env->cregs[13]; break; case PSW_ASC_SECONDARY: PTE_DPRINTF("%s: asc=3Dsecondary\n", __func__); - /* - * Instruction: Primary - * Data: Secondary - */ - if (rw =3D=3D MMU_INST_FETCH) { - r =3D mmu_translate_asce(env, vaddr, PSW_ASC_PRIMARY, env->cre= gs[1], - raddr, flags, rw, exc); - *flags &=3D ~(PAGE_READ | PAGE_WRITE); - } else { - r =3D mmu_translate_asce(env, vaddr, PSW_ASC_SECONDARY, env->c= regs[7], - raddr, flags, rw, exc); - *flags &=3D ~(PAGE_EXEC); - } + asce =3D env->cregs[7]; break; case PSW_ASC_ACCREG: default: @@ -418,11 +404,17 @@ int mmu_translate(CPUS390XState *env, target_ulong va= ddr, int rw, uint64_t asc, break; } =20 - out: + /* perform the DAT translation */ + r =3D mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw, exc); + if (r) { + return r; + } + +nodat: /* Convert real address -> absolute address */ *raddr =3D mmu_real2abs(env, *raddr); =20 - if (r =3D=3D 0 && *raddr < ram_size) { + if (*raddr < ram_size) { r =3D skeyclass->get_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); if (r) { trace_get_skeys_nonzero(r); @@ -444,7 +436,7 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, } } =20 - return r; + return 0; } =20 /** --=20 2.20.1 From nobody Mon May 6 00:59:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Thu, 22 Aug 2019 09:59:08 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5726A4E924; Thu, 22 Aug 2019 13:59:07 +0000 (UTC) Received: from localhost (dhcp-192-222.str.redhat.com [10.33.192.222]) by smtp.corp.redhat.com (Postfix) with ESMTPS id DD0735C21A; Thu, 22 Aug 2019 13:59:01 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Thu, 22 Aug 2019 15:58:37 +0200 Message-Id: <20190822135839.32340-7-cohuck@redhat.com> In-Reply-To: <20190822135839.32340-1-cohuck@redhat.com> References: <20190822135839.32340-1-cohuck@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Thu, 22 Aug 2019 13:59:07 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 5/7] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: David Hildenbrand Whenever we modify a storage key, we should flush the TLBs of all CPUs, so the MMU fault handling code can properly consider the changed storage key (to e.g., properly set the reference and change bit on the next accesses). These functions are barely used in modern Linux guests, so the performance implications are neglectable for now. This is a preparation for better reference and change bit handling for TCG, which will require more MMU changes. Reviewed-by: Cornelia Huck Signed-off-by: David Hildenbrand Message-Id: <20190816084708.602-5-david@redhat.com> Acked-by: Alex Benn=C3=A9e Signed-off-by: Cornelia Huck --- target/s390x/mem_helper.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 29d9eaa5b725..91ba2e03d95c 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1815,6 +1815,11 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, u= int64_t r2) =20 key =3D (uint8_t) r1; skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + /* + * As we can only flush by virtual address and not all the entries + * that point to a physical address we have to flush the whole TLB. + */ + tlb_flush_all_cpus_synced(env_cpu(env)); } =20 /* reset reference bit extended */ @@ -1843,6 +1848,11 @@ uint32_t HELPER(rrbe)(CPUS390XState *env, uint64_t r= 2) if (skeyclass->set_skeys(ss, r2 / TARGET_PAGE_SIZE, 1, &key)) { return 0; } + /* + * As we can only flush by virtual address and not all the entries + * that point to a physical address we have to flush the whole TLB. + */ + tlb_flush_all_cpus_synced(env_cpu(env)); =20 /* * cc --=20 2.20.1 From nobody Mon May 6 00:59:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1566482723; cv=none; d=zoho.com; s=zohoarc; b=hIwk4OFB6D6gmobAIu4NhPb6o+aiizsG3yvhoSxOYUoR5r/8sTQBqwAChikkqQ5P2GkeIDrk5QcS9ZOa6/pDTdxClHbdz+4cUdViT3SgCJF+twBHnHKhNSh5yCfwh/0UDrnl48cDDUzTJAFJU1qSxrJJkQNzjQpYkt8YLf8WBB0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566482723; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; 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Thu, 22 Aug 2019 13:59:09 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 6/7] s390x/mmu: Better storage key reference and change bit handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: David Hildenbrand Any access sets the reference bit. In case we have a read-fault, we should not allow writes to the TLB entry if the change bit was not already set. This is a preparation for proper storage-key reference/change bit handling in TCG and a fix for KVM whereby read accesses would set the change bit (old KVM versions without the ioctl to carry out the translation). Reviewed-by: Cornelia Huck Signed-off-by: David Hildenbrand Message-Id: <20190816084708.602-6-david@redhat.com> Signed-off-by: Cornelia Huck --- target/s390x/mmu_helper.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 40b6c1fc36a9..61654e07dec8 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -421,14 +421,28 @@ nodat: return 0; } =20 - if (*flags & PAGE_READ) { - key |=3D SK_R; - } - - if (*flags & PAGE_WRITE) { + switch (rw) { + case MMU_DATA_LOAD: + case MMU_INST_FETCH: + /* + * The TLB entry has to remain write-protected on read-faults = if + * the storage key does not indicate a change already. Otherwi= se + * we might miss setting the change bit on write accesses. + */ + if (!(key & SK_C)) { + *flags &=3D ~PAGE_WRITE; + } + break; + case MMU_DATA_STORE: key |=3D SK_C; + break; + default: + g_assert_not_reached(); } =20 + /* Any store/fetch sets the reference bit */ + key |=3D SK_R; + r =3D skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); if (r) { trace_set_skeys_nonzero(r); --=20 2.20.1 From nobody Mon May 6 00:59:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1566482954; cv=none; d=zoho.com; s=zohoarc; b=BUItj71t2xDS5TaZAQLUp4S15gexup6Rj40c8u2IKVLJvoOZKKaB5AMK07Izqh58UAJF7/vz0bkRfGfS5QgWvQYhRzBSArit+GZTnzbumzX3+MGPB8UN0yt4xYmAZLOHy1UYo1g3Cs+YFpggXYkD8YsjwtEeFNCKFyxO4ohnvkk= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566482954; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=xqnv2DNim7suD+VA0yNo6KVS2LxgVsXBv1+v/6eTwgA=; b=Gb3W6IZVrvjtBoChGoCTeJ5utMbNiwaH2PFSFMJT9pGGQa+b/U1hoFyHC/cDV0MvW4aTaNFWu6mCasLEVxUL62XR+58cTtxeEj5uMx8pBIDOzsiGLJTc8xowHMHsF+cVFezcMboDD7l4p8/bvLdh1/F+3Pfd8E/E9UfzqiTuJGg= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1566482954170368.2872075925852; Thu, 22 Aug 2019 07:09:14 -0700 (PDT) Received: from localhost ([::1]:43604 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0nm1-0002PJ-St for importer@patchew.org; Thu, 22 Aug 2019 10:09:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48586) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0ncT-0000Xw-Bb for qemu-devel@nongnu.org; Thu, 22 Aug 2019 09:59:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0ncR-0004Rh-0g for qemu-devel@nongnu.org; Thu, 22 Aug 2019 09:59:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59446) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i0ncQ-0004RK-Om; Thu, 22 Aug 2019 09:59:14 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1274A3058E0A; Thu, 22 Aug 2019 13:59:14 +0000 (UTC) Received: from localhost (dhcp-192-222.str.redhat.com [10.33.192.222]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A2896546EE; Thu, 22 Aug 2019 13:59:10 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Thu, 22 Aug 2019 15:58:39 +0200 Message-Id: <20190822135839.32340-9-cohuck@redhat.com> In-Reply-To: <20190822135839.32340-1-cohuck@redhat.com> References: <20190822135839.32340-1-cohuck@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Thu, 22 Aug 2019 13:59:14 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 7/7] s390x/mmu: Factor out storage key handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , qemu-s390x@nongnu.org, Cornelia Huck , qemu-devel@nongnu.org, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" From: David Hildenbrand Factor it out, add a comment how it all works, and also use it in the REAL MMU. Reviewed-by: Cornelia Huck Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand Message-Id: <20190816084708.602-7-david@redhat.com> Signed-off-by: Cornelia Huck --- target/s390x/mmu_helper.c | 115 +++++++++++++++++++++++--------------- 1 file changed, 71 insertions(+), 44 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 61654e07dec8..7e6b0d050847 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -335,6 +335,75 @@ static int mmu_translate_asce(CPUS390XState *env, targ= et_ulong vaddr, return r; } =20 +static void mmu_handle_skey(target_ulong addr, int rw, int *flags) +{ + static S390SKeysClass *skeyclass; + static S390SKeysState *ss; + uint8_t key; + int rc; + + if (unlikely(addr >=3D ram_size)) { + return; + } + + if (unlikely(!ss)) { + ss =3D s390_get_skeys_device(); + skeyclass =3D S390_SKEYS_GET_CLASS(ss); + } + + /* + * Whenever we create a new TLB entry, we set the storage key reference + * bit. In case we allow write accesses, we set the storage key change + * bit. Whenever the guest changes the storage key, we have to flush t= he + * TLBs of all CPUs (the whole TLB or all affected entries), so that t= he + * next reference/change will result in an MMU fault and make us prope= rly + * update the storage key here. + * + * Note 1: "record of references ... is not necessarily accurate", + * "change bit may be set in case no storing has occurred". + * -> We can set reference/change bits even on exceptions. + * Note 2: certain accesses seem to ignore storage keys. For example, + * DAT translation does not set reference bits for table acces= ses. + * + * TODO: key-controlled protection. Only CPU accesses make use of the + * PSW key. CSS accesses are different - we have to pass in the = key. + * + * TODO: we have races between getting and setting the key. + */ + rc =3D skeyclass->get_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + if (rc) { + trace_get_skeys_nonzero(rc); + return; + } + + switch (rw) { + case MMU_DATA_LOAD: + case MMU_INST_FETCH: + /* + * The TLB entry has to remain write-protected on read-faults if + * the storage key does not indicate a change already. Otherwise + * we might miss setting the change bit on write accesses. + */ + if (!(key & SK_C)) { + *flags &=3D ~PAGE_WRITE; + } + break; + case MMU_DATA_STORE: + key |=3D SK_C; + break; + default: + g_assert_not_reached(); + } + + /* Any store/fetch sets the reference bit */ + key |=3D SK_R; + + rc =3D skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + if (rc) { + trace_set_skeys_nonzero(rc); + } +} + /** * Translate a virtual (logical) address into a physical (absolute) addres= s. * @param vaddr the virtual address @@ -348,16 +417,9 @@ static int mmu_translate_asce(CPUS390XState *env, targ= et_ulong vaddr, int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, target_ulong *raddr, int *flags, bool exc) { - static S390SKeysState *ss; - static S390SKeysClass *skeyclass; uint64_t asce; - uint8_t key; int r; =20 - if (unlikely(!ss)) { - ss =3D s390_get_skeys_device(); - skeyclass =3D S390_SKEYS_GET_CLASS(ss); - } =20 *flags =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; if (is_low_address(vaddr & TARGET_PAGE_MASK) && lowprot_enabled(env, a= sc)) { @@ -414,42 +476,7 @@ nodat: /* Convert real address -> absolute address */ *raddr =3D mmu_real2abs(env, *raddr); =20 - if (*raddr < ram_size) { - r =3D skeyclass->get_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); - if (r) { - trace_get_skeys_nonzero(r); - return 0; - } - - switch (rw) { - case MMU_DATA_LOAD: - case MMU_INST_FETCH: - /* - * The TLB entry has to remain write-protected on read-faults = if - * the storage key does not indicate a change already. Otherwi= se - * we might miss setting the change bit on write accesses. - */ - if (!(key & SK_C)) { - *flags &=3D ~PAGE_WRITE; - } - break; - case MMU_DATA_STORE: - key |=3D SK_C; - break; - default: - g_assert_not_reached(); - } - - /* Any store/fetch sets the reference bit */ - key |=3D SK_R; - - r =3D skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); - if (r) { - trace_set_skeys_nonzero(r); - return 0; - } - } - + mmu_handle_skey(*raddr, rw, flags); return 0; } =20 @@ -567,6 +594,6 @@ int mmu_translate_real(CPUS390XState *env, target_ulong= raddr, int rw, =20 *addr =3D mmu_real2abs(env, raddr & TARGET_PAGE_MASK); =20 - /* TODO: storage key handling */ + mmu_handle_skey(*addr, rw, flags); return 0; } --=20 2.20.1 From nobody Mon May 6 00:59:35 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1566482465; cv=none; d=zoho.com; s=zohoarc; b=fOsBbdruG3CuW82II4bve6Q8RWnZGvDKQ8hRsL31+p+DfDr8YjSYSuFUkyAx++MfrSMp2/yvtuUZgD8Lz5XAzE0MAaPGs+/kvzd7zyZA0qvo/6vC88//DIYZ9CbwGNekptjw/idDI1l4wbyqsWoBLz98e2aujBgcxLFC/9lbVbY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1566482465; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=ifo/xiNDI1LydS6G+8gbNt7bBDE4ZBl9J9/Dby1NVWA=; b=nwf6rI3YPsClIkJwVvHWGQwUHUXHHrIPp9QMC7brFg/H6JHhkuh9RYT4/5eMRar5e7mDEC5wuZ3/3HtdrVrStDa7XUkJK7HqiLV6D9vKRxQZ0gRvVAmkp4eSadspyhBWKDdE7Bi8mIlhYfRYZ+qFtxyiQWNq4D29L8BDFS9fD2k= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1566482465701472.39992459347434; Thu, 22 Aug 2019 07:01:05 -0700 (PDT) Received: from localhost ([::1]:43510 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0ne7-0001gg-Qs for importer@patchew.org; Thu, 22 Aug 2019 10:00:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48227) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1i0nby-0008KJ-N7 for qemu-devel@nongnu.org; Thu, 22 Aug 2019 09:58:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1i0nbx-00048A-Pv for qemu-devel@nongnu.org; Thu, 22 Aug 2019 09:58:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:10747) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1i0nbx-00047i-L9; Thu, 22 Aug 2019 09:58:45 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EBAB988134E; Thu, 22 Aug 2019 13:58:44 +0000 (UTC) Received: from localhost (dhcp-192-222.str.redhat.com [10.33.192.222]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 9D2BB60CCD; Thu, 22 Aug 2019 13:58:44 +0000 (UTC) From: Cornelia Huck To: Peter Maydell Date: Thu, 22 Aug 2019 15:58:32 +0200 Message-Id: <20190822135839.32340-2-cohuck@redhat.com> In-Reply-To: <20190822135839.32340-1-cohuck@redhat.com> References: <20190822135839.32340-1-cohuck@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.6.2 (mx1.redhat.com [10.5.110.69]); Thu, 22 Aug 2019 13:58:45 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH for-4.1?] compat: disable edid on virtio-gpu base device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" 'edid' is a property of the virtio-gpu base device, so turning it off on virtio-gpu-pci is not enough (it misses -ccw). Turn it off on the base device instead. Fixes: 0a71966253c8 ("edid: flip the default to enabled") Signed-off-by: Cornelia Huck --- Only just noticed this... should we still shove this into 4.1? Or do we need a compat 4.1.1 dance for this? --- hw/core/machine.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 28a475ad97a3..32d1ca9abc5a 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -32,7 +32,7 @@ GlobalProperty hw_compat_4_0[] =3D { { "secondary-vga", "edid", "false" }, { "bochs-display", "edid", "false" }, { "virtio-vga", "edid", "false" }, - { "virtio-gpu-pci", "edid", "false" }, + { "virtio-gpu", "edid", "false" }, { "virtio-device", "use-started", "false" }, { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, { "pl031", "migrate-tick-offset", "false" }, --=20 2.20.1