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X-Received-From: 2a00:1450:4864:20::432 Subject: [Qemu-devel] [PULL 15/29] target/arm: Use unallocated_encoding for aarch32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) From: Richard Henderson Promote this function from aarch64 to fully general use. Use it to unify the code sequences for generating illegal opcode exceptions. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20190807045335.1361-11-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.h | 2 -- target/arm/translate.h | 2 ++ target/arm/translate-a64.c | 7 ------- target/arm/translate-vfp.inc.c | 3 +-- target/arm/translate.c | 22 ++++++++++++---------- 5 files changed, 15 insertions(+), 21 deletions(-) diff --git a/target/arm/translate-a64.h b/target/arm/translate-a64.h index 9cd2b3d2389..12ad8ac6ed1 100644 --- a/target/arm/translate-a64.h +++ b/target/arm/translate-a64.h @@ -18,8 +18,6 @@ #ifndef TARGET_ARM_TRANSLATE_A64_H #define TARGET_ARM_TRANSLATE_A64_H =20 -void unallocated_encoding(DisasContext *s); - #define unsupported_encoding(s, insn) \ do { \ qemu_log_mask(LOG_UNIMP, \ diff --git a/target/arm/translate.h b/target/arm/translate.h index 64304c957ee..92ef790be9e 100644 --- a/target/arm/translate.h +++ b/target/arm/translate.h @@ -99,6 +99,8 @@ typedef struct DisasCompare { bool value_global; } DisasCompare; =20 +void unallocated_encoding(DisasContext *s); + /* Share the TCG temporaries common between 32 and 64 bit modes. */ extern TCGv_i32 cpu_NF, cpu_ZF, cpu_CF, cpu_VF; extern TCGv_i64 cpu_exclusive_addr; diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 55324333dab..fc3e5f5c389 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -338,13 +338,6 @@ static inline void gen_goto_tb(DisasContext *s, int n,= uint64_t dest) } } =20 -void unallocated_encoding(DisasContext *s) -{ - /* Unallocated and reserved encodings are uncategorized */ - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn_uncategorized(), - default_exception_el(s)); -} - static void init_tmp_a64_array(DisasContext *s) { #ifdef CONFIG_DEBUG_TCG diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index 5065d4524cd..3e8ea80493b 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -108,8 +108,7 @@ static bool full_vfp_access_check(DisasContext *s, bool= ignore_vfp_enabled) =20 if (!s->vfp_enabled && !ignore_vfp_enabled) { assert(!arm_dc_feature(s, ARM_FEATURE_M)); - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn_uncategorized(), - default_exception_el(s)); + unallocated_encoding(s); return false; } =20 diff --git a/target/arm/translate.c b/target/arm/translate.c index 8bae0c39933..cc7d37b787e 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1270,6 +1270,13 @@ static void gen_exception_bkpt_insn(DisasContext *s,= uint32_t syn) s->base.is_jmp =3D DISAS_NORETURN; } =20 +void unallocated_encoding(DisasContext *s) +{ + /* Unallocated and reserved encodings are uncategorized */ + gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn_uncategorized(), + default_exception_el(s)); +} + /* Force a TB lookup after an instruction that changes the CPU state. */ static inline void gen_lookup_tb(DisasContext *s) { @@ -1300,8 +1307,7 @@ static inline void gen_hlt(DisasContext *s, int imm) return; } =20 - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn_uncategorized(), - default_exception_el(s)); + unallocated_encoding(s); } =20 static inline void gen_add_data_offset(DisasContext *s, unsigned int insn, @@ -7623,8 +7629,7 @@ static void gen_srs(DisasContext *s, } =20 if (undef) { - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn_uncategorized(), - default_exception_el(s)); + unallocated_encoding(s); return; } =20 @@ -9251,8 +9256,7 @@ static void disas_arm_insn(DisasContext *s, unsigned = int insn) break; default: illegal_op: - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn_uncategorized= (), - default_exception_el(s)); + unallocated_encoding(s); break; } } @@ -10940,8 +10944,7 @@ static void disas_thumb2_insn(DisasContext *s, uint= 32_t insn) } return; illegal_op: - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn_uncategorized(), - default_exception_el(s)); + unallocated_encoding(s); } =20 static void disas_thumb_insn(DisasContext *s, uint32_t insn) @@ -11764,8 +11767,7 @@ static void disas_thumb_insn(DisasContext *s, uint3= 2_t insn) return; illegal_op: undef: - gen_exception_insn(s, s->pc_curr, EXCP_UDEF, syn_uncategorized(), - default_exception_el(s)); + unallocated_encoding(s); } =20 static bool insn_crosses_page(CPUARMState *env, DisasContext *s) --=20 2.20.1