From nobody Wed May 15 00:58:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1565945473; cv=none; d=zoho.com; s=zohoarc; b=ioEukUvNNI7ew2QXvU+d31m2tde8JlHoqKxNyrUs9vlwP6eaVrOMA0WMNAC7AQwtjQWnWHFTnri30cAKa9Kt8mt54zxz2IMQUU3B3DLTB1vh8AewzaVAyrcQcba+nvwTWeZ+HcsaOaQ4ALbkwrqWx8MhsJMt7B2H72uVuOG55HY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565945473; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=MzEZnID9LgDpJra+qv6JZFWbw72tnwER17d3BjJWe14=; b=HCEFQohS0XT/j52JmZw1LKpj6OWMOeU7J/QdQSoyxgq/2N8Pkm58G3ZDN8HBeFLoAyXqu+glcH6goPHO8oxGE+yApB8m9yAE++vDXu8ErB6X68knq6gIoZDkdIIRmq3/v1EGeVwPim24AQLkVDtya03SA/8iPK/fM55FHikSEBA= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565945473240122.75829739024255; Fri, 16 Aug 2019 01:51:13 -0700 (PDT) Received: from localhost ([::1]:51928 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXx1-0003gS-Pz for importer@patchew.org; Fri, 16 Aug 2019 04:51:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52004) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXtG-00071U-A3 for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hyXtF-0003tx-68 for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:18 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43386) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hyXtF-0003tR-0s; Fri, 16 Aug 2019 04:47:17 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 387C3369D3; Fri, 16 Aug 2019 08:47:16 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-249.ams2.redhat.com [10.36.116.249]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3E621F6DF; Fri, 16 Aug 2019 08:47:14 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 16 Aug 2019 10:47:03 +0200 Message-Id: <20190816084708.602-2-david@redhat.com> In-Reply-To: <20190816084708.602-1-david@redhat.com> References: <20190816084708.602-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 16 Aug 2019 08:47:16 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 1/6] s390x/mmu: Trace the right value if setting/getting the storage key fails X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Janosch Frank , David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" We want to trace the actual return value, not "0". Fixes: 0f5f669147b5 (s390x: Enable new s390-storage-keys device) Reviewed-by: Cornelia Huck Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 6e9c4d6151..b236196802 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -422,7 +422,8 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, *raddr =3D mmu_real2abs(env, *raddr); =20 if (r =3D=3D 0 && *raddr < ram_size) { - if (skeyclass->get_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key)) { + r =3D skeyclass->get_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); + if (r) { trace_get_skeys_nonzero(r); return 0; } @@ -435,7 +436,8 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, key |=3D SK_C; } =20 - if (skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key)) { + r =3D skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); + if (r) { trace_set_skeys_nonzero(r); return 0; } --=20 2.21.0 From nobody Wed May 15 00:58:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1565945357; cv=none; d=zoho.com; s=zohoarc; b=DJdapMXHpyaCsz5nZkRf7ea1CJM8FOBwDv3VbKC5c9X7LMoTxO9cTRYWf99eJneaDJO0bDeJiM+umu2vJlgiLyPKZ0yUlIplvtQtOA3Gwn4nbTzFgqo/5ZC7v+Sv1RuVg8GjBTLIHOm2uwBXYifMVuwrAtVCm+Uoh2UHxnAVbvE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565945357; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=VeMhwKrgnWuyV/R30sZ1lgnQjEUm81F3u2Ldc6Lwz5s=; b=cZr3PkzkuH6PZ2tRxMUWD+A0Z3yh14fW5GGt733u1kb6YAYPmacbCRoam7LdsQ/bq8CPokkovM/vrwoxbkIh+JDyAXQmzP4tdBt8MgKnnPO53g2uhwjISXiWifCZFzy6Z6v4lQw6pVbjn6riCTLzu6Z4qEdXkowtdx0GM+L9JWM= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565945357900330.8728465036039; Fri, 16 Aug 2019 01:49:17 -0700 (PDT) Received: from localhost ([::1]:51896 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXv8-0000Jz-1i for importer@patchew.org; Fri, 16 Aug 2019 04:49:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52030) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXtI-00073j-Al for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hyXtH-0003vu-DJ for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:20 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45466) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hyXtH-0003vK-7y; Fri, 16 Aug 2019 04:47:19 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 79D7C30842A9; Fri, 16 Aug 2019 08:47:18 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-249.ams2.redhat.com [10.36.116.249]) by smtp.corp.redhat.com (Postfix) with ESMTP id 812B343FE2; Fri, 16 Aug 2019 08:47:16 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 16 Aug 2019 10:47:04 +0200 Message-Id: <20190816084708.602-3-david@redhat.com> In-Reply-To: <20190816084708.602-1-david@redhat.com> References: <20190816084708.602-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.40]); Fri, 16 Aug 2019 08:47:18 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 2/6] s390x/mmu: ASC selection in s390_cpu_get_phys_page_debug() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Janosch Frank , David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Let's select the ASC before calling the function. This is a prepararion to remove the ASC magic depending on the access mode from mmu_translate. There is currently no way to distinguish if we have code or data access. For now, we were using code access, because especially when debugging with the gdbstub, we want to read and disassemble what we single-step. Note: KVM guest can now no longer be crashed using qmp/hmp/gdbstub if they happen to be in AR mode. Reviewed-by: Thomas Huth Reviewed-by: Cornelia Huck Signed-off-by: David Hildenbrand --- target/s390x/helper.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 13ae9909ad..c5fb8966b6 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -58,6 +58,11 @@ hwaddr s390_cpu_get_phys_page_debug(CPUState *cs, vaddr = vaddr) vaddr &=3D 0x7fffffff; } =20 + /* We want to read the code (e.g., see what we are single-stepping).*/ + if (asc !=3D PSW_ASC_HOME) { + asc =3D PSW_ASC_PRIMARY; + } + if (mmu_translate(env, vaddr, MMU_INST_FETCH, asc, &raddr, &prot, fals= e)) { return -1; } --=20 2.21.0 From nobody Wed May 15 00:58:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1565945362; cv=none; d=zoho.com; s=zohoarc; b=Z/pbH3fsLv5N9/hcQXy3DtFm4FVpyLhiPTEw19jcXSafaWrADC4+MsACDl6wNwmj5D1qR07rpVQ8pG6LBwBgaNg7FGhgeN3W7bH0iz33V3qpM/99eHIr86rfIK5raZHq2o+KHAsMf1KRmaUAmMS/BjzSsQfrkruhNma3heJ4xeU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565945362; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=G5+845KG2FFZYJOz3GHEnYdNTnwm9h+y3Bon/5Xx+1k=; b=bBIqCq6Na2p3HsrfZp6NAMufm2MkQcHWsD9oyDgG/ygrJjyI/GMjXYM30NGmpZ1pkzKHBKUalJEZ2Vc/CZonzYTeTmKUNbORycRusZVTjMPW/ZIK3IdcC9eMBcyDXjR2OaoJ3xufZCqRX1F3BPvtj4XllaC8zDdunwqoUudGF/E= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565945362963475.7786338629088; Fri, 16 Aug 2019 01:49:22 -0700 (PDT) Received: from localhost ([::1]:51898 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXvD-0000Rv-Ec for importer@patchew.org; Fri, 16 Aug 2019 04:49:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52060) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXtL-00078k-5S for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hyXtJ-0003xc-Nk for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:23 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53938) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hyXtJ-0003x6-GD; Fri, 16 Aug 2019 04:47:21 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BE49283F4C; Fri, 16 Aug 2019 08:47:20 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-249.ams2.redhat.com [10.36.116.249]) by smtp.corp.redhat.com (Postfix) with ESMTP id C2DD1F6DF; Fri, 16 Aug 2019 08:47:18 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 16 Aug 2019 10:47:05 +0200 Message-Id: <20190816084708.602-4-david@redhat.com> In-Reply-To: <20190816084708.602-1-david@redhat.com> References: <20190816084708.602-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Fri, 16 Aug 2019 08:47:20 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 3/6] s390x/tcg: Rework MMU selection for instruction fetches X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Janosch Frank , David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Instructions are always fetched from primary address space, except when in home address mode. Perform the selection directly in cpu_mmu_index(). get_mem_index() is only used to perform data access, instructions are fetched via cpu_lduw_code(), which translates to cpu_mmu_index(env, true). We don't care about restricting the access permissions of the TLB entries anymore, as we no longer enter PRIMARY entries into the SECONDARY MMU. Cleanup related code a bit. Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand Reviewed-by: Cornelia Huck --- target/s390x/cpu.h | 7 +++++++ target/s390x/mmu_helper.c | 38 +++++++++++++++----------------------- 2 files changed, 22 insertions(+), 23 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index a606547b4d..c34992bb2e 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -332,6 +332,13 @@ static inline int cpu_mmu_index(CPUS390XState *env, bo= ol ifetch) return MMU_REAL_IDX; } =20 + if (ifetch) { + if ((env->psw.mask & PSW_MASK_ASC) =3D=3D PSW_ASC_HOME) { + return MMU_HOME_IDX; + } + return MMU_PRIMARY_IDX; + } + switch (env->psw.mask & PSW_MASK_ASC) { case PSW_ASC_PRIMARY: return MMU_PRIMARY_IDX; diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index b236196802..d22c6b9c81 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -349,8 +349,9 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, { static S390SKeysState *ss; static S390SKeysClass *skeyclass; - int r =3D -1; + uint64_t asce; uint8_t key; + int r; =20 if (unlikely(!ss)) { ss =3D s390_get_skeys_device(); @@ -380,36 +381,21 @@ int mmu_translate(CPUS390XState *env, target_ulong va= ddr, int rw, uint64_t asc, =20 if (!(env->psw.mask & PSW_MASK_DAT)) { *raddr =3D vaddr; - r =3D 0; - goto out; + goto nodat; } =20 switch (asc) { case PSW_ASC_PRIMARY: PTE_DPRINTF("%s: asc=3Dprimary\n", __func__); - r =3D mmu_translate_asce(env, vaddr, asc, env->cregs[1], raddr, fl= ags, - rw, exc); + asce =3D env->cregs[1]; break; case PSW_ASC_HOME: PTE_DPRINTF("%s: asc=3Dhome\n", __func__); - r =3D mmu_translate_asce(env, vaddr, asc, env->cregs[13], raddr, f= lags, - rw, exc); + asce =3D env->cregs[13]; break; case PSW_ASC_SECONDARY: PTE_DPRINTF("%s: asc=3Dsecondary\n", __func__); - /* - * Instruction: Primary - * Data: Secondary - */ - if (rw =3D=3D MMU_INST_FETCH) { - r =3D mmu_translate_asce(env, vaddr, PSW_ASC_PRIMARY, env->cre= gs[1], - raddr, flags, rw, exc); - *flags &=3D ~(PAGE_READ | PAGE_WRITE); - } else { - r =3D mmu_translate_asce(env, vaddr, PSW_ASC_SECONDARY, env->c= regs[7], - raddr, flags, rw, exc); - *flags &=3D ~(PAGE_EXEC); - } + asce =3D env->cregs[7]; break; case PSW_ASC_ACCREG: default: @@ -417,11 +403,17 @@ int mmu_translate(CPUS390XState *env, target_ulong va= ddr, int rw, uint64_t asc, break; } =20 - out: + /* perform the DAT translation */ + r =3D mmu_translate_asce(env, vaddr, asc, asce, raddr, flags, rw, exc); + if (r) { + return r; + } + +nodat: /* Convert real address -> absolute address */ *raddr =3D mmu_real2abs(env, *raddr); =20 - if (r =3D=3D 0 && *raddr < ram_size) { + if (*raddr < ram_size) { r =3D skeyclass->get_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); if (r) { trace_get_skeys_nonzero(r); @@ -443,7 +435,7 @@ int mmu_translate(CPUS390XState *env, target_ulong vadd= r, int rw, uint64_t asc, } } =20 - return r; + return 0; } =20 /** --=20 2.21.0 From nobody Wed May 15 00:58:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 16 Aug 2019 04:47:23 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0BE34308A9BE; Fri, 16 Aug 2019 08:47:23 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-249.ams2.redhat.com [10.36.116.249]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1306E43FE2; Fri, 16 Aug 2019 08:47:20 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 16 Aug 2019 10:47:06 +0200 Message-Id: <20190816084708.602-5-david@redhat.com> In-Reply-To: <20190816084708.602-1-david@redhat.com> References: <20190816084708.602-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.41]); Fri, 16 Aug 2019 08:47:23 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 4/6] s390x/tcg: Flush the TLB of all CPUs on SSKE and RRBE X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Janosch Frank , David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Whenever we modify a storage key, we should flush the TLBs of all CPUs, so the MMU fault handling code can properly consider the changed storage key (to e.g., properly set the reference and change bit on the next accesses). These functions are barely used in modern Linux guests, so the performance implications are neglectable for now. This is a preparation for better reference and change bit handling for TCG, which will require more MMU changes. Reviewed-by: Cornelia Huck Signed-off-by: David Hildenbrand Acked-by: Alex Benn=C3=A9e --- target/s390x/mem_helper.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 29d9eaa5b7..91ba2e03d9 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1815,6 +1815,11 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, u= int64_t r2) =20 key =3D (uint8_t) r1; skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + /* + * As we can only flush by virtual address and not all the entries + * that point to a physical address we have to flush the whole TLB. + */ + tlb_flush_all_cpus_synced(env_cpu(env)); } =20 /* reset reference bit extended */ @@ -1843,6 +1848,11 @@ uint32_t HELPER(rrbe)(CPUS390XState *env, uint64_t r= 2) if (skeyclass->set_skeys(ss, r2 / TARGET_PAGE_SIZE, 1, &key)) { return 0; } + /* + * As we can only flush by virtual address and not all the entries + * that point to a physical address we have to flush the whole TLB. + */ + tlb_flush_all_cpus_synced(env_cpu(env)); =20 /* * cc --=20 2.21.0 From nobody Wed May 15 00:58:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1565945482; cv=none; d=zoho.com; s=zohoarc; b=BGRlZdm8gq1Rw8Pbf7ahMhCttBGC1YErKN3SneflSa4QiUWIjJKBCN2SPjEjWZ92GH52WJlZy+4o3FooBL+/rcupiwJeVhji8MYpC2KglqYsKuy+zxESySY8Gu5slGn5CDSkHUCZgNIvOApEG/qdGLCTKFp1+Wm61l4aYz6mbeQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565945482; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=9oVRSWQeoFQCYF6peXpPD4lH7mkb+nuz18OVuwnch+I=; b=gKznjSIQEadatxzNOmnPEOfCTHf8v8cSQ7Tt2uJ5QhZKb7YZIJxi435+xT1ZzPNqKQk2NXz83ERmVMi4RP6HorddMeK5OQejh4k/W+hHbL7Gp1ti2pW8pHCQEyXHEb7muyEHPmT6vd4UoYHKZ+E6EYRYVctqNseFV/3SvLu+yK0= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15659454820100.24212728588327082; Fri, 16 Aug 2019 01:51:22 -0700 (PDT) Received: from localhost ([::1]:51932 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXxA-0003ti-JP for importer@patchew.org; Fri, 16 Aug 2019 04:51:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52117) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXtR-0007Fc-5v for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hyXtO-00042N-M1 for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:29 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35828) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hyXtO-00041D-1x; Fri, 16 Aug 2019 04:47:26 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 529953082B40; Fri, 16 Aug 2019 08:47:25 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-249.ams2.redhat.com [10.36.116.249]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5670543FE2; Fri, 16 Aug 2019 08:47:23 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 16 Aug 2019 10:47:07 +0200 Message-Id: <20190816084708.602-6-david@redhat.com> In-Reply-To: <20190816084708.602-1-david@redhat.com> References: <20190816084708.602-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.45]); Fri, 16 Aug 2019 08:47:25 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 5/6] s390x/mmu: Better storage key reference and change bit handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Janosch Frank , David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Any access sets the reference bit. In case we have a read-fault, we should not allow writes to the TLB entry if the change bit was not already set. This is a preparation for proper storage-key reference/change bit handling in TCG and a fix for KVM whereby read accesses would set the change bit (old KVM versions without the ioctl to carry out the translation). Reviewed-by: Cornelia Huck Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index d22c6b9c81..6cc81a29b6 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -420,14 +420,28 @@ nodat: return 0; } =20 - if (*flags & PAGE_READ) { - key |=3D SK_R; - } - - if (*flags & PAGE_WRITE) { + switch (rw) { + case MMU_DATA_LOAD: + case MMU_INST_FETCH: + /* + * The TLB entry has to remain write-protected on read-faults = if + * the storage key does not indicate a change already. Otherwi= se + * we might miss setting the change bit on write accesses. + */ + if (!(key & SK_C)) { + *flags &=3D ~PAGE_WRITE; + } + break; + case MMU_DATA_STORE: key |=3D SK_C; + break; + default: + g_assert_not_reached(); } =20 + /* Any store/fetch sets the reference bit */ + key |=3D SK_R; + r =3D skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); if (r) { trace_set_skeys_nonzero(r); --=20 2.21.0 From nobody Wed May 15 00:58:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1565945479; cv=none; d=zoho.com; s=zohoarc; b=mzXWvVtoVg+lM6pBhdoDpHAs4aBS3l7Y59A763GykbQrgIPy/Kkmz22sqDwaRPVhxi8laQq7bArC+eh/7hXsW+b+amUWBCthh0ScOIoTkW850STy6e9FZo4qXHDrHaRBzYR3/YuBDuXiMG8erRTh863kLB7wVpDGrhZyPkK1iow= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565945479; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=jn5AQFPcRLFAf3Mj2dOP/LymG8vcq115Dv0oRXG1hpE=; b=Bm5HWXmmxvyZ+PMDCyR43cNlQhNzqthA0FZ+ynplhZB1LYNoN8GsG/KHPIHfyLcDLTRxe1rJUxobo3GQ0sz0M8m9qCrMkRA7N2UpGt1D0FAx1zZvbHjiA2got2oki8lvs6KZ8zmxVEh603M1ubwVKkXO9HP9yRyPoXuI5aCFJlE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565945479414483.4897510518525; Fri, 16 Aug 2019 01:51:19 -0700 (PDT) Received: from localhost ([::1]:51930 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXx8-0003ra-2G for importer@patchew.org; Fri, 16 Aug 2019 04:51:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52153) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1hyXtV-0007H8-3p for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hyXtT-00045z-19 for qemu-devel@nongnu.org; Fri, 16 Aug 2019 04:47:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54046) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hyXtR-00043S-2f; Fri, 16 Aug 2019 04:47:30 -0400 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.phx2.redhat.com [10.5.11.23]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9643D3083392; Fri, 16 Aug 2019 08:47:27 +0000 (UTC) Received: from t460s.redhat.com (ovpn-116-249.ams2.redhat.com [10.36.116.249]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9B28443FEF; Fri, 16 Aug 2019 08:47:25 +0000 (UTC) From: David Hildenbrand To: qemu-devel@nongnu.org Date: Fri, 16 Aug 2019 10:47:08 +0200 Message-Id: <20190816084708.602-7-david@redhat.com> In-Reply-To: <20190816084708.602-1-david@redhat.com> References: <20190816084708.602-1-david@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.44]); Fri, 16 Aug 2019 08:47:27 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 6/6] s390x/mmu: Factor out storage key handling X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Janosch Frank , David Hildenbrand , Cornelia Huck , Halil Pasic , Christian Borntraeger , qemu-s390x@nongnu.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Factor it out, add a comment how it all works, and also use it in the REAL MMU. Reviewed-by: Cornelia Huck Reviewed-by: Thomas Huth Signed-off-by: David Hildenbrand --- target/s390x/mmu_helper.c | 115 +++++++++++++++++++++++--------------- 1 file changed, 71 insertions(+), 44 deletions(-) diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index 6cc81a29b6..e9db31faf8 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -334,6 +334,75 @@ static int mmu_translate_asce(CPUS390XState *env, targ= et_ulong vaddr, return r; } =20 +static void mmu_handle_skey(target_ulong addr, int rw, int *flags) +{ + static S390SKeysClass *skeyclass; + static S390SKeysState *ss; + uint8_t key; + int rc; + + if (unlikely(addr >=3D ram_size)) { + return; + } + + if (unlikely(!ss)) { + ss =3D s390_get_skeys_device(); + skeyclass =3D S390_SKEYS_GET_CLASS(ss); + } + + /* + * Whenever we create a new TLB entry, we set the storage key reference + * bit. In case we allow write accesses, we set the storage key change + * bit. Whenever the guest changes the storage key, we have to flush t= he + * TLBs of all CPUs (the whole TLB or all affected entries), so that t= he + * next reference/change will result in an MMU fault and make us prope= rly + * update the storage key here. + * + * Note 1: "record of references ... is not necessarily accurate", + * "change bit may be set in case no storing has occurred". + * -> We can set reference/change bits even on exceptions. + * Note 2: certain accesses seem to ignore storage keys. For example, + * DAT translation does not set reference bits for table acces= ses. + * + * TODO: key-controlled protection. Only CPU accesses make use of the + * PSW key. CSS accesses are different - we have to pass in the = key. + * + * TODO: we have races between getting and setting the key. + */ + rc =3D skeyclass->get_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + if (rc) { + trace_get_skeys_nonzero(rc); + return; + } + + switch (rw) { + case MMU_DATA_LOAD: + case MMU_INST_FETCH: + /* + * The TLB entry has to remain write-protected on read-faults if + * the storage key does not indicate a change already. Otherwise + * we might miss setting the change bit on write accesses. + */ + if (!(key & SK_C)) { + *flags &=3D ~PAGE_WRITE; + } + break; + case MMU_DATA_STORE: + key |=3D SK_C; + break; + default: + g_assert_not_reached(); + } + + /* Any store/fetch sets the reference bit */ + key |=3D SK_R; + + rc =3D skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key); + if (rc) { + trace_set_skeys_nonzero(rc); + } +} + /** * Translate a virtual (logical) address into a physical (absolute) addres= s. * @param vaddr the virtual address @@ -347,16 +416,9 @@ static int mmu_translate_asce(CPUS390XState *env, targ= et_ulong vaddr, int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, target_ulong *raddr, int *flags, bool exc) { - static S390SKeysState *ss; - static S390SKeysClass *skeyclass; uint64_t asce; - uint8_t key; int r; =20 - if (unlikely(!ss)) { - ss =3D s390_get_skeys_device(); - skeyclass =3D S390_SKEYS_GET_CLASS(ss); - } =20 *flags =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; if (is_low_address(vaddr & TARGET_PAGE_MASK) && lowprot_enabled(env, a= sc)) { @@ -413,42 +475,7 @@ nodat: /* Convert real address -> absolute address */ *raddr =3D mmu_real2abs(env, *raddr); =20 - if (*raddr < ram_size) { - r =3D skeyclass->get_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); - if (r) { - trace_get_skeys_nonzero(r); - return 0; - } - - switch (rw) { - case MMU_DATA_LOAD: - case MMU_INST_FETCH: - /* - * The TLB entry has to remain write-protected on read-faults = if - * the storage key does not indicate a change already. Otherwi= se - * we might miss setting the change bit on write accesses. - */ - if (!(key & SK_C)) { - *flags &=3D ~PAGE_WRITE; - } - break; - case MMU_DATA_STORE: - key |=3D SK_C; - break; - default: - g_assert_not_reached(); - } - - /* Any store/fetch sets the reference bit */ - key |=3D SK_R; - - r =3D skeyclass->set_skeys(ss, *raddr / TARGET_PAGE_SIZE, 1, &key); - if (r) { - trace_set_skeys_nonzero(r); - return 0; - } - } - + mmu_handle_skey(*raddr, rw, flags); return 0; } =20 @@ -566,6 +593,6 @@ int mmu_translate_real(CPUS390XState *env, target_ulong= raddr, int rw, =20 *addr =3D mmu_real2abs(env, raddr & TARGET_PAGE_MASK); =20 - /* TODO: storage key handling */ + mmu_handle_skey(*addr, rw, flags); return 0; } --=20 2.21.0