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X-Received-From: 2a00:1450:4864:20::344 Subject: [Qemu-devel] [PATCH v3 01/13] fpu: replace LIT64 usage with UINT64_C for specialize constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , armbru@redhat.com, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We have a wrapper that does the right thing from stdint.h so lets use it for our constants in softfloat-specialize.h Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- fpu/softfloat-specialize.h | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index 7b8895726c5..5ab2fa19415 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -196,11 +196,11 @@ floatx80 floatx80_default_nan(float_status *status) /* None of the targets that have snan_bit_is_one use floatx80. */ assert(!snan_bit_is_one(status)); #if defined(TARGET_M68K) - r.low =3D LIT64(0xFFFFFFFFFFFFFFFF); + r.low =3D UINT64_C(0xFFFFFFFFFFFFFFFF); r.high =3D 0x7FFF; #else /* X86 */ - r.low =3D LIT64(0xC000000000000000); + r.low =3D UINT64_C(0xC000000000000000); r.high =3D 0xFFFF; #endif return r; @@ -212,9 +212,9 @@ floatx80 floatx80_default_nan(float_status *status) =20 #define floatx80_infinity_high 0x7FFF #if defined(TARGET_M68K) -#define floatx80_infinity_low LIT64(0x0000000000000000) +#define floatx80_infinity_low UINT64_C(0x0000000000000000) #else -#define floatx80_infinity_low LIT64(0x8000000000000000) +#define floatx80_infinity_low UINT64_C(0x8000000000000000) #endif =20 const floatx80 floatx80_infinity @@ -667,7 +667,7 @@ int float64_is_signaling_nan(float64 a_, float_status *= status) return ((a << 1) >=3D 0xFFF0000000000000ULL); } else { return (((a >> 51) & 0xFFF) =3D=3D 0xFFE) - && (a & LIT64(0x0007FFFFFFFFFFFF)); + && (a & UINT64_C(0x0007FFFFFFFFFFFF)); } #endif } @@ -707,7 +707,7 @@ static float64 commonNaNToFloat64(commonNaNT a, float_s= tatus *status) if (mantissa) { return make_float64( (((uint64_t) a.sign) << 63) - | LIT64(0x7FF0000000000000) + | UINT64_C(0x7FF0000000000000) | (a.high >> 12)); } else { return float64_default_nan(status); @@ -790,7 +790,7 @@ int floatx80_is_quiet_nan(floatx80 a, float_status *sta= tus) && (a.low =3D=3D aLow); } else { return ((a.high & 0x7FFF) =3D=3D 0x7FFF) - && (LIT64(0x8000000000000000) <=3D ((uint64_t)(a.low << 1))); + && (UINT64_C(0x8000000000000000) <=3D ((uint64_t)(a.low << 1))= ); } #endif } @@ -812,7 +812,7 @@ int floatx80_is_signaling_nan(floatx80 a, float_status = *status) } else { uint64_t aLow; =20 - aLow =3D a.low & ~LIT64(0x4000000000000000); + aLow =3D a.low & ~UINT64_C(0x4000000000000000); return ((a.high & 0x7FFF) =3D=3D 0x7FFF) && (uint64_t)(aLow << 1) && (a.low =3D=3D aLow); @@ -829,7 +829,7 @@ floatx80 floatx80_silence_nan(floatx80 a, float_status = *status) { /* None of the targets that have snan_bit_is_one use floatx80. */ assert(!snan_bit_is_one(status)); - a.low |=3D LIT64(0xC000000000000000); + a.low |=3D UINT64_C(0xC000000000000000); return a; } =20 @@ -874,7 +874,7 @@ static floatx80 commonNaNToFloatx80(commonNaNT a, float= _status *status) } =20 if (a.high >> 1) { - z.low =3D LIT64(0x8000000000000000) | a.high >> 1; + z.low =3D UINT64_C(0x8000000000000000) | a.high >> 1; z.high =3D (((uint16_t)a.sign) << 15) | 0x7FFF; } else { z =3D floatx80_default_nan(status); @@ -969,7 +969,7 @@ int float128_is_signaling_nan(float128 a, float_status = *status) && (a.low || (a.high & 0x0000FFFFFFFFFFFFULL)); } else { return (((a.high >> 47) & 0xFFFF) =3D=3D 0xFFFE) - && (a.low || (a.high & LIT64(0x00007FFFFFFFFFFF))); + && (a.low || (a.high & UINT64_C(0x00007FFFFFFFFFFF))); } #endif } @@ -987,7 +987,7 @@ float128 float128_silence_nan(float128 a, float_status = *status) if (snan_bit_is_one(status)) { return float128_default_nan(status); } else { - a.high |=3D LIT64(0x0000800000000000); + a.high |=3D UINT64_C(0x0000800000000000); return a; } #endif @@ -1025,7 +1025,7 @@ static float128 commonNaNToFloat128(commonNaNT a, flo= at_status *status) } =20 shift128Right(a.high, a.low, 16, &z.high, &z.low); - z.high |=3D (((uint64_t)a.sign) << 63) | LIT64(0x7FFF000000000000); + z.high |=3D (((uint64_t)a.sign) << 63) | UINT64_C(0x7FFF000000000000); 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X-Received-From: 2a00:1450:4864:20::342 Subject: [Qemu-devel] [PATCH v3 02/13] fpu: convert float[16/32/64]_squash_denormal to new modern style X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , armbru@redhat.com, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This also allows us to remove the extractFloat16exp/frac helpers. Signed-off-by: Alex Benn=C3=A9e --- fpu/softfloat.c | 110 +++++++++++++++++++++--------------------------- 1 file changed, 47 insertions(+), 63 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 2ba36ec3703..0a434555cd8 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -414,24 +414,6 @@ float64_gen2(float64 xa, float64 xb, float_status *s, return soft(ua.s, ub.s, s); } =20 -/*------------------------------------------------------------------------= ---- -| Returns the fraction bits of the half-precision floating-point value `a'. -*-------------------------------------------------------------------------= ---*/ - -static inline uint32_t extractFloat16Frac(float16 a) -{ - return float16_val(a) & 0x3ff; -} - -/*------------------------------------------------------------------------= ---- -| Returns the exponent bits of the half-precision floating-point value `a'. -*-------------------------------------------------------------------------= ---*/ - -static inline int extractFloat16Exp(float16 a) -{ - return (float16_val(a) >> 10) & 0x1f; -} - /*------------------------------------------------------------------------= ---- | Returns the fraction bits of the single-precision floating-point value `= a'. *-------------------------------------------------------------------------= ---*/ @@ -3306,6 +3288,53 @@ float64 float64_silence_nan(float64 a, float_status = *status) return float64_pack_raw(p); } =20 + +/*------------------------------------------------------------------------= ---- +| If `a' is denormal and we are in flush-to-zero mode then set the +| input-denormal exception and return zero. Otherwise just return the valu= e. +*-------------------------------------------------------------------------= ---*/ + +static FloatParts parts_squash_denormal(FloatParts p, float_status *status) +{ + if (p.exp =3D=3D 0 && p.frac !=3D 0) { + float_raise(float_flag_input_denormal, status); + p.frac =3D 0; + p.cls =3D float_class_zero; + } + + return p; +} + +float16 float16_squash_input_denormal(float16 a, float_status *status) +{ + if (status->flush_inputs_to_zero) { + FloatParts p =3D float16_unpack_raw(a); + p =3D parts_squash_denormal(p, status); + return float16_pack_raw(p); + } + return a; +} + +float32 float32_squash_input_denormal(float32 a, float_status *status) +{ + if (status->flush_inputs_to_zero) { + FloatParts p =3D float32_unpack_raw(a); + p =3D parts_squash_denormal(p, status); + return float32_pack_raw(p); + } + return a; +} + +float64 float64_squash_input_denormal(float64 a, float_status *status) +{ + if (status->flush_inputs_to_zero) { + FloatParts p =3D float64_unpack_raw(a); + p =3D parts_squash_denormal(p, status); + return float64_pack_raw(p); + } + return a; +} + /*------------------------------------------------------------------------= ---- | Takes a 64-bit fixed-point value `absZ' with binary point between bits 6 | and 7, and returns the properly rounded 32-bit integer corresponding to = the @@ -3482,21 +3511,6 @@ static int64_t roundAndPackUint64(flag zSign, uint64= _t absZ0, return absZ0; } =20 -/*------------------------------------------------------------------------= ---- -| If `a' is denormal and we are in flush-to-zero mode then set the -| input-denormal exception and return zero. Otherwise just return the valu= e. -*-------------------------------------------------------------------------= ---*/ -float32 float32_squash_input_denormal(float32 a, float_status *status) -{ - if (status->flush_inputs_to_zero) { - if (extractFloat32Exp(a) =3D=3D 0 && extractFloat32Frac(a) !=3D 0)= { - float_raise(float_flag_input_denormal, status); - return make_float32(float32_val(a) & 0x80000000); - } - } - return a; -} - /*------------------------------------------------------------------------= ---- | Normalizes the subnormal single-precision floating-point value represent= ed | by the denormalized significand `aSig'. The normalized exponent and @@ -3635,21 +3649,6 @@ static float32 =20 } =20 -/*------------------------------------------------------------------------= ---- -| If `a' is denormal and we are in flush-to-zero mode then set the -| input-denormal exception and return zero. Otherwise just return the valu= e. -*-------------------------------------------------------------------------= ---*/ -float64 float64_squash_input_denormal(float64 a, float_status *status) -{ - if (status->flush_inputs_to_zero) { - if (extractFloat64Exp(a) =3D=3D 0 && extractFloat64Frac(a) !=3D 0)= { - float_raise(float_flag_input_denormal, status); - return make_float64(float64_val(a) & (1ULL << 63)); - } - } - return a; -} - /*------------------------------------------------------------------------= ---- | Normalizes the subnormal double-precision floating-point value represent= ed | by the denormalized significand `aSig'. The normalized exponent and @@ -4981,21 +4980,6 @@ int float32_unordered_quiet(float32 a, float32 b, fl= oat_status *status) return 0; } =20 -/*------------------------------------------------------------------------= ---- -| If `a' is denormal and we are in flush-to-zero mode then set the -| input-denormal exception and return zero. Otherwise just return the valu= e. -*-------------------------------------------------------------------------= ---*/ -float16 float16_squash_input_denormal(float16 a, float_status *status) -{ - if (status->flush_inputs_to_zero) { - if (extractFloat16Exp(a) =3D=3D 0 && extractFloat16Frac(a) !=3D 0)= { - float_raise(float_flag_input_denormal, status); - return make_float16(float16_val(a) & 0x8000); - } - } - return a; -} - /*------------------------------------------------------------------------= ---- | Returns the result of converting the double-precision floating-point val= ue | `a' to the extended double-precision floating-point format. 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X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH v3 03/13] fpu: optimise float[16/32/64]_squash_denormal (HACK?) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , armbru@redhat.com, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Using the floatXX_pack_raw functions is slight overkill for basically just masking out all but the top bit of the number. This makes the final code exactly the same as pre-conversion. TODO: is this worth it, can the compiler do better with make_float? Signed-off-by: Alex Benn=C3=A9e --- fpu/softfloat.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 0a434555cd8..9e57b7b5933 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -3294,23 +3294,23 @@ float64 float64_silence_nan(float64 a, float_status= *status) | input-denormal exception and return zero. Otherwise just return the valu= e. *-------------------------------------------------------------------------= ---*/ =20 -static FloatParts parts_squash_denormal(FloatParts p, float_status *status) +static bool parts_squash_denormal(FloatParts p, float_status *status) { if (p.exp =3D=3D 0 && p.frac !=3D 0) { float_raise(float_flag_input_denormal, status); - p.frac =3D 0; - p.cls =3D float_class_zero; + return true; } =20 - return p; + return false; } =20 float16 float16_squash_input_denormal(float16 a, float_status *status) { if (status->flush_inputs_to_zero) { FloatParts p =3D float16_unpack_raw(a); - p =3D parts_squash_denormal(p, status); - return float16_pack_raw(p); + if (parts_squash_denormal(p, status)) { + a =3D make_float16(float16_val(a) & 0x8000); + } } return a; } @@ -3319,8 +3319,9 @@ float32 float32_squash_input_denormal(float32 a, floa= t_status *status) { if (status->flush_inputs_to_zero) { FloatParts p =3D float32_unpack_raw(a); - p =3D parts_squash_denormal(p, status); - return float32_pack_raw(p); + if (parts_squash_denormal(p, status)) { + a =3D make_float32(float32_val(a) & 0x80000000); + } } return a; } @@ -3329,8 +3330,9 @@ float64 float64_squash_input_denormal(float64 a, floa= t_status *status) { if (status->flush_inputs_to_zero) { FloatParts p =3D float64_unpack_raw(a); - p =3D parts_squash_denormal(p, status); - return float64_pack_raw(p); + if (parts_squash_denormal(p, status)) { + a =3D make_float64(float64_val(a) & (1ULL << 63)); + } } return a; } --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1565700775; cv=none; d=zoho.com; s=zohoarc; b=Uw/5dqDQHytYW8eUPM7RR+pfK/GO+/aUGo4A5Khfa2I8NXaD6XsZjijmS0G80cViutI1rNoTXwpzkA/KfP+92g+Lew7gIHyPPovlLjXukResWRwN4hupx01Pjt2f6mBLcM062zrQl1wp4brkMpimFa7uer7DTesA04lYN52Q/6M= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565700775; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=PJTLOGYfOYJRlE+NNvZ7x6ubINqPg6f5ZRf9gomrPy8=; b=BTHZy8+LUUQ5DDatNsfOavhn2H04k13ZStEF3zME0K9CFHj328TLKh28WK0fZLMDl+X4H0zFDvdDcWINqmFNJfXO6KdLov4SpVEYdZ+DjCC8t1XETDA5FOSpDOCiORUmVxMEFysph4LKlfn9ADUuDitGmwfIX8uPMKY0JHYXZ3I= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565700775923667.1803027679076; Tue, 13 Aug 2019 05:52:55 -0700 (PDT) Received: from localhost ([::1]:52018 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWIJ-00080F-21 for importer@patchew.org; Tue, 13 Aug 2019 08:52:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53573) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWFM-0002Gt-Vb for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hxWFL-0000fe-Ni for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:52 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:51772) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hxWFL-0000eT-H7 for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:51 -0400 Received: by mail-wm1-x344.google.com with SMTP id 207so1397940wma.1 for ; Tue, 13 Aug 2019 05:49:51 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id i66sm1256285wmg.2.2019.08.13.05.49.47 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 05:49:48 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::344 Subject: [Qemu-devel] [PATCH v3 04/13] fpu: use min/max values from stdint.h for integral overflow X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , armbru@redhat.com, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Remove some more use of LIT64 while making the meaning more clear. We also avoid the need of casts as the results by definition fit into the return type. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- fpu/softfloat.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 9e57b7b5933..a1e1e9a8559 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -3444,9 +3444,7 @@ static int64_t roundAndPackInt64(flag zSign, uint64_t= absZ0, uint64_t absZ1, if ( z && ( ( z < 0 ) ^ zSign ) ) { overflow: float_raise(float_flag_invalid, status); - return - zSign ? (int64_t) LIT64( 0x8000000000000000 ) - : LIT64( 0x7FFFFFFFFFFFFFFF ); + return zSign ? INT64_MIN : INT64_MAX; } if (absZ1) { status->float_exception_flags |=3D float_flag_inexact; @@ -3497,7 +3495,7 @@ static int64_t roundAndPackUint64(flag zSign, uint64_= t absZ0, ++absZ0; if (absZ0 =3D=3D 0) { float_raise(float_flag_invalid, status); - return LIT64(0xFFFFFFFFFFFFFFFF); + return UINT64_MAX; } absZ0 &=3D ~(((uint64_t)(absZ1<<1) =3D=3D 0) & roundNearestEven); } @@ -5518,9 +5516,9 @@ int64_t floatx80_to_int64(floatx80 a, float_status *s= tatus) if ( shiftCount ) { float_raise(float_flag_invalid, status); if (!aSign || floatx80_is_any_nan(a)) { - return LIT64( 0x7FFFFFFFFFFFFFFF ); + return INT64_MAX; } - return (int64_t) LIT64( 0x8000000000000000 ); + return INT64_MIN; } aSigExtra =3D 0; } @@ -5561,10 +5559,10 @@ int64_t floatx80_to_int64_round_to_zero(floatx80 a,= float_status *status) if ( ( a.high !=3D 0xC03E ) || aSig ) { float_raise(float_flag_invalid, status); if ( ! aSign || ( ( aExp =3D=3D 0x7FFF ) && aSig ) ) { - return LIT64( 0x7FFFFFFFFFFFFFFF ); + return INT64_MAX; } } - return (int64_t) LIT64( 0x8000000000000000 ); + return INT64_MIN; } else if ( aExp < 0x3FFF ) { if (aExp | aSig) { @@ -6623,7 +6621,7 @@ int32_t float128_to_int32_round_to_zero(float128 a, f= loat_status *status) if ( ( z < 0 ) ^ aSign ) { invalid: float_raise(float_flag_invalid, status); - return aSign ? (int32_t) 0x80000000 : 0x7FFFFFFF; + return aSign ? INT32_MIN : INT32_MAX; } if ( ( aSig0<float_exception_flags |=3D float_flag_inexact; @@ -6662,9 +6660,9 @@ int64_t float128_to_int64(float128 a, float_status *s= tatus) && ( aSig1 || ( aSig0 !=3D LIT64( 0x0001000000000000= ) ) ) ) ) { - return LIT64( 0x7FFFFFFFFFFFFFFF ); + return INT64_MAX; } - return (int64_t) LIT64( 0x8000000000000000 ); + return INT64_MIN; } shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 ); } @@ -6710,10 +6708,10 @@ int64_t float128_to_int64_round_to_zero(float128 a,= float_status *status) else { float_raise(float_flag_invalid, status); if ( ! aSign || ( ( aExp =3D=3D 0x7FFF ) && ( aSig0 | aSig= 1 ) ) ) { - return LIT64( 0x7FFFFFFFFFFFFFFF ); + return INT64_MAX; } } - return (int64_t) LIT64( 0x8000000000000000 ); + return INT64_MIN; } z =3D ( aSig0<>( ( - shiftCount ) & 63 ) ); if ( (uint64_t) ( aSig1< 0x3FFE)) { float_raise(float_flag_invalid, status); if (float128_is_any_nan(a)) { - return LIT64(0xFFFFFFFFFFFFFFFF); + return UINT64_MAX; } else { return 0; } } if (aExp) { - aSig0 |=3D LIT64(0x0001000000000000); + aSig0 |=3D UINT64_C(0x0001000000000000); } shiftCount =3D 0x402F - aExp; if (shiftCount <=3D 0) { if (0x403E < aExp) { float_raise(float_flag_invalid, status); - return LIT64(0xFFFFFFFFFFFFFFFF); + return UINT64_MAX; } shortShift128Left(aSig0, aSig1, -shiftCount, &aSig0, &aSig1); } else { --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1565701044; cv=none; d=zoho.com; s=zohoarc; b=BzROuHoANX1HukfyEW7Uno6xdubb4/ls7bhDSTlkUxzTjJ//IgLD9xJW+90PW7JmvlPGyqQbiUGKl27Gw6xGR8VVFYver7HfrZpUyVMRpenVoVAsKCB9V+QMXlHI36GnuhKjq4958wSUxVF5F5FtPPgqRu/VA6HhwDPixuKcRBQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565701044; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=hOLI7tuxGPQjXT0Wu0CPJzX+iAqQQ6MgBHKIRDBk/oY=; b=guQCRlq7sP8yJlslV8z5GJ1nRqOQvgNo5jiwEJV31VswGd21lfCthS57KqyG0i6uZKntWv7FDwTcZ6bp2QPPnfcik1qIM9aHp4wipzyFOAcFQ7S039rWTp5iBHDyUvAWZmnPPBZwOxvWPAc82StmWFr8wrEWZjXrGHLlT3/upHI= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 15657010447211023.3957324837291; Tue, 13 Aug 2019 05:57:24 -0700 (PDT) Received: from localhost ([::1]:52066 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWMW-0005AS-EW for importer@patchew.org; Tue, 13 Aug 2019 08:57:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53603) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWFP-0002NX-6Z for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hxWFN-0000hG-0r for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:55 -0400 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:33749) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hxWFM-0000gG-Nb for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:52 -0400 Received: by mail-wm1-x341.google.com with SMTP id p77so1010331wme.0 for ; Tue, 13 Aug 2019 05:49:52 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id l2sm1090343wmj.4.2019.08.13.05.49.48 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 05:49:49 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH v3 05/13] fpu: replace LIT64 with UINT64_C macros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , armbru@redhat.com, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) In our quest to eliminate the home rolled LIT64 macro we fixup usage inside the softfloat code. While we are at it we remove some of the extraneous spaces to closer fit the house style. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- fpu/softfloat.c | 118 ++++++++++++++++----------------- include/fpu/softfloat-macros.h | 6 +- 2 files changed, 62 insertions(+), 62 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index a1e1e9a8559..6bf6241710f 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -447,7 +447,7 @@ static inline flag extractFloat32Sign(float32 a) =20 static inline uint64_t extractFloat64Frac(float64 a) { - return float64_val(a) & LIT64(0x000FFFFFFFFFFFFF); + return float64_val(a) & UINT64_C(0x000FFFFFFFFFFFFF); } =20 /*------------------------------------------------------------------------= ---- @@ -3251,7 +3251,7 @@ float128 float128_default_nan(float_status *status) */ r.low =3D -(p.frac & 1); r.high =3D p.frac >> (DECOMPOSED_BINARY_POINT - 48); - r.high |=3D LIT64(0x7FFF000000000000); + r.high |=3D UINT64_C(0x7FFF000000000000); r.high |=3D (uint64_t)p.sign << 63; =20 return r; @@ -3758,7 +3758,7 @@ static float64 roundAndPackFloat64(flag zSign, int zE= xp, uint64_t zSig, (status->float_detect_tininess =3D=3D float_tininess_before_rounding) || ( zExp < -1 ) - || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) ); + || ( zSig + roundIncrement < UINT64_C(0x8000000000000000) = ); shift64RightJamming( zSig, - zExp, &zSig ); zExp =3D 0; roundBits =3D zSig & 0x3FF; @@ -3858,12 +3858,12 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecis= ion, flag zSign, roundNearestEven =3D ( roundingMode =3D=3D float_round_nearest_even ); if ( roundingPrecision =3D=3D 80 ) goto precision80; if ( roundingPrecision =3D=3D 64 ) { - roundIncrement =3D LIT64( 0x0000000000000400 ); - roundMask =3D LIT64( 0x00000000000007FF ); + roundIncrement =3D UINT64_C(0x0000000000000400); + roundMask =3D UINT64_C(0x00000000000007FF); } else if ( roundingPrecision =3D=3D 32 ) { - roundIncrement =3D LIT64( 0x0000008000000000 ); - roundMask =3D LIT64( 0x000000FFFFFFFFFF ); + roundIncrement =3D UINT64_C(0x0000008000000000); + roundMask =3D UINT64_C(0x000000FFFFFFFFFF); } else { goto precision80; @@ -3927,7 +3927,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecisio= n, flag zSign, zSig0 +=3D roundIncrement; if ( zSig0 < roundIncrement ) { ++zExp; - zSig0 =3D LIT64( 0x8000000000000000 ); + zSig0 =3D UINT64_C(0x8000000000000000); } roundIncrement =3D roundMask + 1; if ( roundNearestEven && ( roundBits<<1 =3D=3D roundIncrement ) ) { @@ -3957,7 +3957,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecisio= n, flag zSign, if ( 0x7FFD <=3D (uint32_t) ( zExp - 1 ) ) { if ( ( 0x7FFE < zExp ) || ( ( zExp =3D=3D 0x7FFE ) - && ( zSig0 =3D=3D LIT64( 0xFFFFFFFFFFFFFFFF ) ) + && ( zSig0 =3D=3D UINT64_C(0xFFFFFFFFFFFFFFFF) ) && increment ) ) { @@ -3980,7 +3980,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecisio= n, flag zSign, =3D=3D float_tininess_before_rounding) || ( zExp < 0 ) || ! increment - || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) ); + || ( zSig0 < UINT64_C(0xFFFFFFFFFFFFFFFF) ); shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSi= g1 ); zExp =3D 0; if (isTiny && zSig1) { @@ -4022,7 +4022,7 @@ floatx80 roundAndPackFloatx80(int8_t roundingPrecisio= n, flag zSign, ++zSig0; if ( zSig0 =3D=3D 0 ) { ++zExp; - zSig0 =3D LIT64( 0x8000000000000000 ); + zSig0 =3D UINT64_C(0x8000000000000000); } else { zSig0 &=3D ~ ( ( (uint64_t) ( zSig1<<1 ) =3D=3D 0 ) & roundNea= restEven ); @@ -4084,7 +4084,7 @@ static inline uint64_t extractFloat128Frac1( float128= a ) static inline uint64_t extractFloat128Frac0( float128 a ) { =20 - return a.high & LIT64( 0x0000FFFFFFFFFFFF ); + return a.high & UINT64_C(0x0000FFFFFFFFFFFF); =20 } =20 @@ -4230,8 +4230,8 @@ static float128 roundAndPackFloat128(flag zSign, int3= 2_t zExp, if ( ( 0x7FFD < zExp ) || ( ( zExp =3D=3D 0x7FFD ) && eq128( - LIT64( 0x0001FFFFFFFFFFFF ), - LIT64( 0xFFFFFFFFFFFFFFFF ), + UINT64_C(0x0001FFFFFFFFFFFF), + UINT64_C(0xFFFFFFFFFFFFFFFF), zSig0, zSig1 ) @@ -4248,8 +4248,8 @@ static float128 roundAndPackFloat128(flag zSign, int3= 2_t zExp, packFloat128( zSign, 0x7FFE, - LIT64( 0x0000FFFFFFFFFFFF ), - LIT64( 0xFFFFFFFFFFFFFFFF ) + UINT64_C(0x0000FFFFFFFFFFFF), + UINT64_C(0xFFFFFFFFFFFFFFFF) ); } return packFloat128( zSign, 0x7FFF, 0, 0 ); @@ -4267,8 +4267,8 @@ static float128 roundAndPackFloat128(flag zSign, int3= 2_t zExp, || lt128( zSig0, zSig1, - LIT64( 0x0001FFFFFFFFFFFF ), - LIT64( 0xFFFFFFFFFFFFFFFF ) + UINT64_C(0x0001FFFFFFFFFFFF), + UINT64_C(0xFFFFFFFFFFFFFFFF) ); shift128ExtraRightJamming( zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 ); @@ -5011,7 +5011,7 @@ floatx80 float64_to_floatx80(float64 a, float_status = *status) } return packFloatx80( - aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<= 11 ); + aSign, aExp + 0x3C00, (aSig | UINT64_C(0x0010000000000000)) <<= 11); =20 } =20 @@ -5095,8 +5095,8 @@ float64 float64_rem(float64 a, float64 b, float_statu= s *status) normalizeFloat64Subnormal( aSig, &aExp, &aSig ); } expDiff =3D aExp - bExp; - aSig =3D ( aSig | LIT64( 0x0010000000000000 ) )<<11; - bSig =3D ( bSig | LIT64( 0x0010000000000000 ) )<<11; + aSig =3D (aSig | UINT64_C(0x0010000000000000)) << 11; + bSig =3D (bSig | UINT64_C(0x0010000000000000)) << 11; if ( expDiff < 0 ) { if ( expDiff < -1 ) return a; aSig >>=3D 1; @@ -5169,13 +5169,13 @@ float64 float64_log2(float64 a, float_status *statu= s) } =20 aExp -=3D 0x3FF; - aSig |=3D LIT64( 0x0010000000000000 ); + aSig |=3D UINT64_C(0x0010000000000000); zSign =3D aExp < 0; zSig =3D (uint64_t)aExp << 52; for (i =3D 1LL << 51; i > 0; i >>=3D 1) { mul64To128( aSig, aSig, &aSig0, &aSig1 ); aSig =3D ( aSig0 << 12 ) | ( aSig1 >> 52 ); - if ( aSig & LIT64( 0x0020000000000000 ) ) { + if ( aSig & UINT64_C(0x0020000000000000) ) { aSig >>=3D 1; zSig |=3D i; } @@ -5555,7 +5555,7 @@ int64_t floatx80_to_int64_round_to_zero(floatx80 a, f= loat_status *status) aSign =3D extractFloatx80Sign( a ); shiftCount =3D aExp - 0x403E; if ( 0 <=3D shiftCount ) { - aSig &=3D LIT64( 0x7FFFFFFFFFFFFFFF ); + aSig &=3D UINT64_C(0x7FFFFFFFFFFFFFFF); if ( ( a.high !=3D 0xC03E ) || aSig ) { float_raise(float_flag_invalid, status); if ( ! aSign || ( ( aExp =3D=3D 0x7FFF ) && aSig ) ) { @@ -5724,23 +5724,23 @@ floatx80 floatx80_round_to_int(floatx80 a, float_st= atus *status) if ( ( aExp =3D=3D 0x3FFE ) && (uint64_t) ( extractFloatx80Fra= c( a )<<1 ) ) { return - packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000= ) ); + packFloatx80( aSign, 0x3FFF, UINT64_C(0x80000000000000= 00)); } break; case float_round_ties_away: if (aExp =3D=3D 0x3FFE) { - return packFloatx80(aSign, 0x3FFF, LIT64(0x800000000000000= 0)); + return packFloatx80(aSign, 0x3FFF, UINT64_C(0x800000000000= 0000)); } break; case float_round_down: return aSign ? - packFloatx80( 1, 0x3FFF, LIT64( 0x8000000000000000 )= ) + packFloatx80( 1, 0x3FFF, UINT64_C(0x8000000000000000= )) : packFloatx80( 0, 0, 0 ); case float_round_up: return aSign ? packFloatx80( 1, 0, 0 ) - : packFloatx80( 0, 0x3FFF, LIT64( 0x8000000000000000 ) ); + : packFloatx80( 0, 0x3FFF, UINT64_C(0x8000000000000000)); } return packFloatx80( aSign, 0, 0 ); } @@ -5776,7 +5776,7 @@ floatx80 floatx80_round_to_int(floatx80 a, float_stat= us *status) z.low &=3D ~ roundBitsMask; if ( z.low =3D=3D 0 ) { ++z.high; - z.low =3D LIT64( 0x8000000000000000 ); + z.low =3D UINT64_C(0x8000000000000000); } if (z.low !=3D a.low) { status->float_exception_flags |=3D float_flag_inexact; @@ -5849,7 +5849,7 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 = b, flag zSign, if ( (int64_t) zSig0 < 0 ) goto roundAndPack; shiftRight1: shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 ); - zSig0 |=3D LIT64( 0x8000000000000000 ); + zSig0 |=3D UINT64_C(0x8000000000000000); ++zExp; roundAndPack: return roundAndPackFloatx80(status->floatx80_rounding_precision, @@ -6171,7 +6171,7 @@ floatx80 floatx80_rem(floatx80 a, floatx80 b, float_s= tatus *status) if ( (uint64_t) ( aSig0<<1 ) =3D=3D 0 ) return a; normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 ); } - bSig |=3D LIT64( 0x8000000000000000 ); + bSig |=3D UINT64_C(0x8000000000000000); zSign =3D aSign; expDiff =3D aExp - bExp; aSig1 =3D 0; @@ -6273,7 +6273,7 @@ floatx80 floatx80_sqrt(floatx80 a, float_status *stat= us) add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 ); } zSig1 =3D estimateDiv128To64( rem1, 0, doubleZSig0 ); - if ( ( zSig1 & LIT64( 0x3FFFFFFFFFFFFFFF ) ) <=3D 5 ) { + if ( ( zSig1 & UINT64_C(0x3FFFFFFFFFFFFFFF) ) <=3D 5 ) { if ( zSig1 =3D=3D 0 ) zSig1 =3D 1; mul64To128( doubleZSig0, zSig1, &term1, &term2 ); sub128( rem1, 0, term1, term2, &rem1, &rem2 ); @@ -6572,7 +6572,7 @@ int32_t float128_to_int32(float128 a, float_status *s= tatus) aExp =3D extractFloat128Exp( a ); aSign =3D extractFloat128Sign( a ); if ( ( aExp =3D=3D 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign =3D 0; - if ( aExp ) aSig0 |=3D LIT64( 0x0001000000000000 ); + if ( aExp ) aSig0 |=3D UINT64_C(0x0001000000000000); aSig0 |=3D ( aSig1 !=3D 0 ); shiftCount =3D 0x4028 - aExp; if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 ); @@ -6612,7 +6612,7 @@ int32_t float128_to_int32_round_to_zero(float128 a, f= loat_status *status) } return 0; } - aSig0 |=3D LIT64( 0x0001000000000000 ); + aSig0 |=3D UINT64_C(0x0001000000000000); shiftCount =3D 0x402F - aExp; savedASig =3D aSig0; aSig0 >>=3D shiftCount; @@ -6650,14 +6650,14 @@ int64_t float128_to_int64(float128 a, float_status = *status) aSig0 =3D extractFloat128Frac0( a ); aExp =3D extractFloat128Exp( a ); aSign =3D extractFloat128Sign( a ); - if ( aExp ) aSig0 |=3D LIT64( 0x0001000000000000 ); + if ( aExp ) aSig0 |=3D UINT64_C(0x0001000000000000); shiftCount =3D 0x402F - aExp; if ( shiftCount <=3D 0 ) { if ( 0x403E < aExp ) { float_raise(float_flag_invalid, status); if ( ! aSign || ( ( aExp =3D=3D 0x7FFF ) - && ( aSig1 || ( aSig0 !=3D LIT64( 0x0001000000000000= ) ) ) + && ( aSig1 || ( aSig0 !=3D UINT64_C(0x00010000000000= 00) ) ) ) ) { return INT64_MAX; @@ -6694,13 +6694,13 @@ int64_t float128_to_int64_round_to_zero(float128 a,= float_status *status) aSig0 =3D extractFloat128Frac0( a ); aExp =3D extractFloat128Exp( a ); aSign =3D extractFloat128Sign( a ); - if ( aExp ) aSig0 |=3D LIT64( 0x0001000000000000 ); + if ( aExp ) aSig0 |=3D UINT64_C(0x0001000000000000); shiftCount =3D aExp - 0x402F; if ( 0 < shiftCount ) { if ( 0x403E <=3D aExp ) { - aSig0 &=3D LIT64( 0x0000FFFFFFFFFFFF ); - if ( ( a.high =3D=3D LIT64( 0xC03E000000000000 ) ) - && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) { + aSig0 &=3D UINT64_C(0x0000FFFFFFFFFFFF); + if ( ( a.high =3D=3D UINT64_C(0xC03E000000000000) ) + && ( aSig1 < UINT64_C(0x0002000000000000) ) ) { if (aSig1) { status->float_exception_flags |=3D float_flag_inexact; } @@ -6913,7 +6913,7 @@ float64 float128_to_float64(float128 a, float_status = *status) shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 ); aSig0 |=3D ( aSig1 !=3D 0 ); if ( aExp || aSig0 ) { - aSig0 |=3D LIT64( 0x4000000000000000 ); + aSig0 |=3D UINT64_C(0x4000000000000000); aExp -=3D 0x3C01; } return roundAndPackFloat64(aSign, aExp, aSig0, status); @@ -6949,7 +6949,7 @@ floatx80 float128_to_floatx80(float128 a, float_statu= s *status) normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 ); } else { - aSig0 |=3D LIT64( 0x0001000000000000 ); + aSig0 |=3D UINT64_C(0x0001000000000000); } shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 ); return roundAndPackFloatx80(80, aSign, aExp, aSig0, aSig1, status); @@ -7145,7 +7145,7 @@ static float128 addFloat128Sigs(float128 a, float128 = b, flag zSign, --expDiff; } else { - bSig0 |=3D LIT64( 0x0001000000000000 ); + bSig0 |=3D UINT64_C(0x0001000000000000); } shift128ExtraRightJamming( bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 ); @@ -7162,7 +7162,7 @@ static float128 addFloat128Sigs(float128 a, float128 = b, flag zSign, ++expDiff; } else { - aSig0 |=3D LIT64( 0x0001000000000000 ); + aSig0 |=3D UINT64_C(0x0001000000000000); } shift128ExtraRightJamming( aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 ); @@ -7186,14 +7186,14 @@ static float128 addFloat128Sigs(float128 a, float12= 8 b, flag zSign, return packFloat128( zSign, 0, zSig0, zSig1 ); } zSig2 =3D 0; - zSig0 |=3D LIT64( 0x0002000000000000 ); + zSig0 |=3D UINT64_C(0x0002000000000000); zExp =3D aExp; goto shiftRight1; } - aSig0 |=3D LIT64( 0x0001000000000000 ); + aSig0 |=3D UINT64_C(0x0001000000000000); add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 ); --zExp; - if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack; + if ( zSig0 < UINT64_C(0x0002000000000000) ) goto roundAndPack; ++zExp; shiftRight1: shift128ExtraRightJamming( @@ -7257,10 +7257,10 @@ static float128 subFloat128Sigs(float128 a, float12= 8 b, flag zSign, ++expDiff; } else { - aSig0 |=3D LIT64( 0x4000000000000000 ); + aSig0 |=3D UINT64_C(0x4000000000000000); } shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 ); - bSig0 |=3D LIT64( 0x4000000000000000 ); + bSig0 |=3D UINT64_C(0x4000000000000000); bBigger: sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 ); zExp =3D bExp; @@ -7277,10 +7277,10 @@ static float128 subFloat128Sigs(float128 a, float12= 8 b, flag zSign, --expDiff; } else { - bSig0 |=3D LIT64( 0x4000000000000000 ); + bSig0 |=3D UINT64_C(0x4000000000000000); } shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 ); - aSig0 |=3D LIT64( 0x4000000000000000 ); + aSig0 |=3D UINT64_C(0x4000000000000000); aBigger: sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 ); zExp =3D aExp; @@ -7382,12 +7382,12 @@ float128 float128_mul(float128 a, float128 b, float= _status *status) normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 ); } zExp =3D aExp + bExp - 0x4000; - aSig0 |=3D LIT64( 0x0001000000000000 ); + aSig0 |=3D UINT64_C(0x0001000000000000); shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 ); mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig= 3 ); add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 ); zSig2 |=3D ( zSig3 !=3D 0 ); - if ( LIT64( 0x0002000000000000 ) <=3D zSig0 ) { + if (UINT64_C( 0x0002000000000000) <=3D zSig0 ) { shift128ExtraRightJamming( zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 ); ++zExp; @@ -7454,9 +7454,9 @@ float128 float128_div(float128 a, float128 b, float_s= tatus *status) } zExp =3D aExp - bExp + 0x3FFD; shortShift128Left( - aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 ); + aSig0 | UINT64_C(0x0001000000000000), aSig1, 15, &aSig0, &aSig1 ); shortShift128Left( - bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 ); + bSig0 | UINT64_C(0x0001000000000000), bSig1, 15, &bSig0, &bSig1 ); if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) { shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 ); ++zExp; @@ -7532,14 +7532,14 @@ float128 float128_rem(float128 a, float128 b, float= _status *status) expDiff =3D aExp - bExp; if ( expDiff < -1 ) return a; shortShift128Left( - aSig0 | LIT64( 0x0001000000000000 ), + aSig0 | UINT64_C(0x0001000000000000), aSig1, 15 - ( expDiff < 0 ), &aSig0, &aSig1 ); shortShift128Left( - bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 ); + bSig0 | UINT64_C(0x0001000000000000), bSig1, 15, &bSig0, &bSig1 ); q =3D le128( bSig0, bSig1, aSig0, aSig1 ); if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 ); expDiff -=3D 64; @@ -7625,7 +7625,7 @@ float128 float128_sqrt(float128 a, float_status *stat= us) normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 ); } zExp =3D ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE; - aSig0 |=3D LIT64( 0x0001000000000000 ); + aSig0 |=3D UINT64_C(0x0001000000000000); zSig0 =3D estimateSqrt32( aExp, aSig0>>17 ); shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 ); zSig0 =3D estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 = ); @@ -8046,7 +8046,7 @@ float128 float128_scalbn(float128 a, int n, float_sta= tus *status) return a; } if (aExp !=3D 0) { - aSig0 |=3D LIT64( 0x0001000000000000 ); + aSig0 |=3D UINT64_C(0x0001000000000000); } else if (aSig0 =3D=3D 0 && aSig1 =3D=3D 0) { return a; } else { diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index c55aa6d1742..9a1d254a95b 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -616,13 +616,13 @@ static inline uint64_t estimateDiv128To64(uint64_t a0= , uint64_t a1, uint64_t b) uint64_t rem0, rem1, term0, term1; uint64_t z; =20 - if ( b <=3D a0 ) return LIT64( 0xFFFFFFFFFFFFFFFF ); + if ( b <=3D a0 ) return UINT64_C(0xFFFFFFFFFFFFFFFF); b0 =3D b>>32; - z =3D ( b0<<32 <=3D a0 ) ? LIT64( 0xFFFFFFFF00000000 ) : ( a0 / b0 )<<= 32; + z =3D ( b0<<32 <=3D a0 ) ? UINT64_C(0xFFFFFFFF00000000) : ( a0 / b0 )<= <32; mul64To128( b, z, &term0, &term1 ); sub128( a0, a1, term0, term1, &rem0, &rem1 ); while ( ( (int64_t) rem0 ) < 0 ) { - z -=3D LIT64( 0x100000000 ); + z -=3D UINT64_C(0x100000000); b1 =3D b<<32; add128( rem0, rem1, b0, b1, &rem0, &rem1 ); } --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1565700903; cv=none; d=zoho.com; s=zohoarc; b=PQgAfoW2BDvujv6hQ19GrMGMUFzUF6usEGXpgyT4Ge3pJHdyqB07RgPcYnk2JXM7Nt+GKyQzbqXX2O/rVELVMecZTG+zHrXCA0F+Vq5SLYtOySviehtGseSRbHFIZjKPItP/YvKS9gd2wnXsF70xBNvyjVJYIhBRtiafbmH/YiU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565700903; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=uKFfYLwGDxkhF+x/WRYO18ExbbxVDbTux4XTAAdRgok=; b=ZLl6/td3zawgzn60c6DzY47u5sLiW2RYtO4eor8hmyBpk15rymETJKCklIkeFWJBaELS0URKdDcN0wjFo4PjuVcSvxtB37w8uAveQDKfLnY94gsCbJxfjOIz30+5oJ4AQLoKZ3TGR243kT/dGyeXd5E4zFeN+kBDK3ju38/tguI= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565700903894142.95726791818697; Tue, 13 Aug 2019 05:55:03 -0700 (PDT) Received: from localhost ([::1]:52042 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWKN-0002IE-0D for importer@patchew.org; Tue, 13 Aug 2019 08:55:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53597) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWFO-0002Mg-Sa for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hxWFM-0000gf-Gh for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:54 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:33751) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hxWFM-0000fW-7c for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:52 -0400 Received: by mail-wm1-x344.google.com with SMTP id p77so1010318wme.0 for ; Tue, 13 Aug 2019 05:49:52 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id c12sm6541563wrx.46.2019.08.13.05.49.48 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 05:49:49 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::344 Subject: [Qemu-devel] [PATCH v3 06/13] target/m68k: replace LIT64 with UINT64_C macros X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Alex=20Benn=C3=A9e?= , armbru@redhat.com, Laurent Vivier Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) In our quest to eliminate the home rolled LIT64 macro we fixup usage inside for m68k's many constants. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- target/m68k/softfloat.c | 98 ++++++++++++++++++++--------------------- 1 file changed, 49 insertions(+), 49 deletions(-) diff --git a/target/m68k/softfloat.c b/target/m68k/softfloat.c index 591a6f1dcec..24c313ed690 100644 --- a/target/m68k/softfloat.c +++ b/target/m68k/softfloat.c @@ -26,7 +26,7 @@ =20 #define pi_exp 0x4000 #define piby2_exp 0x3FFF -#define pi_sig LIT64(0xc90fdaa22168c235) +#define pi_sig UINT64_C(0xc90fdaa22168c235) =20 static floatx80 propagateFloatx80NaNOneArg(floatx80 a, float_status *statu= s) { @@ -87,7 +87,7 @@ floatx80 floatx80_mod(floatx80 a, floatx80 b, float_statu= s *status) } normalizeFloatx80Subnormal(aSig0, &aExp, &aSig0); } - bSig |=3D LIT64(0x8000000000000000); + bSig |=3D UINT64_C(0x8000000000000000); zSign =3D aSign; expDiff =3D aExp - bExp; aSig1 =3D 0; @@ -289,7 +289,7 @@ floatx80 floatx80_move(floatx80 a, float_status *status) */ =20 #define one_exp 0x3FFF -#define one_sig LIT64(0x8000000000000000) +#define one_sig UINT64_C(0x8000000000000000) =20 /* * Function for compactifying extended double-precision floating point val= ues. @@ -373,7 +373,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *stat= us) k =3D aExp - 0x3FFF; fp1 =3D int32_to_floatx80(k, status); =20 - fSig =3D (aSig & LIT64(0xFE00000000000000)) | LIT64(0x010000000000= 0000); + fSig =3D (aSig & UINT64_C(0xFE00000000000000)) | UINT64_C(0x010000= 0000000000); j =3D (fSig >> 56) & 0x7E; /* DISPLACEMENT FOR 1/F */ =20 f =3D packFloatx80(0, 0x3FFF, fSig); /* F */ @@ -384,7 +384,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *stat= us) lp1cont1: /* LP1CONT1 */ fp0 =3D floatx80_mul(fp0, log_tbl[j], status); /* FP0 IS U =3D (Y-= F)/F */ - logof2 =3D packFloatx80(0, 0x3FFE, LIT64(0xB17217F7D1CF79AC)); + logof2 =3D packFloatx80(0, 0x3FFE, UINT64_C(0xB17217F7D1CF79AC)); klog2 =3D floatx80_mul(fp1, logof2, status); /* FP1 IS K*LOG2 */ fp2 =3D floatx80_mul(fp0, fp0, status); /* FP2 IS V=3DU*U */ =20 @@ -431,7 +431,7 @@ floatx80 floatx80_lognp1(floatx80 a, float_status *stat= us) } else if (compact < 0x3FFEF07D || compact > 0x3FFF8841) { /* |X| < 1/16 or |X| > -1/16 */ /* LP1CARE */ - fSig =3D (aSig & LIT64(0xFE00000000000000)) | LIT64(0x010000000000= 0000); + fSig =3D (aSig & UINT64_C(0xFE00000000000000)) | UINT64_C(0x010000= 0000000000); f =3D packFloatx80(0, 0x3FFF, fSig); /* F */ j =3D (fSig >> 56) & 0x7E; /* DISPLACEMENT FOR 1/F */ =20 @@ -562,7 +562,7 @@ floatx80 floatx80_logn(floatx80 a, float_status *status) k +=3D adjk; fp1 =3D int32_to_floatx80(k, status); =20 - fSig =3D (aSig & LIT64(0xFE00000000000000)) | LIT64(0x010000000000= 0000); + fSig =3D (aSig & UINT64_C(0xFE00000000000000)) | UINT64_C(0x010000= 0000000000); j =3D (fSig >> 56) & 0x7E; /* DISPLACEMENT FOR 1/F */ =20 f =3D packFloatx80(0, 0x3FFF, fSig); /* F */ @@ -572,7 +572,7 @@ floatx80 floatx80_logn(floatx80 a, float_status *status) =20 /* LP1CONT1 */ fp0 =3D floatx80_mul(fp0, log_tbl[j], status); /* FP0 IS U =3D (Y-= F)/F */ - logof2 =3D packFloatx80(0, 0x3FFE, LIT64(0xB17217F7D1CF79AC)); + logof2 =3D packFloatx80(0, 0x3FFE, UINT64_C(0xB17217F7D1CF79AC)); klog2 =3D floatx80_mul(fp1, logof2, status); /* FP1 IS K*LOG2 */ fp2 =3D floatx80_mul(fp0, fp0, status); /* FP2 IS V=3DU*U */ =20 @@ -712,7 +712,7 @@ floatx80 floatx80_log10(floatx80 a, float_status *statu= s) status->floatx80_rounding_precision =3D 80; =20 fp0 =3D floatx80_logn(a, status); - fp1 =3D packFloatx80(0, 0x3FFD, LIT64(0xDE5BD8A937287195)); /* INV_L10= */ + fp1 =3D packFloatx80(0, 0x3FFD, UINT64_C(0xDE5BD8A937287195)); /* INV_= L10 */ =20 status->float_rounding_mode =3D user_rnd_mode; status->floatx80_rounding_precision =3D user_rnd_prec; @@ -778,7 +778,7 @@ floatx80 floatx80_log2(floatx80 a, float_status *status) a =3D int32_to_floatx80(aExp - 0x3FFF, status); } else { fp0 =3D floatx80_logn(a, status); - fp1 =3D packFloatx80(0, 0x3FFF, LIT64(0xB8AA3B295C17F0BC)); /* INV= _L2 */ + fp1 =3D packFloatx80(0, 0x3FFF, UINT64_C(0xB8AA3B295C17F0BC)); /* = INV_L2 */ =20 status->float_rounding_mode =3D user_rnd_mode; status->floatx80_rounding_precision =3D user_rnd_prec; @@ -862,7 +862,7 @@ floatx80 floatx80_etox(floatx80 a, float_status *status) fp0 =3D floatx80_mul(fp0, float32_to_floatx80( make_float32(0xBC317218), status), status); /* N * L1, L1 =3D lead(-log2/64) */ - l2 =3D packFloatx80(0, 0x3FDC, LIT64(0x82E308654361C4C6)); + l2 =3D packFloatx80(0, 0x3FDC, UINT64_C(0x82E308654361C4C6)); fp2 =3D floatx80_mul(fp2, l2, status); /* N * L2, L1+L2 =3D -l= og2/64 */ fp0 =3D floatx80_add(fp0, fp1, status); /* X + N*L1 */ fp0 =3D floatx80_add(fp0, fp2, status); /* R */ @@ -1082,7 +1082,7 @@ floatx80 floatx80_twotox(floatx80 a, float_status *st= atus) make_float32(0x3C800000), status), status); /* (1/64)*N */ fp0 =3D floatx80_sub(fp0, fp1, status); /* X - (1/64)*INT(64 X) */ - fp2 =3D packFloatx80(0, 0x3FFE, LIT64(0xB17217F7D1CF79AC)); /* LOG= 2 */ + fp2 =3D packFloatx80(0, 0x3FFE, UINT64_C(0xB17217F7D1CF79AC)); /* = LOG2 */ fp0 =3D floatx80_mul(fp0, fp2, status); /* R */ =20 /* EXPR */ @@ -1233,11 +1233,11 @@ floatx80 floatx80_tentox(floatx80 a, float_status *= status) fp1 =3D floatx80_mul(fp1, float64_to_floatx80( make_float64(0x3F734413509F8000), status), status); /* N*(LOG2/64LOG10)_LEAD */ - fp3 =3D packFloatx80(1, 0x3FCD, LIT64(0xC0219DC1DA994FD2)); + fp3 =3D packFloatx80(1, 0x3FCD, UINT64_C(0xC0219DC1DA994FD2)); fp2 =3D floatx80_mul(fp2, fp3, status); /* N*(LOG2/64LOG10)_TRAIL = */ fp0 =3D floatx80_sub(fp0, fp1, status); /* X - N L_LEAD */ fp0 =3D floatx80_sub(fp0, fp2, status); /* X - N L_TRAIL */ - fp2 =3D packFloatx80(0, 0x4000, LIT64(0x935D8DDDAAA8AC17)); /* LOG= 10 */ + fp2 =3D packFloatx80(0, 0x4000, UINT64_C(0x935D8DDDAAA8AC17)); /* = LOG10 */ fp0 =3D floatx80_mul(fp0, fp2, status); /* R */ =20 /* EXPR */ @@ -1329,9 +1329,9 @@ floatx80 floatx80_tan(floatx80 a, float_status *statu= s) fp1 =3D packFloatx80(0, 0, 0); if (compact =3D=3D 0x7FFEFFFF) { twopi1 =3D packFloatx80(aSign ^ 1, 0x7FFE, - LIT64(0xC90FDAA200000000)); + UINT64_C(0xC90FDAA200000000)); twopi2 =3D packFloatx80(aSign ^ 1, 0x7FDC, - LIT64(0x85A308D300000000)); + UINT64_C(0x85A308D300000000)); fp0 =3D floatx80_add(fp0, twopi1, status); fp1 =3D fp0; fp0 =3D floatx80_add(fp0, twopi2, status); @@ -1350,9 +1350,9 @@ floatx80 floatx80_tan(floatx80 a, float_status *statu= s) endflag =3D 0; } invtwopi =3D packFloatx80(0, 0x3FFE - l, - LIT64(0xA2F9836E4E44152A)); /* INVTWOP= I */ - twopi1 =3D packFloatx80(0, 0x3FFF + l, LIT64(0xC90FDAA20000000= 0)); - twopi2 =3D packFloatx80(0, 0x3FDD + l, LIT64(0x85A308D30000000= 0)); + UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ + twopi1 =3D packFloatx80(0, 0x3FFF + l, UINT64_C(0xC90FDAA20000= 0000)); + twopi2 =3D packFloatx80(0, 0x3FDD + l, UINT64_C(0x85A308D30000= 0000)); =20 /* SIGN(INARG)*2^63 IN SGL */ twoto63 =3D packFloat32(xSign, 0xBE, 0); @@ -1415,17 +1415,17 @@ floatx80 floatx80_tan(floatx80 a, float_status *sta= tus) fp3 =3D floatx80_add(fp3, float64_to_floatx80( make_float64(0xBF346F59B39BA65F), status), status); /* Q3+SQ4 */ - fp4 =3D packFloatx80(0, 0x3FF6, LIT64(0xE073D3FC199C4A00)); + fp4 =3D packFloatx80(0, 0x3FF6, UINT64_C(0xE073D3FC199C4A00)); fp2 =3D floatx80_add(fp2, fp4, status); /* P2+SP3 */ fp3 =3D floatx80_mul(fp3, fp0, status); /* S(Q3+SQ4) */ fp2 =3D floatx80_mul(fp2, fp0, status); /* S(P2+SP3) */ - fp4 =3D packFloatx80(0, 0x3FF9, LIT64(0xD23CD68415D95FA1)); + fp4 =3D packFloatx80(0, 0x3FF9, UINT64_C(0xD23CD68415D95FA1)); fp3 =3D floatx80_add(fp3, fp4, status); /* Q2+S(Q3+SQ4) */ - fp4 =3D packFloatx80(1, 0x3FFC, LIT64(0x8895A6C5FB423BCA)); + fp4 =3D packFloatx80(1, 0x3FFC, UINT64_C(0x8895A6C5FB423BCA)); fp2 =3D floatx80_add(fp2, fp4, status); /* P1+S(P2+SP3) */ fp3 =3D floatx80_mul(fp3, fp0, status); /* S(Q2+S(Q3+SQ4)) */ fp2 =3D floatx80_mul(fp2, fp0, status); /* S(P1+S(P2+SP3)) */ - fp4 =3D packFloatx80(1, 0x3FFD, LIT64(0xEEF57E0DA84BC8CE)); + fp4 =3D packFloatx80(1, 0x3FFD, UINT64_C(0xEEF57E0DA84BC8CE)); fp3 =3D floatx80_add(fp3, fp4, status); /* Q1+S(Q2+S(Q3+SQ4)) = */ fp2 =3D floatx80_mul(fp2, fp1, status); /* RS(P1+S(P2+SP3)) */ fp0 =3D floatx80_mul(fp0, fp3, status); /* S(Q1+S(Q2+S(Q3+SQ4)= )) */ @@ -1459,17 +1459,17 @@ floatx80 floatx80_tan(floatx80 a, float_status *sta= tus) fp3 =3D floatx80_add(fp3, float64_to_floatx80( make_float64(0xBF346F59B39BA65F), status), status); /* Q3+SQ4 */ - fp4 =3D packFloatx80(0, 0x3FF6, LIT64(0xE073D3FC199C4A00)); + fp4 =3D packFloatx80(0, 0x3FF6, UINT64_C(0xE073D3FC199C4A00)); fp2 =3D floatx80_add(fp2, fp4, status); /* P2+SP3 */ fp3 =3D floatx80_mul(fp3, fp1, status); /* S(Q3+SQ4) */ fp2 =3D floatx80_mul(fp2, fp1, status); /* S(P2+SP3) */ - fp4 =3D packFloatx80(0, 0x3FF9, LIT64(0xD23CD68415D95FA1)); + fp4 =3D packFloatx80(0, 0x3FF9, UINT64_C(0xD23CD68415D95FA1)); fp3 =3D floatx80_add(fp3, fp4, status); /* Q2+S(Q3+SQ4) */ - fp4 =3D packFloatx80(1, 0x3FFC, LIT64(0x8895A6C5FB423BCA)); + fp4 =3D packFloatx80(1, 0x3FFC, UINT64_C(0x8895A6C5FB423BCA)); fp2 =3D floatx80_add(fp2, fp4, status); /* P1+S(P2+SP3) */ fp3 =3D floatx80_mul(fp3, fp1, status); /* S(Q2+S(Q3+SQ4)) */ fp2 =3D floatx80_mul(fp2, fp1, status); /* S(P1+S(P2+SP3)) */ - fp4 =3D packFloatx80(1, 0x3FFD, LIT64(0xEEF57E0DA84BC8CE)); + fp4 =3D packFloatx80(1, 0x3FFD, UINT64_C(0xEEF57E0DA84BC8CE)); fp3 =3D floatx80_add(fp3, fp4, status); /* Q1+S(Q2+S(Q3+SQ4)) = */ fp2 =3D floatx80_mul(fp2, fp0, status); /* RS(P1+S(P2+SP3)) */ fp1 =3D floatx80_mul(fp1, fp3, status); /* S(Q1+S(Q2+S(Q3+SQ4)= )) */ @@ -1539,9 +1539,9 @@ floatx80 floatx80_sin(floatx80 a, float_status *statu= s) fp1 =3D packFloatx80(0, 0, 0); if (compact =3D=3D 0x7FFEFFFF) { twopi1 =3D packFloatx80(aSign ^ 1, 0x7FFE, - LIT64(0xC90FDAA200000000)); + UINT64_C(0xC90FDAA200000000)); twopi2 =3D packFloatx80(aSign ^ 1, 0x7FDC, - LIT64(0x85A308D300000000)); + UINT64_C(0x85A308D300000000)); fp0 =3D floatx80_add(fp0, twopi1, status); fp1 =3D fp0; fp0 =3D floatx80_add(fp0, twopi2, status); @@ -1560,9 +1560,9 @@ floatx80 floatx80_sin(floatx80 a, float_status *statu= s) endflag =3D 0; } invtwopi =3D packFloatx80(0, 0x3FFE - l, - LIT64(0xA2F9836E4E44152A)); /* INVTWOP= I */ - twopi1 =3D packFloatx80(0, 0x3FFF + l, LIT64(0xC90FDAA20000000= 0)); - twopi2 =3D packFloatx80(0, 0x3FDD + l, LIT64(0x85A308D30000000= 0)); + UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ + twopi1 =3D packFloatx80(0, 0x3FFF + l, UINT64_C(0xC90FDAA20000= 0000)); + twopi2 =3D packFloatx80(0, 0x3FDD + l, UINT64_C(0x85A308D30000= 0000)); =20 /* SIGN(INARG)*2^63 IN SGL */ twoto63 =3D packFloat32(xSign, 0xBE, 0); @@ -1650,11 +1650,11 @@ floatx80 floatx80_sin(floatx80 a, float_status *sta= tus) fp2 =3D floatx80_add(fp2, float64_to_floatx80( make_float64(0x3EFA01A01A01D423), status), status); /* B4+T(B6+TB8) */ - fp4 =3D packFloatx80(1, 0x3FF5, LIT64(0xB60B60B60B61D438)); + fp4 =3D packFloatx80(1, 0x3FF5, UINT64_C(0xB60B60B60B61D438)); fp3 =3D floatx80_add(fp3, fp4, status); /* B3+T(B5+TB7) */ fp2 =3D floatx80_mul(fp2, fp1, status); /* T(B4+T(B6+TB8)) */ fp1 =3D floatx80_mul(fp1, fp3, status); /* T(B3+T(B5+TB7)) */ - fp4 =3D packFloatx80(0, 0x3FFA, LIT64(0xAAAAAAAAAAAAAB5E)); + fp4 =3D packFloatx80(0, 0x3FFA, UINT64_C(0xAAAAAAAAAAAAAB5E)); fp2 =3D floatx80_add(fp2, fp4, status); /* B2+T(B4+T(B6+TB8)) = */ fp1 =3D floatx80_add(fp1, float32_to_floatx80( make_float32(0xBF000000), status), @@ -1702,11 +1702,11 @@ floatx80 floatx80_sin(floatx80 a, float_status *sta= tus) fp3 =3D floatx80_add(fp3, float64_to_floatx80( make_float64(0xBF2A01A01A018B59), status), status); /* A3+T(A5+TA7) */ - fp4 =3D packFloatx80(0, 0x3FF8, LIT64(0x88888888888859AF)); + fp4 =3D packFloatx80(0, 0x3FF8, UINT64_C(0x88888888888859AF)); fp2 =3D floatx80_add(fp2, fp4, status); /* A2+T(A4+TA6) */ fp1 =3D floatx80_mul(fp1, fp3, status); /* T(A3+T(A5+TA7)) */ fp2 =3D floatx80_mul(fp2, fp0, status); /* S(A2+T(A4+TA6)) */ - fp4 =3D packFloatx80(1, 0x3FFC, LIT64(0xAAAAAAAAAAAAAA99)); + fp4 =3D packFloatx80(1, 0x3FFC, UINT64_C(0xAAAAAAAAAAAAAA99)); fp1 =3D floatx80_add(fp1, fp4, status); /* A1+T(A3+T(A5+TA7)) = */ fp1 =3D floatx80_add(fp1, fp2, status); /* [A1+T(A3+T(A5+TA7))]+ @@ -1778,9 +1778,9 @@ floatx80 floatx80_cos(floatx80 a, float_status *statu= s) fp1 =3D packFloatx80(0, 0, 0); if (compact =3D=3D 0x7FFEFFFF) { twopi1 =3D packFloatx80(aSign ^ 1, 0x7FFE, - LIT64(0xC90FDAA200000000)); + UINT64_C(0xC90FDAA200000000)); twopi2 =3D packFloatx80(aSign ^ 1, 0x7FDC, - LIT64(0x85A308D300000000)); + UINT64_C(0x85A308D300000000)); fp0 =3D floatx80_add(fp0, twopi1, status); fp1 =3D fp0; fp0 =3D floatx80_add(fp0, twopi2, status); @@ -1799,9 +1799,9 @@ floatx80 floatx80_cos(floatx80 a, float_status *statu= s) endflag =3D 0; } invtwopi =3D packFloatx80(0, 0x3FFE - l, - LIT64(0xA2F9836E4E44152A)); /* INVTWOP= I */ - twopi1 =3D packFloatx80(0, 0x3FFF + l, LIT64(0xC90FDAA20000000= 0)); - twopi2 =3D packFloatx80(0, 0x3FDD + l, LIT64(0x85A308D30000000= 0)); + UINT64_C(0xA2F9836E4E44152A)); /* INVT= WOPI */ + twopi1 =3D packFloatx80(0, 0x3FFF + l, UINT64_C(0xC90FDAA20000= 0000)); + twopi2 =3D packFloatx80(0, 0x3FDD + l, UINT64_C(0x85A308D30000= 0000)); =20 /* SIGN(INARG)*2^63 IN SGL */ twoto63 =3D packFloat32(xSign, 0xBE, 0); @@ -1890,11 +1890,11 @@ floatx80 floatx80_cos(floatx80 a, float_status *sta= tus) fp2 =3D floatx80_add(fp2, float64_to_floatx80( make_float64(0x3EFA01A01A01D423), status), status); /* B4+T(B6+TB8) */ - fp4 =3D packFloatx80(1, 0x3FF5, LIT64(0xB60B60B60B61D438)); + fp4 =3D packFloatx80(1, 0x3FF5, UINT64_C(0xB60B60B60B61D438)); fp3 =3D floatx80_add(fp3, fp4, status); /* B3+T(B5+TB7) */ fp2 =3D floatx80_mul(fp2, fp1, status); /* T(B4+T(B6+TB8)) */ fp1 =3D floatx80_mul(fp1, fp3, status); /* T(B3+T(B5+TB7)) */ - fp4 =3D packFloatx80(0, 0x3FFA, LIT64(0xAAAAAAAAAAAAAB5E)); + fp4 =3D packFloatx80(0, 0x3FFA, UINT64_C(0xAAAAAAAAAAAAAB5E)); fp2 =3D floatx80_add(fp2, fp4, status); /* B2+T(B4+T(B6+TB8)) = */ fp1 =3D floatx80_add(fp1, float32_to_floatx80( make_float32(0xBF000000), status), @@ -1941,11 +1941,11 @@ floatx80 floatx80_cos(floatx80 a, float_status *sta= tus) fp3 =3D floatx80_add(fp3, float64_to_floatx80( make_float64(0xBF2A01A01A018B59), status), status); /* A3+T(A5+TA7) */ - fp4 =3D packFloatx80(0, 0x3FF8, LIT64(0x88888888888859AF)); + fp4 =3D packFloatx80(0, 0x3FF8, UINT64_C(0x88888888888859AF)); fp2 =3D floatx80_add(fp2, fp4, status); /* A2+T(A4+TA6) */ fp1 =3D floatx80_mul(fp1, fp3, status); /* T(A3+T(A5+TA7)) */ fp2 =3D floatx80_mul(fp2, fp0, status); /* S(A2+T(A4+TA6)) */ - fp4 =3D packFloatx80(1, 0x3FFC, LIT64(0xAAAAAAAAAAAAAA99)); + fp4 =3D packFloatx80(1, 0x3FFC, UINT64_C(0xAAAAAAAAAAAAAA99)); fp1 =3D floatx80_add(fp1, fp4, status); /* A1+T(A3+T(A5+TA7)) = */ fp1 =3D floatx80_add(fp1, fp2, status); /* [A1+T(A3+T(A5+TA7))]+[S(A2+T(A4+TA6= ))] */ @@ -2114,8 +2114,8 @@ floatx80 floatx80_atan(floatx80 a, float_status *stat= us) } } } else { - aSig &=3D LIT64(0xF800000000000000); - aSig |=3D LIT64(0x0400000000000000); + aSig &=3D UINT64_C(0xF800000000000000); + aSig |=3D UINT64_C(0x0400000000000000); xsave =3D packFloatx80(aSign, aExp, aSig); /* F */ fp0 =3D a; fp1 =3D a; /* X */ @@ -2430,7 +2430,7 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *st= atus) fp0 =3D floatx80_mul(fp0, float32_to_floatx80( make_float32(0xBC317218), status), status); /* N * L1, L1 =3D lead(-log2/64) */ - l2 =3D packFloatx80(0, 0x3FDC, LIT64(0x82E308654361C4C6)); + l2 =3D packFloatx80(0, 0x3FDC, UINT64_C(0x82E308654361C4C6)); fp2 =3D floatx80_mul(fp2, l2, status); /* N * L2, L1+L2 =3D -l= og2/64 */ fp0 =3D floatx80_add(fp0, fp1, status); /* X + N*L1 */ fp0 =3D floatx80_add(fp0, fp2, status); /* R */ @@ -2562,7 +2562,7 @@ floatx80 floatx80_etoxm1(floatx80 a, float_status *st= atus) fp2 =3D floatx80_add(fp2, float64_to_floatx80( make_float64(0x3FA5555555555555), status), status); /* B3 */ - fp3 =3D packFloatx80(0, 0x3FFC, LIT64(0xAAAAAAAAAAAAAAAB)); + fp3 =3D packFloatx80(0, 0x3FFC, UINT64_C(0xAAAAAAAAAAAAAAAB)); fp1 =3D floatx80_add(fp1, fp3, status); /* B2 */ fp2 =3D floatx80_mul(fp2, fp0, status); fp1 =3D floatx80_mul(fp1, fp0, status); --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1565700756; cv=none; d=zoho.com; s=zohoarc; b=La5Wc3sploC2MdE7zUxjeSQZAhpscbCjovKCWEEoxq7lH46vlXC7sq2v2vWvR8+AiVlKwu+5EWicxzGbnbibCur2QdkoIpy0KHUOD9f53Hc1+4BLKMGLrqhu6+TvhB5JAKUpHqGTUh625vsF933RvO8qrezt7jvzW04YPtvxvhs= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; 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X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH v3 07/13] fpu: remove the LIT64 macro X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Alex=20Benn=C3=A9e?= , armbru@redhat.com, Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Now the rest of the code has been cleaned up we can remove this. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson --- include/fpu/softfloat.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 3ff3fa52245..d9333eb65b8 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -82,8 +82,6 @@ this code that are retained. #ifndef SOFTFLOAT_H #define SOFTFLOAT_H =20 -#define LIT64( a ) a##LL - /*------------------------------------------------------------------------= ---- | Software IEC/IEEE floating-point ordering relations *-------------------------------------------------------------------------= ---*/ --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1565700861; cv=none; d=zoho.com; s=zohoarc; b=UXmydulBVio4Ejl2kINOa9Vo3DF59jaGIvwk18euhkAsvIPvbXk+ZxrbDxJljjWV27U3Og1RS2Wq3gx2bv9AWKCtIUzwh9uK5a4899gfty6FGgAUmYWhO2kS2UAc5LZWSFCKupZE8GgJjgX+j0RKf3aWI/uYywR8bKagG6kfwuM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565700861; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=/yOiUc7McAJurUllCeBlwbQ9U0BZqqFm4utO3aBw4R0=; b=nlLOOrpmKl/R+djFPIbXpk7wyMJ3/xqRfLGVvznoz4GuVQnGiJ+3w57C0hKcUCeDLrN5l7FeqfdBcEjapCyM7emEY+Wch8Q0z/Mk9y4AlbFGivZN6cUKwRbl+fzuxszw2MZ0dGE/+2REOdhKSd9jZHvMN9SYdlp+7T6RAyIdg3A= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565700861814793.2822119383349; Tue, 13 Aug 2019 05:54:21 -0700 (PDT) Received: from localhost ([::1]:52036 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWJg-0001TH-V5 for importer@patchew.org; Tue, 13 Aug 2019 08:54:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53624) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWFQ-0002Rq-Eq for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hxWFO-0000jL-Sv for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:56 -0400 Received: from mail-wm1-x32a.google.com ([2a00:1450:4864:20::32a]:33514) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hxWFO-0000iQ-M9 for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:54 -0400 Received: by mail-wm1-x32a.google.com with SMTP id p77so1010401wme.0 for ; Tue, 13 Aug 2019 05:49:54 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id u130sm2417719wmg.28.2019.08.13.05.49.48 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 05:49:50 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::32a Subject: [Qemu-devel] [PATCH v3 08/13] fpu: move inline helpers into a separate header X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , armbru@redhat.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) There are a bunch of users of the inline helpers who do not need access to the entire softfloat API. Move those inline helpers into a new header file which can be included without bringing in the rest of the world. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- v2 - don't squash up quite so much --- include/fpu/softfloat-helpers.h | 132 ++++++++++++++++++++++++++++++++ include/fpu/softfloat.h | 63 +-------------- 2 files changed, 133 insertions(+), 62 deletions(-) create mode 100644 include/fpu/softfloat-helpers.h diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helper= s.h new file mode 100644 index 00000000000..e0baf24c8f5 --- /dev/null +++ b/include/fpu/softfloat-helpers.h @@ -0,0 +1,132 @@ +/* + * QEMU float support - standalone helpers + * + * This is provided for files that don't need the access to the full + * set of softfloat functions. Typically this is cpu initialisation + * code which wants to set default rounding and exceptions modes. + * + * The code in this source file is derived from release 2a of the SoftFloat + * IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and + * some later contributions) are provided under that license, as detailed = below. + * It has subsequently been modified by contributors to the QEMU Project, + * so some portions are provided under: + * the SoftFloat-2a license + * the BSD license + * GPL-v2-or-later + * + * Any future contributions to this file after December 1st 2014 will be + * taken to be licensed under the Softfloat-2a license unless specifically + * indicated otherwise. + */ + +/* +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +This C header file is part of the SoftFloat IEC/IEEE Floating-point +Arithmetic Package, Release 2a. + +Written by John R. Hauser. This work was made possible in part by the +International Computer Science Institute, located at Suite 600, 1947 Center +Street, Berkeley, California 94704. Funding was partially provided by the +National Science Foundation under grant MIP-9311980. The original version +of this code was written as part of a project to build a fixed-point vector +processor in collaboration with the University of California at Berkeley, +overseen by Profs. Nelson Morgan and John Wawrzynek. More information +is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/ +arithmetic/SoftFloat.html'. + +THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort +has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT +TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO +PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY +AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE. + +Derivative works are acceptable, even for commercial purposes, so long as +(1) they include prominent notice that the work is derivative, and (2) they +include prominent notice akin to these four paragraphs for those parts of +this code that are retained. + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D +*/ + +#ifndef _SOFTFLOAT_HELPERS_H_ +#define _SOFTFLOAT_HELPERS_H_ + +#include "fpu/softfloat-types.h" + +static inline void set_float_detect_tininess(int val, float_status *status) +{ + status->float_detect_tininess =3D val; +} + +static inline void set_float_rounding_mode(int val, float_status *status) +{ + status->float_rounding_mode =3D val; +} + +static inline void set_float_exception_flags(int val, float_status *status) +{ + status->float_exception_flags =3D val; +} + +static inline void set_floatx80_rounding_precision(int val, + float_status *status) +{ + status->floatx80_rounding_precision =3D val; +} + +static inline void set_flush_to_zero(flag val, float_status *status) +{ + status->flush_to_zero =3D val; +} + +static inline void set_flush_inputs_to_zero(flag val, float_status *status) +{ + status->flush_inputs_to_zero =3D val; +} + +static inline void set_default_nan_mode(flag val, float_status *status) +{ + status->default_nan_mode =3D val; +} + +static inline void set_snan_bit_is_one(flag val, float_status *status) +{ + status->snan_bit_is_one =3D val; +} + +static inline int get_float_detect_tininess(float_status *status) +{ + return status->float_detect_tininess; +} + +static inline int get_float_rounding_mode(float_status *status) +{ + return status->float_rounding_mode; +} + +static inline int get_float_exception_flags(float_status *status) +{ + return status->float_exception_flags; +} + +static inline int get_floatx80_rounding_precision(float_status *status) +{ + return status->floatx80_rounding_precision; +} + +static inline flag get_flush_to_zero(float_status *status) +{ + return status->flush_to_zero; +} + +static inline flag get_flush_inputs_to_zero(float_status *status) +{ + return status->flush_inputs_to_zero; +} + +static inline flag get_default_nan_mode(float_status *status) +{ + return status->default_nan_mode; +} + +#endif /* _SOFTFLOAT_HELPERS_H_ */ diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index d9333eb65b8..ecb8ba01149 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -93,68 +93,7 @@ enum { }; =20 #include "fpu/softfloat-types.h" - -static inline void set_float_detect_tininess(int val, float_status *status) -{ - status->float_detect_tininess =3D val; -} -static inline void set_float_rounding_mode(int val, float_status *status) -{ - status->float_rounding_mode =3D val; -} -static inline void set_float_exception_flags(int val, float_status *status) -{ - status->float_exception_flags =3D val; -} -static inline void set_floatx80_rounding_precision(int val, - float_status *status) -{ - status->floatx80_rounding_precision =3D val; -} -static inline void set_flush_to_zero(flag val, float_status *status) -{ - status->flush_to_zero =3D val; -} -static inline void set_flush_inputs_to_zero(flag val, float_status *status) -{ - status->flush_inputs_to_zero =3D val; -} -static inline void set_default_nan_mode(flag val, float_status *status) -{ - status->default_nan_mode =3D val; -} -static inline void set_snan_bit_is_one(flag val, float_status *status) -{ - status->snan_bit_is_one =3D val; -} -static inline int get_float_detect_tininess(float_status *status) -{ - return status->float_detect_tininess; -} -static inline int get_float_rounding_mode(float_status *status) -{ - return status->float_rounding_mode; -} -static inline int get_float_exception_flags(float_status *status) -{ - return status->float_exception_flags; -} -static inline int get_floatx80_rounding_precision(float_status *status) -{ - return status->floatx80_rounding_precision; -} -static inline flag get_flush_to_zero(float_status *status) -{ - return status->flush_to_zero; -} -static inline flag get_flush_inputs_to_zero(float_status *status) -{ - return status->flush_inputs_to_zero; -} -static inline flag get_default_nan_mode(float_status *status) -{ - return status->default_nan_mode; -} +#include "fpu/softfloat-helpers.h" =20 /*------------------------------------------------------------------------= ---- | Routine to raise any or all of the software IEC/IEEE floating-point --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH v3 09/13] fpu: make softfloat-macros "self-contained" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , armbru@redhat.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The macros use the "flags" type and to be consistent if anyone just needs the macros we should bring in the header we need. There is an outstanding TODO to audit the use of "flags" and replace with bool at which point this include could be dropped. Signed-off-by: Alex Benn=C3=A9e Acked-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- include/fpu/softfloat-macros.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/fpu/softfloat-macros.h b/include/fpu/softfloat-macros.h index 9a1d254a95b..605c4f4bc62 100644 --- a/include/fpu/softfloat-macros.h +++ b/include/fpu/softfloat-macros.h @@ -82,6 +82,8 @@ this code that are retained. #ifndef FPU_SOFTFLOAT_MACROS_H #define FPU_SOFTFLOAT_MACROS_H =20 +#include "fpu/softfloat-types.h" + /*------------------------------------------------------------------------= ---- | Shifts `a' right by the number of bits given in `count'. If any nonzero | bits are shifted off, they are ``jammed'' into the least significant bit= of --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1565700760; cv=none; d=zoho.com; s=zohoarc; b=HIn9nyUlE33xD0wxqOSlCIS+SYsHHHZ6o5+LTWMDqCT5xCH/I2M6Sr01OgaBdf0CeE8U8jzPfZw5F8kPj7OIfNlbkmMYe8YbrYC2Nw1OxrVGJS4BlQHyVlyUewWFSSZ/h5ANKSj46ysHNa482YcYHDnR14k5hu0L76W/UV70EY0= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565700760; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=7gMIeXb33bJiJJ2wC99NJRgf91T+h2agcGiVoSf4NFI=; b=S87CXrdBGbnmMEqpFi9eKSCmHByRqmP8/uZp5oNm46D+wcMPesTp8MaCAthhhw5CLz9PZHKy4/kocsQqgF7cy/75ufVV9m+j/nmI04GTq3YUAIAvD5Kq+gf9BGpRVT1nnHwUq0UEufeYGjEuWhWSgDfX91umNMzs+Psp9ABXaHc= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565700760127926.4405081460167; Tue, 13 Aug 2019 05:52:40 -0700 (PDT) Received: from localhost ([::1]:52016 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWI2-0007FN-89 for importer@patchew.org; Tue, 13 Aug 2019 08:52:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53641) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWFR-0002Ts-1C for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hxWFQ-0000l1-1m for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:56 -0400 Received: from mail-wm1-x341.google.com ([2a00:1450:4864:20::341]:34626) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hxWFP-0000k9-S8 for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:56 -0400 Received: by mail-wm1-x341.google.com with SMTP id e8so1009716wme.1 for ; Tue, 13 Aug 2019 05:49:55 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id x20sm236796612wrg.10.2019.08.13.05.49.49 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 05:49:51 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH v3 10/13] fpu: rename softfloat-specialize.h -> .inc.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Richard Henderson , armbru@redhat.com, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) This is not a normal header and should only be included in the main softfloat.c file to bring in the various target specific specialisations. Indeed as it contains non-inlined C functions it is not even a legal header. Rename it to match our included C convention. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- fpu/{softfloat-specialize.h =3D> softfloat-specialize.inc.c} | 0 fpu/softfloat.c | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename fpu/{softfloat-specialize.h =3D> softfloat-specialize.inc.c} (100%) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.inc.c similarity index 100% rename from fpu/softfloat-specialize.h rename to fpu/softfloat-specialize.inc.c diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 6bf6241710f..6e98fee48a3 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -634,7 +634,7 @@ static inline float64 float64_pack_raw(FloatParts p) | are propagated from function inputs to output. These details are target- | specific. *-------------------------------------------------------------------------= ---*/ -#include "softfloat-specialize.h" +#include "softfloat-specialize.inc.c" =20 /* Canonicalize EXP and FRAC, setting CLS. */ static FloatParts sf_canonicalize(FloatParts part, const FloatFmt *parm, --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1565700987; cv=none; d=zoho.com; s=zohoarc; b=PiJ0OZtIFnz7tMjib2RAvNiUsHdolbPuTiivBA0R5zPOVBCmgg6ZmUR596G07IcpnEWHMr22HH/NbD3f2ZXx5Tupmmp2LVI2hJfLjUydcfcn5a7vp43DmZxgLtneJr9EKCD8IA13EN0lsk5Rqw/JC2Z4SBhyRBh8MaVqWCX94Hc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565700987; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=QYZVLqPYl6pnjsRFn6Oub/1aC6o37OYgX2iWEIUf99Q=; b=he+Wv0iQ0ZXL0+SI+GpsbeXkeQb1DEpexaJC0d4aTh/+H6UVvRZM0YMEjpmzwxMO4to7wOb2Co86gj0fUsfVVkrMsOuz2avzeth9GjGnIO0a6k3BJdyBvN0nJ4zWOiTLYKHlYF1sgFLShYsXO5xBD91lS4jowRv2i1p3/xy1BFA= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565700987501317.2097878482116; Tue, 13 Aug 2019 05:56:27 -0700 (PDT) Received: from localhost ([::1]:52060 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWLb-0003vR-6g for importer@patchew.org; Tue, 13 Aug 2019 08:56:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53665) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWFR-0002WU-UG for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hxWFQ-0000lv-OF for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:57 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:54117) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hxWFQ-0000ko-Hx for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:56 -0400 Received: by mail-wm1-x343.google.com with SMTP id 10so1391999wmp.3 for ; Tue, 13 Aug 2019 05:49:56 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id p7sm1440391wmh.38.2019.08.13.05.49.49 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 05:49:52 -0700 (PDT) Received: from zen.linaroharston. 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X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH v3 11/13] target/mips: rationalise softfloat includes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Rikalo , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Riku Voipio , armbru@redhat.com, Laurent Vivier , Aleksandar Markovic , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We should avoid including the whole of softfloat headers in cpu.h and explicitly include it only where we will be calling softfloat functions. We can use the -types.h in cpu.h for the few bits that are global. We also move the restore_snan_bit_mode into internal.h and include -helpers.h there. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Aleksandar Markovic --- v2 - move restore_snan_bit_mode to internal.h --- linux-user/mips/cpu_loop.c | 1 + target/mips/cpu.h | 8 +------- target/mips/internal.h | 7 +++++++ target/mips/msa_helper.c | 1 + target/mips/op_helper.c | 1 + 5 files changed, 11 insertions(+), 7 deletions(-) diff --git a/linux-user/mips/cpu_loop.c b/linux-user/mips/cpu_loop.c index 0ba894fa7aa..39915b3fde2 100644 --- a/linux-user/mips/cpu_loop.c +++ b/linux-user/mips/cpu_loop.c @@ -22,6 +22,7 @@ #include "qemu.h" #include "cpu_loop-common.h" #include "elf.h" +#include "internal.h" =20 # ifdef TARGET_ABI_MIPSO32 # define MIPS_SYS(name, args) args, diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 21c0615e020..d235117dab3 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -5,7 +5,7 @@ =20 #include "cpu-qom.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" +#include "fpu/softfloat-types.h" #include "mips-defs.h" =20 #define TCG_GUEST_DEFAULT_MO (0) @@ -1195,12 +1195,6 @@ void itc_reconfigure(struct MIPSITUState *tag); /* helper.c */ target_ulong exception_resume_pc(CPUMIPSState *env); =20 -static inline void restore_snan_bit_mode(CPUMIPSState *env) -{ - set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) =3D= =3D 0, - &env->active_fpu.fp_status); -} - static inline void cpu_get_tb_cpu_state(CPUMIPSState *env, target_ulong *p= c, target_ulong *cs_base, uint32_t *f= lags) { diff --git a/target/mips/internal.h b/target/mips/internal.h index b2b41a51ab4..49a7a7d8f56 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -7,6 +7,7 @@ #ifndef MIPS_INTERNAL_H #define MIPS_INTERNAL_H =20 +#include "fpu/softfloat-helpers.h" =20 /* MMU types, the first four entries have the same layout as the CP0C0_MT field. */ @@ -226,6 +227,12 @@ static inline void restore_flush_mode(CPUMIPSState *en= v) &env->active_fpu.fp_status); } =20 +static inline void restore_snan_bit_mode(CPUMIPSState *env) +{ + set_snan_bit_is_one((env->active_fpu.fcr31 & (1 << FCR31_NAN2008)) =3D= =3D 0, + &env->active_fpu.fp_status); +} + static inline void restore_fp_status(CPUMIPSState *env) { restore_rounding_mode(env); diff --git a/target/mips/msa_helper.c b/target/mips/msa_helper.c index a5a86572b4a..f24061e2af7 100644 --- a/target/mips/msa_helper.c +++ b/target/mips/msa_helper.c @@ -22,6 +22,7 @@ #include "internal.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" =20 /* Data format min and max values */ #define DF_BITS(df) (1 << ((df) + 3)) diff --git a/target/mips/op_helper.c b/target/mips/op_helper.c index 9e2e02f8586..f88a3ab9043 100644 --- a/target/mips/op_helper.c +++ b/target/mips/op_helper.c @@ -25,6 +25,7 @@ #include "exec/exec-all.h" #include "exec/cpu_ldst.h" #include "sysemu/kvm.h" +#include "fpu/softfloat.h" =20 /*************************************************************************= ****/ /* Exceptions processing helpers */ --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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(localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 067901FF9B; Tue, 13 Aug 2019 13:49:48 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NhU5Jn6aRhUkVeAxdLRNRjvBS88J8AMxyLyTZHIDgUs=; b=y34tfAgMEXrAcjHKNjsPdgKQTfH4+EMkXrl+0P4gcDAmKfiXmOEcpIcehyAwQiPxp/ WuWKU7QdLHUMGPAPruPWDyjNcmkDFubxKNhV3Tfug6SccpAEgZ2Cub3lCkKagPkTkBDE Oak67/25MeG626YoiU5eV93gat2u6JVg6RsyShIAHxSTQYIs72BRdRQ5zMH59SQyFVKA Y2U1gLfUW1KAhZYFBxrVR+l3EFUSk9mKGRBuNP5YV8K7i4wD8Xs185hCQ3lpgNwfQ48C D7js1P9qjLGmwyEUD3h/t/TAdPlRuVnfIcM4szBqjCBC/wwe1+B/QAbfnF6N5991mxER 2g9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NhU5Jn6aRhUkVeAxdLRNRjvBS88J8AMxyLyTZHIDgUs=; b=H8i6G4nFBjOODn7ezSuJYRyzp6iWD4ytLgA5tSJpBUPWaO6FhxhBZmxm5GeyEntqGH HaSoniplv4sELDWc+n68WwtoMU+e1ttUvcTR1CSKp1OlE2CgceCTg3a9GooXR4xeqUGb 3nAXKnq0ZrMjDJbe63oTJoUQWRCM8UpTYYh03U7BHTST5SfhxHfM1UTu2In2zO2rdqvQ Rn2AsWv7tLJmdulDcv1AtqnT4RNT19LwkUq3FiKQMxrBOKN3j3CXj5TH3bfHSI4nHtc0 xyMXIz06GQByalO4lHjXNQvHCxJDGHLzRhE674XZR9yeuR0T8NrH19NDJAKhkF3je6Z6 Zmvg== X-Gm-Message-State: APjAAAWRjtyr8KPuUrVzmtR6eIHMdJcc+z67hClSV74hKq2t2XcXr0lx tg9bR3vhlVdB5f9hXaf7xsgC8Q== X-Google-Smtp-Source: APXvYqwmAf6c6Jqe1j2TM6xrZp3G0tCkAl3u7jBxvAlDJcddN0VIeRSucCSg7gcV+RhflhVmEgLOiw== X-Received: by 2002:a05:600c:207:: with SMTP id 7mr2950991wmi.146.1565701019569; Tue, 13 Aug 2019 05:56:59 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Tue, 13 Aug 2019 13:49:45 +0100 Message-Id: <20190813124946.25322-13-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190813124946.25322-1-alex.bennee@linaro.org> References: <20190813124946.25322-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 Subject: [Qemu-devel] [PATCH v3 12/13] target/riscv: rationalise softfloat includes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , Palmer Dabbelt , Richard Henderson , armbru@redhat.com, Alistair Francis , =?UTF-8?q?Alex=20Benn=C3=A9e?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) We should avoid including the whole of softfloat headers in cpu.h and explicitly include it only where we will be calling softfloat functions. We can use the -types.h and -helpers.h in cpu.h for the few bits that are global. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/riscv/cpu.c | 1 + target/riscv/cpu.h | 2 +- target/riscv/fpu_helper.c | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f8d07bd20ad..6d52f97d7c3 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -27,6 +27,7 @@ #include "qemu/error-report.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "fpu/softfloat-helpers.h" =20 /* RISC-V CPU definitions */ =20 diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 0adb307f329..240b31e2ebb 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -22,7 +22,7 @@ =20 #include "qom/cpu.h" #include "exec/cpu-defs.h" -#include "fpu/softfloat.h" +#include "fpu/softfloat-types.h" =20 #define TCG_GUEST_DEFAULT_MO 0 =20 diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c index b4f818a6465..0b79562a690 100644 --- a/target/riscv/fpu_helper.c +++ b/target/riscv/fpu_helper.c @@ -21,6 +21,7 @@ #include "qemu/host-utils.h" #include "exec/exec-all.h" #include "exec/helper-proto.h" +#include "fpu/softfloat.h" =20 target_ulong riscv_cpu_get_fflags(CPURISCVState *env) { --=20 2.20.1 From nobody Thu Mar 28 21:24:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1565701101; cv=none; d=zoho.com; s=zohoarc; b=kZFEQH46bemAmQI1hZ1PgYc5JlVHLmji8+uVLXhJsQs/aGHpE95uFcoko9tJjvo01m5BTQBp4zFRXKcpGB9Bwb/1z6tmdZnfbXN5aoXs3KQI++h2DdBRFag2zaYObDxAy2YltKk148YYoNnHzBG3NIT1B/N9lukmSDXqb918/OI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565701101; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=NoY4fxuwSw4w5d0A97p1qZBRlAujfMxBHOYoRwMXm8I=; b=d5DP61vqLaxcrNjYSejP7QkCshw7yJehKk0lULkThoYMVD3pepxYcLqFY1dN0ltqFH/Dw4i+t3MZcXMIldADrKvmC4MDgAvU+v0Z4wHGxN60+jRcuYr26iDx6Az3L2f8cFjdBlTiyePLXbp04mq2I4B5h8wKc25qzp8GVrPi5C8= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565701101705555.2492156232644; Tue, 13 Aug 2019 05:58:21 -0700 (PDT) Received: from localhost ([::1]:52098 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWNY-0007mZ-RY for importer@patchew.org; Tue, 13 Aug 2019 08:58:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53680) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hxWFS-0002Yt-Ql for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hxWFR-0000nH-M9 for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:58 -0400 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:56267) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hxWFR-0000mF-ES for qemu-devel@nongnu.org; Tue, 13 Aug 2019 08:49:57 -0400 Received: by mail-wm1-x342.google.com with SMTP id f72so1386165wmf.5 for ; Tue, 13 Aug 2019 05:49:57 -0700 (PDT) Received: from zen.linaroharston ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id w5sm1705603wmm.43.2019.08.13.05.49.50 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 13 Aug 2019 05:49:53 -0700 (PDT) Received: from zen.linaroharston. (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 240B51FF9C; Tue, 13 Aug 2019 13:49:48 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NoY4fxuwSw4w5d0A97p1qZBRlAujfMxBHOYoRwMXm8I=; b=bguDt9Lfy7i3w+MyuHH+hr1JoO5u/iyHxOohMr9ooAd1ybUxCvfi7GcmA8YaOjA2r1 UOP4aE95WI2ziWF26t/hYw+eNvdz+KESuZsRfzvtW8hiq33nFkqTFScby8pxV3X1rHfc oGX+q91tNsXhlEkWZ5t5ykHdw93jEZActMRh/gfntKMqVZSbc1oTyY10RYHKTJu/0VGh g+4pC1DgLV1R2BvDMsqhL53yVmXEHELMCs6mGBsp1dptFj37wpZIHp3gS87G/mv5zrcc BwuY4Cn2ZPFApZZIijpPFvGsDsMKjes5nDEAfb7jwJ75rRCGwM/3DJN064VEtIzH1b/4 keLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NoY4fxuwSw4w5d0A97p1qZBRlAujfMxBHOYoRwMXm8I=; b=I9BTV6VqTaHw/21Hn62iJxnEX4iszEsoFOop220o/vp+VJ5o+hT0l2wIj4P/CJ2mMS Tw3XKOrVkKLsFwU++b+qpkFIkmwV7RDvUpqHbFpK91FPuI5svCwjNSRllvzQ17iGFVPi qgc1IaB686d2wo3Z89HCJw31FqphygL1AHmSwxl8Q7TPzvIItAadnTMQnAYz4EOeJlpu /AmwlPEeFka1ghDljwcQmTDMJAP9Gg2yvDItSmCRg1/7zPcCqpWz2IRbzd8Og1KQdA63 h04N7dxXs0l0XvbTE+avHaj2kSrsehRQvRqw7PI45aXsCGmQpfEeufeILosxwJ/+TteY vsvw== X-Gm-Message-State: APjAAAVGXJXusoxhD0AxgtzOhzP3rY7SJAtqMm7KY6wvDhjCK5rs7NZT 3GCfNhYUySUD9U2aFG6HQnHYaw== X-Google-Smtp-Source: APXvYqzk1SaYamAhANQ7ZOGx/4l/FUNMITCJzDxRQ2pzjZ127lXSjZGWCKhifeIJio+wqQyfZ+nnxg== X-Received: by 2002:a1c:4d0c:: with SMTP id o12mr3106796wmh.62.1565700596345; Tue, 13 Aug 2019 05:49:56 -0700 (PDT) From: =?UTF-8?q?Alex=20Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Tue, 13 Aug 2019 13:49:46 +0100 Message-Id: <20190813124946.25322-14-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190813124946.25322-1-alex.bennee@linaro.org> References: <20190813124946.25322-1-alex.bennee@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 Subject: [Qemu-devel] [PATCH v3 13/13] targets (various): use softfloat-helpers.h where we can X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Hildenbrand , Bastian Koppelmann , Cornelia Huck , Richard Henderson , armbru@redhat.com, "open list:S390 general arch..." , "Edgar E. Iglesias" , Guan Xuetao , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Generally the cpu and non-FP helper files just want to manipulate the softfloat flags. For this they can just use the -helpers.h include which brings in a minimal number of inline helpers. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Reviewed-by: David Hildenbrand Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 --- target/alpha/helper.c | 2 +- target/microblaze/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/sh4/cpu.c | 3 +-- target/tricore/helper.c | 2 +- target/unicore32/cpu.c | 1 - 6 files changed, 5 insertions(+), 7 deletions(-) diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 93b8e788b18..c6998348df4 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -21,7 +21,7 @@ =20 #include "cpu.h" #include "exec/exec-all.h" -#include "fpu/softfloat.h" +#include "fpu/softfloat-types.h" #include "exec/helper-proto.h" #include "qemu/qemu-print.h" =20 diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 0bec54b2f8a..9cfd7445e7d 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -28,7 +28,7 @@ #include "hw/qdev-properties.h" #include "migration/vmstate.h" #include "exec/exec-all.h" -#include "fpu/softfloat.h" +#include "fpu/softfloat-helpers.h" =20 static const struct { const char *name; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 736a7903e22..5db016672bb 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -42,7 +42,7 @@ #include "sysemu/sysemu.h" #include "sysemu/tcg.h" #endif -#include "fpu/softfloat.h" +#include "fpu/softfloat-helpers.h" =20 #define CR0_RESET 0xE0UL #define CR14_RESET 0xC2000000UL; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 816d6d7f311..d0a7707991f 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -25,8 +25,7 @@ #include "cpu.h" #include "migration/vmstate.h" #include "exec/exec-all.h" -#include "fpu/softfloat.h" - +#include "fpu/softfloat-helpers.h" =20 static void superh_cpu_set_pc(CPUState *cs, vaddr value) { diff --git a/target/tricore/helper.c b/target/tricore/helper.c index a6803368506..d5db7b2c03f 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -19,7 +19,7 @@ =20 #include "cpu.h" #include "exec/exec-all.h" -#include "fpu/softfloat.h" +#include "fpu/softfloat-helpers.h" #include "qemu/qemu-print.h" =20 enum { diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c index 802e2f1eba5..b27fb9689ff 100644 --- a/target/unicore32/cpu.c +++ b/target/unicore32/cpu.c @@ -17,7 +17,6 @@ #include "cpu.h" #include "migration/vmstate.h" #include "exec/exec-all.h" -#include "fpu/softfloat.h" =20 static void uc32_cpu_set_pc(CPUState *cs, vaddr value) { --=20 2.20.1