From nobody Sun Apr 28 03:16:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1565162268; cv=none; d=zoho.com; s=zohoarc; b=EAf1lx+G5dHiZAhoOIELGcVQ/kaSdsizcq64ebdXyMKegMIZQENkISMUB6h5T35LiW9AfkRhL73vw/hs/W9ciOqmFZ8DfglXBz7fIa1tWnMn/QeVkDFe4ZsbLsTqXM6dYJ3rlQ6Ve7sFK0D7OayVGONWDptie7Q2Yh9yhSlUeV8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565162268; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=xAbPmqwZNw1W2PKhUDbEgU/+dibzdGpHi9Ykw116njo=; b=fweoQHk7SrYJOWo3z9aNcG5TeSxnkfXktu80tkpJlLKj3F9ckv5YG4ownXG2c8uPAcT4v8aS3gUEYJnFA8t7T4jqjP4fQQXZ4z8EPzfDrUDrGzIOAZetBEeWCuEhhvtVrEHHJNoUhWnPdUMaSbGGz8mGZoL0ucmXdeDo+tkHlaI= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565162268315582.258966328908; Wed, 7 Aug 2019 00:17:48 -0700 (PDT) Received: from localhost ([::1]:37606 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvGCe-0000Au-HI for importer@patchew.org; Wed, 07 Aug 2019 03:17:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59862) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvGAf-0006yM-AF for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:15:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hvGAd-0001YF-UY for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:15:41 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:11124) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hvGAd-0001XX-Mt for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:15:39 -0400 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x777E9j7097030 for ; Wed, 7 Aug 2019 03:15:36 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0a-001b2d01.pphosted.com with ESMTP id 2u7s71hx57-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 07 Aug 2019 03:15:36 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 7 Aug 2019 08:15:32 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x777FVRF40370374 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 7 Aug 2019 07:15:31 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7557BA4069; Wed, 7 Aug 2019 07:15:31 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0EE18A407C; Wed, 7 Aug 2019 07:15:30 +0000 (GMT) Received: from dhcp-9-109-247-185.in.ibm.com (unknown [9.109.247.185]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Aug 2019 07:15:29 +0000 (GMT) From: Balamuruhan S To: qemu-devel@nongnu.org Date: Wed, 7 Aug 2019 12:44:40 +0530 X-Mailer: git-send-email 2.14.5 In-Reply-To: <20190807071445.4109-1-bala24@linux.ibm.com> References: <20190807071445.4109-1-bala24@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19080707-4275-0000-0000-000003562A26 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19080707-4276-0000-0000-000038682B17 Message-Id: <20190807071445.4109-2-bala24@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-07_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=18 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1908070078 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [RFC PATCH 1/6] utils/python_api: add scripting interface for Qemu with python lib X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maddy@linux.vnet.ibm.com, Balamuruhan S , anju@linux.vnet.ibm.com, clg@kaod.org, hari@linux.vnet.ibm.com, pbonzini@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Adds scripting interface with python library to call functions in python modules from Qemu that can be used to feed input externally and without recompiling Qemu that can be used for early development, testing and can be extended to abstract some of Qemu code out to a python script to ease maintenance. Signed-off-by: Balamuruhan S --- configure | 10 +++++ include/sysemu/python_api.h | 30 +++++++++++++ util/Makefile.objs | 1 + util/python_api.c | 100 ++++++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 141 insertions(+) create mode 100644 include/sysemu/python_api.h create mode 100644 util/python_api.c diff --git a/configure b/configure index 714e7fb6a1..fddddcc879 100755 --- a/configure +++ b/configure @@ -1866,6 +1866,11 @@ fi # Preserve python version since some functionality is dependent on it python_version=3D$($python -V 2>&1 | sed -e 's/Python\ //') =20 +# Python config to be used for CFLAGS and LDFLAGS +if ! [ -z "$python" ]; then + python_config=3D"$python-config" +fi + # Suppress writing compiled files python=3D"$python -B" =20 @@ -6304,6 +6309,11 @@ echo_version() { fi } =20 +if ! [ -z "$python_config" ]; then + QEMU_CFLAGS=3D"$QEMU_CFLAGS $($python_config --includes)" + QEMU_LDFLAGS=3D"$QEMU_LDFLAGS $($python_config --ldflags)" +fi + # prepend pixman and ftd flags after all config tests are done QEMU_CFLAGS=3D"$pixman_cflags $fdt_cflags $QEMU_CFLAGS" QEMU_LDFLAGS=3D"$fdt_ldflags $QEMU_LDFLAGS" diff --git a/include/sysemu/python_api.h b/include/sysemu/python_api.h new file mode 100644 index 0000000000..ff02d58377 --- /dev/null +++ b/include/sysemu/python_api.h @@ -0,0 +1,30 @@ +#ifndef _PPC_PNV_PYTHON_H +#define _PPC_PNV_PYTHON_H + +#include +#include + +extern PyObject *python_callback(const char *abs_module_path, const char *= mod, + const char *func, char *args[], + const int nargs); + +extern uint64_t python_callback_int(const char *abs_module_path, + const char *mod, + const char *func, char *args[], + const int nargs); + +extern char *python_callback_str(const char *abs_module_path, const char *= mod, + const char *func, char *args[], + const int nargs); + +extern bool python_callback_bool(const char *abs_module_path, const char *= mod, + const char *func, char *args[], + const int nargs); + +extern void python_args_init_cast_int(char *args[], int arg, int pos); + +extern void python_args_init_cast_long(char *args[], uint64_t arg, int pos= ); + +extern void python_args_clean(char *args[], int nargs); + +#endif diff --git a/util/Makefile.objs b/util/Makefile.objs index 41bf59d127..05851c94a7 100644 --- a/util/Makefile.objs +++ b/util/Makefile.objs @@ -50,6 +50,7 @@ util-obj-y +=3D range.o util-obj-y +=3D stats64.o util-obj-y +=3D systemd.o util-obj-y +=3D iova-tree.o +util-obj-y +=3D python_api.o util-obj-$(CONFIG_INOTIFY1) +=3D filemonitor-inotify.o util-obj-$(CONFIG_LINUX) +=3D vfio-helpers.o util-obj-$(CONFIG_POSIX) +=3D drm.o diff --git a/util/python_api.c b/util/python_api.c new file mode 100644 index 0000000000..854187e00f --- /dev/null +++ b/util/python_api.c @@ -0,0 +1,100 @@ +#include "sysemu/python_api.h" +#include "qemu/osdep.h" + +PyObject *python_callback(const char *abs_module_path, const char *mod, + const char *func, char *args[], const int nargs) +{ + PyObject *mod_name, *module, *mod_ref, *function, *arguments; + PyObject *result =3D 0; + PyObject *value =3D NULL; + + /* Set PYTHONPATH to absolute module path directory */ + if (!abs_module_path) + abs_module_path =3D "."; + setenv("PYTHONPATH", abs_module_path, 1); + + /* Initialize the Python Interpreter */ + Py_Initialize(); + mod_name =3D PyUnicode_FromString(mod); + /* Import module object */ + module =3D PyImport_Import(mod_name); + if (!module) { + PyErr_Print(); + fprintf(stderr, "Failed to load \"%s\"\n", mod); + exit(EXIT_FAILURE); + } + mod_ref =3D PyModule_GetDict(module); + function =3D PyDict_GetItemString(mod_ref, func); + if (function && PyCallable_Check(function)) { + arguments =3D PyTuple_New(nargs); + for (int i =3D 0; i < nargs; i++) { + value =3D PyUnicode_FromString(args[i]); + if (!value) { + Py_DECREF(arguments); + Py_DECREF(module); + fprintf(stderr, "Cannot convert argument\n"); + exit(EXIT_FAILURE); + } + PyTuple_SetItem(arguments, i, value); + } + PyErr_Print(); + result =3D PyObject_CallObject(function, arguments); + PyErr_Print(); + } + else { + if (PyErr_Occurred()) + PyErr_Print(); + fprintf(stderr, "Cannot find function \"%s\"\n", func); + exit(EXIT_FAILURE); + } + /* Clean up */ + Py_DECREF(value); + Py_DECREF(module); + Py_DECREF(mod_name); + /* Finish the Python Interpreter */ + Py_Finalize(); + return result; +} + +uint64_t python_callback_int(const char *abs_module_path, const char *mod, + const char *func, char *args[], const int nar= gs) +{ + PyObject *result; + result =3D python_callback(abs_module_path, mod, func, args, nargs); + return PyLong_AsLong(result); +} + +char *python_callback_str(const char *abs_module_path, const char *mod, + const char *func, char *args[], const int nargs) +{ + PyObject *result; + result =3D python_callback(abs_module_path, mod, func, args, nargs); + return PyUnicode_AsUTF8(result); +} + +bool python_callback_bool(const char *abs_module_path, const char *mod, + const char *func, char *args[], const int nargs) +{ + PyObject *result; + result =3D python_callback(abs_module_path, mod, func, args, nargs); + return (result =3D=3D Py_True); +} + +void python_args_init_cast_int(char *args[], int arg, int pos) +{ + args[pos]=3D malloc(sizeof(int)); + sprintf(args[pos], "%d", arg); +} + +void python_args_init_cast_long(char *args[], uint64_t arg, int pos) +{ + args[pos]=3D g_malloc(sizeof(uint64_t) * 2); + sprintf(args[pos], "%lx", arg); +} + +void python_args_clean(char *args[], int nargs) +{ + for (int i =3D 0; i < nargs; i++) { + g_free(args[i]); + } +} --=20 2.14.5 From nobody Sun Apr 28 03:16:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com ARC-Seal: i=1; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 7 Aug 2019 08:15:35 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x777FY0f26214868 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 7 Aug 2019 07:15:34 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2A040A405B; Wed, 7 Aug 2019 07:15:34 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9D033A406E; Wed, 7 Aug 2019 07:15:32 +0000 (GMT) Received: from dhcp-9-109-247-185.in.ibm.com (unknown [9.109.247.185]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Aug 2019 07:15:32 +0000 (GMT) From: Balamuruhan S To: qemu-devel@nongnu.org Date: Wed, 7 Aug 2019 12:44:41 +0530 X-Mailer: git-send-email 2.14.5 In-Reply-To: <20190807071445.4109-1-bala24@linux.ibm.com> References: <20190807071445.4109-1-bala24@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19080707-0020-0000-0000-0000035BD0CF X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19080707-0021-0000-0000-000021AFF358 Message-Id: <20190807071445.4109-3-bala24@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-07_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=21 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=832 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1908070078 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [RFC PATCH 2/6] hw/ppc/pnv_xscom: extend xscom to use python interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maddy@linux.vnet.ibm.com, Balamuruhan S , anju@linux.vnet.ibm.com, clg@kaod.org, hari@linux.vnet.ibm.com, pbonzini@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Existing xscom access emulation for read/write can be extended with the python interface to support feeding data externally. Signed-off-by: Balamuruhan S --- hw/ppc/pnv_xscom.c | 31 ++++++++++++++++++++++++++++--- include/sysemu/sysemu.h | 4 ++++ qemu-options.hx | 14 ++++++++++++++ vl.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 88 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index 2b81c75f56..5d5b5e9884 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -17,11 +17,13 @@ * License along with this library; if not, see . */ =20 +#include "sysemu/python_api.h" #include "qemu/osdep.h" #include "hw/hw.h" #include "qemu/log.h" #include "qemu/module.h" #include "sysemu/hw_accel.h" +#include "sysemu/sysemu.h" #include "target/ppc/cpu.h" #include "hw/sysbus.h" =20 @@ -157,8 +159,20 @@ static uint64_t xscom_read(void *opaque, hwaddr addr, = unsigned width) uint64_t val =3D 0; MemTxResult result; =20 - /* Handle some SCOMs here before dispatch */ - val =3D xscom_read_default(chip, pcba); + if (xscom_module && xscom_readp) { + char **args =3D g_malloc(2 * sizeof(uint64_t)); + PnvChipClass *pcc =3D PNV_CHIP_GET_CLASS(chip); + python_args_init_cast_long(args, pcba, 0); + python_args_init_cast_int(args, pcc->chip_type, 1); + val =3D python_callback_int(module_path, xscom_module, xscom_readp, + args, 2); + python_args_clean(args, 2); + g_free(args); + } + else { + /* Handle some SCOMs here before dispatch */ + val =3D xscom_read_default(chip, pcba); + } if (val !=3D -1) { goto complete; } @@ -184,8 +198,19 @@ static void xscom_write(void *opaque, hwaddr addr, uin= t64_t val, uint32_t pcba =3D pnv_xscom_pcba(chip, addr); MemTxResult result; =20 + if (xscom_module && xscom_writep) { + char **args =3D g_malloc(sizeof(uint64_t)); + bool xscom_success; + python_args_init_cast_long(args, pcba, 0); + xscom_success =3D python_callback_bool(module_path, xscom_module, + xscom_writep, args, 1); + python_args_clean(args, 1); + g_free(args); + if (xscom_success) + goto complete; + } /* Handle some SCOMs here before dispatch */ - if (xscom_write_default(chip, pcba, val)) { + else if (xscom_write_default(chip, pcba, val)) { goto complete; } =20 diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index 984c439ac9..9b8dc346d6 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -117,6 +117,10 @@ extern bool enable_mlock; extern bool enable_cpu_pm; extern QEMUClockType rtc_clock; extern const char *mem_path; +extern const char *module_path; +extern const char *xscom_module; +extern const char *xscom_readp; +extern const char *xscom_writep; extern int mem_prealloc; =20 #define MAX_NODES 128 diff --git a/qemu-options.hx b/qemu-options.hx index 9621e934c0..06c9f34d99 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -385,6 +385,20 @@ STEXI Allocate guest RAM from a temporarily created file in @var{path}. ETEXI =20 +DEF("module-path", HAS_ARG, QEMU_OPTION_modulepath, + "-module-path FILE provide absolute path where python modules" + "resides\n", QEMU_ARCH_ALL) +STEXI +@item -module-path [path=3D]@var{absolute path}[,homer_module=3Dhomer,home= r_func=3Dfunc1] +@findex -module-path +Provides information about where the python modules exist and the callback +functions defined. + +@example +qemu-system-ppc64 -module-path /home/modules/,homer_module=3Dhomer,homer_f= unc=3Dhomer_read +@end example +ETEXI + DEF("mem-prealloc", 0, QEMU_OPTION_mem_prealloc, "-mem-prealloc preallocate guest memory (use with -mem-path)\n", QEMU_ARCH_ALL) diff --git a/vl.c b/vl.c index b426b32134..28f0dc1c1b 100644 --- a/vl.c +++ b/vl.c @@ -140,6 +140,10 @@ int display_opengl; const char* keyboard_layout =3D NULL; ram_addr_t ram_size; const char *mem_path =3D NULL; +const char *module_path =3D NULL; +const char *xscom_module =3D NULL; +const char *xscom_readp =3D NULL; +const char *xscom_writep =3D NULL; int mem_prealloc =3D 0; /* force preallocation of physical target memory */ bool enable_mlock =3D false; bool enable_cpu_pm =3D false; @@ -469,6 +473,32 @@ static QemuOptsList qemu_mem_opts =3D { }, }; =20 +static QemuOptsList qemu_module_opts =3D { + .name =3D "module_path", + .implied_opt_name =3D "module_path", + .head =3D QTAILQ_HEAD_INITIALIZER(qemu_module_opts.head), + .merge_lists =3D true, + .desc =3D { + { + .name =3D "module_path", + .type =3D QEMU_OPT_STRING, + }, + { + .name =3D "xscom_module", + .type =3D QEMU_OPT_STRING, + }, + { + .name =3D "xscom_read", + .type =3D QEMU_OPT_STRING, + }, + { + .name =3D "xscom_write", + .type =3D QEMU_OPT_STRING, + }, + { /* end of list */ } + }, +}; + static QemuOptsList qemu_icount_opts =3D { .name =3D "icount", .implied_opt_name =3D "shift", @@ -2923,6 +2953,7 @@ int main(int argc, char **argv, char **envp) qemu_add_opts(&qemu_machine_opts); qemu_add_opts(&qemu_accel_opts); qemu_add_opts(&qemu_mem_opts); + qemu_add_opts(&qemu_module_opts); qemu_add_opts(&qemu_smp_opts); qemu_add_opts(&qemu_boot_opts); qemu_add_opts(&qemu_add_fd_opts); @@ -3190,6 +3221,17 @@ int main(int argc, char **argv, char **envp) case QEMU_OPTION_mempath: mem_path =3D optarg; break; + case QEMU_OPTION_modulepath: + opts =3D qemu_opts_parse_noisily(qemu_find_opts("module_pa= th"), + optarg, true); + if (!opts) { + exit(EXIT_FAILURE); + } + module_path =3D qemu_opt_get(opts, "module_path"); + xscom_module =3D qemu_opt_get(opts, "xscom_module"); + xscom_readp =3D qemu_opt_get(opts, "xscom_read"); + xscom_writep =3D qemu_opt_get(opts, "xscom_write"); + break; case QEMU_OPTION_mem_prealloc: mem_prealloc =3D 1; break; --=20 2.14.5 From nobody Sun Apr 28 03:16:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 7 Aug 2019 08:15:38 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x777Fbrb44302358 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 7 Aug 2019 07:15:37 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0F593A405B; Wed, 7 Aug 2019 07:15:37 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3483EA4059; Wed, 7 Aug 2019 07:15:35 +0000 (GMT) Received: from dhcp-9-109-247-185.in.ibm.com (unknown [9.109.247.185]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Aug 2019 07:15:34 +0000 (GMT) From: Balamuruhan S To: qemu-devel@nongnu.org Date: Wed, 7 Aug 2019 12:44:42 +0530 X-Mailer: git-send-email 2.14.5 In-Reply-To: <20190807071445.4109-1-bala24@linux.ibm.com> References: <20190807071445.4109-1-bala24@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19080707-0016-0000-0000-0000029B154A X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19080707-0017-0000-0000-000032FA25EB Message-Id: <20190807071445.4109-4-bala24@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-07_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=21 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1908070078 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [RFC PATCH 3/6] hw/ppc/pnv_homer: add homer/occ common area emulation for PowerNV X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maddy@linux.vnet.ibm.com, Balamuruhan S , anju@linux.vnet.ibm.com, clg@kaod.org, hari@linux.vnet.ibm.com, pbonzini@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add mmio callback functions to enable homer/occ common area to emulate pstate table, occ-sensors, slw, occ static and dynamic values for Power8 and Power9 chips. It also works for multiple chips as offset remains the same whereas the base address are handled appropriately while initializing device tree. currently skiboot disables the homer/occ code path with `QUIRK_NO_PBA`, this quirk have to be removed in skiboot for it to use this infrastructure. Signed-off-by: Hariharan T.S Signed-off-by: Balamuruhan S --- hw/ppc/Makefile.objs | 2 +- hw/ppc/pnv_homer.c | 185 +++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/pnv.h | 14 ++++ include/hw/ppc/pnv_homer.h | 41 ++++++++++ 4 files changed, 241 insertions(+), 1 deletion(-) create mode 100644 hw/ppc/pnv_homer.c create mode 100644 include/hw/ppc/pnv_homer.h diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 9da93af905..7260b4a96c 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -7,7 +7,7 @@ obj-$(CONFIG_PSERIES) +=3D spapr_pci.o spapr_rtc.o spapr_dr= c.o obj-$(CONFIG_PSERIES) +=3D spapr_cpu_core.o spapr_ovec.o spapr_irq.o obj-$(CONFIG_SPAPR_RNG) +=3D spapr_rng.o # IBM PowerNV -obj-$(CONFIG_POWERNV) +=3D pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.= o pnv_occ.o pnv_bmc.o +obj-$(CONFIG_POWERNV) +=3D pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.= o pnv_occ.o pnv_bmc.o pnv_homer.o ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy) obj-y +=3D spapr_pci_vfio.o spapr_pci_nvlink2.o endif diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c new file mode 100644 index 0000000000..73a94856d0 --- /dev/null +++ b/hw/ppc/pnv_homer.c @@ -0,0 +1,185 @@ +/* + * QEMU PowerPC PowerNV Homer and OCC common area region + * + * Copyright (c) 2019, IBM Corporation. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#include "qemu/osdep.h" +#include "sysemu/hw_accel.h" +#include "sysemu/cpus.h" +#include "hw/ppc/pnv.h" + +static bool core_max_array(hwaddr addr) +{ + char *cpu_type; + hwaddr core_max_base =3D 0xe2819; + MachineState *ms =3D MACHINE(qdev_get_machine()); + cpu_type =3D strstr(ms->cpu_type, "power8"); + if (cpu_type) + core_max_base =3D 0x1f8810; + for (int i =3D 0; i <=3D ms->smp.cores; i++) + if (addr =3D=3D (core_max_base + i)) + return true; + return false; +} + +static uint64_t homer_read(void *opaque, hwaddr addr, unsigned width) +{ + switch (addr) { + case 0xe2006: /* max pstate ultra turbo */ + case 0xe2018: /* pstate id for 0 */ + case 0x1f8001: /* P8 occ pstate version */ + case 0x1f8003: /* P8 pstate min */ + case 0x1f8010: /* P8 pstate id for 0 */ + return 0; + case 0xe2000: /* occ data area */ + case 0xe2002: /* occ_role master/slave*/ + case 0xe2004: /* pstate nom */ + case 0xe2005: /* pstate turbo */ + case 0xe2020: /* pstate id for 1 */ + case 0xe2818: /* pstate ultra turbo */ + case 0xe2b85: /* opal dynamic data (runtime) */ + case 0x1f8000: /* P8 occ pstate valid */ + case 0x1f8002: /* P8 throttle */ + case 0x1f8004: /* P8 pstate nom */ + case 0x1f8005: /* P8 pstate turbo */ + case 0x1f8012: /* vdd voltage identifier */ + case 0x1f8013: /* vcs voltage identifier */ + case 0x1f8018: /* P8 pstate id for 1 */ + return 1; + case 0xe2003: /* pstate min (2 as pstate min) */ + case 0xe2028: /* pstate id for 2 */ + case 0x1f8006: /* P8 pstate ultra turbo */ + case 0x1f8020: /* P8 pstate id for 2 */ + return 2; + case 0xe2001: /* major version */ + return 0x90; + /* 3000 khz frequency for 0, 1, and 2 pstates */ + case 0xe201c: + case 0xe2024: + case 0xe202c: + /* P8 frequency for 0, 1, and 2 pstates */ + case 0x1f8014: + case 0x1f801c: + case 0x1f8024: + return 3000; + case 0x0: /* homer base */ + case 0xe2008: /* occ data area + 8 */ + case 0x1f8008: /* P8 occ data area + 8 */ + case 0x200008: /* homer base access to get homer image pointer*/ + return 0x1000000000000000; + } + /* pstate table core max array */ + if (core_max_array(addr)) + return 1; + return 0; +} + +static void homer_write(void *opaque, hwaddr addr, uint64_t val, + unsigned width) +{ + /* callback function defined to homer write */ + return; +} + +const MemoryRegionOps pnv_homer_ops =3D { + .read =3D homer_read, + .write =3D homer_write, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 8, + .impl.min_access_size =3D 1, + .impl.max_access_size =3D 8, + .endianness =3D DEVICE_BIG_ENDIAN, +}; + +static uint64_t occ_common_area_read(void *opaque, hwaddr addr, unsigned w= idth) +{ + switch (addr) { + /* + * occ-sensor sanity check that asserts the sensor + * header block + */ + case 0x580000: /* occ sensor data block */ + case 0x580001: /* valid */ + case 0x580002: /* version */ + case 0x580004: /* reading_version */ + case 0x580008: /* nr_sensors */ + case 0x580010: /* names_offset */ + case 0x580014: /* reading_ping_offset */ + case 0x58000c: /* reading_pong_offset */ + case 0x580023: /* structure_type */ + return 1; + case 0x58000d: /* name length */ + return 0x30; + case 0x580022: /* occ sensor loc core */ + return 0x0040; + case 0x580003: /* occ sensor type power */ + return 0x0080; + case 0x580005: /* sensor name */ + return 0x1000; + case 0x58001e: /* HWMON_SENSORS_MASK */ + case 0x580020: + return 0x8e00; + case 0x0: /* P8 slw base access for slw image size */ + return 0x1000000000000000; + } + return 0; +} + +static void occ_common_area_write(void *opaque, hwaddr addr, uint64_t val, + unsigned width) +{ + /* callback function defined to occ common area write */ + return; +} + +const MemoryRegionOps pnv_occ_common_area_ops =3D { + .read =3D occ_common_area_read, + .write =3D occ_common_area_write, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 8, + .impl.min_access_size =3D 1, + .impl.max_access_size =3D 8, + .endianness =3D DEVICE_BIG_ENDIAN, +}; + +void pnv_occ_common_area_realize(PnvChip *chip, Error **errp) +{ + SysBusDevice *sbd =3D SYS_BUS_DEVICE(chip); + sbd->num_mmio =3D PNV_OCC_COMMON_AREA_SYSBUS; + char *occ_common_area; + + /* occ common area */ + occ_common_area =3D g_strdup_printf("occ-common-area-%x", chip->chip_i= d); + memory_region_init_io(&chip->occ_common_area_mmio, OBJECT(chip), + &pnv_occ_common_area_ops, chip, occ_common_area, + PNV_OCC_COMMON_AREA_SIZE); + sysbus_init_mmio(sbd, &chip->occ_common_area_mmio); + g_free(occ_common_area); +} + +void pnv_homer_realize(PnvChip *chip, Error **errp) +{ + SysBusDevice *sbd =3D SYS_BUS_DEVICE(chip); + sbd->num_mmio =3D PNV_HOMER_SYSBUS; + char *homer; + + /* homer region */ + homer =3D g_strdup_printf("homer-%x", chip->chip_id); + memory_region_init_io(&chip->homer_mmio, OBJECT(chip), &pnv_homer_ops, + chip, homer, PNV_HOMER_SIZE); + sysbus_init_mmio(sbd, &chip->homer_mmio); + g_free(homer); +} diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index fb123edc4e..6464e32892 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -28,6 +28,7 @@ #include "hw/ppc/pnv_occ.h" #include "hw/ppc/pnv_xive.h" #include "hw/ppc/pnv_core.h" +#include "hw/ppc/pnv_homer.h" =20 #define TYPE_PNV_CHIP "pnv-chip" #define PNV_CHIP(obj) OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP) @@ -36,6 +37,13 @@ #define PNV_CHIP_GET_CLASS(obj) \ OBJECT_GET_CLASS(PnvChipClass, (obj), TYPE_PNV_CHIP) =20 +enum SysBusNum { + PNV_XSCOM_SYSBUS, + PNV_ICP_SYSBUS, + PNV_HOMER_SYSBUS, + PNV_OCC_COMMON_AREA_SYSBUS, +}; + typedef enum PnvChipType { PNV_CHIP_POWER8E, /* AKA Murano (default) */ PNV_CHIP_POWER8, /* AKA Venice */ @@ -56,6 +64,8 @@ typedef struct PnvChip { uint64_t cores_mask; void *cores; =20 + MemoryRegion homer_mmio; + MemoryRegion occ_common_area_mmio; MemoryRegion xscom_mmio; MemoryRegion xscom; AddressSpace xscom_as; @@ -191,6 +201,10 @@ static inline bool pnv_is_power9(PnvMachineState *pnv) void pnv_dt_bmc_sensors(IPMIBmc *bmc, void *fdt); void pnv_bmc_powerdown(IPMIBmc *bmc); =20 +extern void pnv_occ_common_area_realize(PnvChip *chip, Error **errp); +extern void pnv_homer_realize(PnvChip *chip, Error **errp); + + /* * POWER8 MMIO base addresses */ diff --git a/include/hw/ppc/pnv_homer.h b/include/hw/ppc/pnv_homer.h new file mode 100644 index 0000000000..0fe6469abe --- /dev/null +++ b/include/hw/ppc/pnv_homer.h @@ -0,0 +1,41 @@ +/* + * QEMU PowerPC PowerNV Homer and occ common area definitions + * + * Copyright (c) 2019, IBM Corporation. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ +#ifndef _PPC_PNV_HOMER_H +#define _PPC_PNV_HOMER_H + +#include "qom/object.h" + +/* + * HOMER region size 4M per OCC (1 OCC is defined per chip in struct Pnv= Chip) + * so chip_num can be used to offset between HOMER region from its base a= ddress + */ +#define PNV_HOMER_SIZE 0x300000 +#define PNV_OCC_COMMON_AREA_SIZE 0x700000 + +#define PNV_HOMER_BASE(chip) \ + (0x7ffd800000ull + ((uint64_t)(chip)->chip_num) * PNV_HOMER_SIZE) +#define PNV_OCC_COMMON_AREA(chip) \ + (0x7fff800000ull + ((uint64_t)(chip)->chip_num) * PNV_OCC_COMMON_AREA_= SIZE) + +#define PNV9_HOMER_BASE(chip) \ + (0x203ffd800000ull + ((uint64_t)(chip)->chip_num) * PNV_HOMER_SIZE) +#define PNV9_OCC_COMMON_AREA(chip) \ + (0x203fff800000ull + ((uint64_t)(chip)->chip_num) * PNV_OCC_COMMON_ARE= A_SIZE) + +#endif /* _PPC_PNV_HOMER_H */ --=20 2.14.5 From nobody Sun Apr 28 03:16:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1565162296; cv=none; d=zoho.com; s=zohoarc; b=Tp9sQHCSa7jcucZpOBWURFG3XF57uckH4F//TSTss2O7AIfSjZkN3SlyA7W1H1Lz8e5Qk5UWzHbhSLTJs1gLFwfX+M4O/vUUHJg3ZrxJTUFdLq8u0Ig/CW8TZbADP8JhdghlivlQHKnAq4GsCI8Uq0nRBohBvRMTH/uAC03X+Mg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565162296; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=r7AAM7b+lFlXdChbw1BYYumwSU3LveNKkQbCOQBEvso=; b=j9AKyOhFZ7rq7vw+5tKFoZWO+gEZjYRs3ymvn+PTBlcYF/O+nrfS1hMSFzfFZZGPhJEPhuGwLBEgGY0L/iMExAT2rUkfqy00FSIjEqqCwDvLXTViytl102P014k+kZzOlngb96Vo6A9ekQpSN0h1T8xNjJ4COe7P5CJS0AIsgOY= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565162296467570.9161826597524; Wed, 7 Aug 2019 00:18:16 -0700 (PDT) Received: from localhost ([::1]:37610 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvGD7-0000c5-Uz for importer@patchew.org; Wed, 07 Aug 2019 03:18:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59917) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvGAm-0007Bx-Vp for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:15:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hvGAl-0001dN-Pk for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:15:48 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:15710) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hvGAl-0001d0-Hh for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:15:47 -0400 Received: from pps.filterd (m0098399.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x777EB2C112435 for ; Wed, 7 Aug 2019 03:15:46 -0400 Received: from e06smtp03.uk.ibm.com (e06smtp03.uk.ibm.com [195.75.94.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 2u7rw0jpp4-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 07 Aug 2019 03:15:46 -0400 Received: from localhost by e06smtp03.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 7 Aug 2019 08:15:41 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x777FeIE51773572 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 7 Aug 2019 07:15:40 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2D9E7A4053; Wed, 7 Aug 2019 07:15:40 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3D0B5A4057; Wed, 7 Aug 2019 07:15:38 +0000 (GMT) Received: from dhcp-9-109-247-185.in.ibm.com (unknown [9.109.247.185]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Aug 2019 07:15:37 +0000 (GMT) From: Balamuruhan S To: qemu-devel@nongnu.org Date: Wed, 7 Aug 2019 12:44:43 +0530 X-Mailer: git-send-email 2.14.5 In-Reply-To: <20190807071445.4109-1-bala24@linux.ibm.com> References: <20190807071445.4109-1-bala24@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19080707-0012-0000-0000-0000033ADAE2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19080707-0013-0000-0000-0000217496E9 Message-Id: <20190807071445.4109-5-bala24@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-07_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=18 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=905 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1908070078 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [RFC PATCH 4/6] hw/ppc/pnv: initialize and realize homer/occ common area X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maddy@linux.vnet.ibm.com, Balamuruhan S , anju@linux.vnet.ibm.com, clg@kaod.org, hari@linux.vnet.ibm.com, pbonzini@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" homer and occ common area region base address are initialized to create device tree and realized to map the address with mmio callbacks during `pnv_chip_realize()`. `SysBusNum` enum is introduced to set sysbus for XSCOM, ICP, HOMER and OCC appropriately and chip_num to initialize and retrieve base address + size contiguously on a PowerNV with multichip boot. Signed-off-by: Balamuruhan S --- hw/ppc/pnv.c | 49 +++++++++++++++++++++++++++++++++++++++++++++---- include/hw/ppc/pnv.h | 1 + 2 files changed, 46 insertions(+), 4 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index bd4531c822..f6e56e915d 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -675,6 +675,7 @@ static void pnv_init(MachineState *machine) Object *chip =3D object_new(chip_typename); =20 pnv->chips[i] =3D PNV_CHIP(chip); + PNV_CHIP(chip)->chip_num =3D i; =20 /* TODO: put all the memory in one node on chip 0 until we find a * way to specify different ranges for each chip @@ -824,18 +825,20 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Err= or **errp) { PnvChip *chip =3D PNV_CHIP(chip8); PnvChipClass *pcc =3D PNV_CHIP_GET_CLASS(chip); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(chip); const char *typename =3D pnv_chip_core_typename(chip); size_t typesize =3D object_type_get_instance_size(typename); int i, j; char *name; XICSFabric *xi =3D XICS_FABRIC(qdev_get_machine()); =20 + sbd->num_mmio =3D PNV_ICP_SYSBUS; name =3D g_strdup_printf("icp-%x", chip->chip_id); memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio); + sysbus_init_mmio(sbd, &chip8->icp_mmio); g_free(name); =20 - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + sysbus_mmio_map(sbd, PNV_ICP_SYSBUS, PNV_ICP_BASE(chip)); =20 /* Map the ICP registers for each thread */ for (i =3D 0; i < chip->nr_cores; i++) { @@ -866,7 +869,26 @@ static void pnv_chip_power8_realize(DeviceState *dev, = Error **errp) error_propagate(errp, local_err); return; } - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); + sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS, + PNV_XSCOM_BASE(chip)); + + /* homer */ + pnv_homer_realize(chip, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS, + PNV_HOMER_BASE(chip)); + + /* occ common area */ + pnv_occ_common_area_realize(chip, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS, + PNV_OCC_COMMON_AREA(chip)); =20 pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1035,7 +1057,26 @@ static void pnv_chip_power9_realize(DeviceState *dev= , Error **errp) error_propagate(errp, local_err); return; } - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); + sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS, + PNV9_XSCOM_BASE(chip)); + + /* homer */ + pnv_homer_realize(chip, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS, + PNV9_HOMER_BASE(chip)); + + /* occ common area */ + pnv_occ_common_area_realize(chip, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS, + PNV9_OCC_COMMON_AREA(chip)); =20 pcc->parent_realize(dev, &local_err); if (local_err) { diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 6464e32892..dea6772988 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -57,6 +57,7 @@ typedef struct PnvChip { =20 /*< public >*/ uint32_t chip_id; + uint32_t chip_num; uint64_t ram_start; uint64_t ram_size; =20 --=20 2.14.5 From nobody Sun Apr 28 03:16:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1565162487; cv=none; d=zoho.com; s=zohoarc; b=LaYxrl3QTIuPcoD/NMvU2rlqiqSKEERC13TH9artCxkX+9l05JkSaFRA2DCeXttlQbPOkTh/Q465P21WdOHMhv9iQqU/SJdl8VACaTlqx/1vHVPuUXYy+8IojwQSki18g4fHiXzCD3G3Atp7vY+0uUXvWj1d2UX88KDQSvguYbU= ARC-Message-Signature: i=1; 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 7 Aug 2019 08:15:44 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x777FhWY38928414 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 7 Aug 2019 07:15:43 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8AFC5A404D; Wed, 7 Aug 2019 07:15:43 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 55876A4051; Wed, 7 Aug 2019 07:15:41 +0000 (GMT) Received: from dhcp-9-109-247-185.in.ibm.com (unknown [9.109.247.185]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Aug 2019 07:15:41 +0000 (GMT) From: Balamuruhan S To: qemu-devel@nongnu.org Date: Wed, 7 Aug 2019 12:44:44 +0530 X-Mailer: git-send-email 2.14.5 In-Reply-To: <20190807071445.4109-1-bala24@linux.ibm.com> References: <20190807071445.4109-1-bala24@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19080707-0008-0000-0000-0000030628D0 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19080707-0009-0000-0000-00004A2429E5 Message-Id: <20190807071445.4109-6-bala24@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-07_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=5 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=804 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1908070078 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [RFC PATCH 5/6] hw/ppc/pnv_xscom: retrieve homer/occ base address from PBA BARs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maddy@linux.vnet.ibm.com, Balamuruhan S , anju@linux.vnet.ibm.com, clg@kaod.org, hari@linux.vnet.ibm.com, pbonzini@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" During PowerNV boot skiboot populates the device tree by retrieving base address of homer/occ common area from PBA BARs and prd ipoll mask by accessing xscom read/write accesses. Signed-off-by: Balamuruhan S --- hw/ppc/pnv_xscom.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index 5d5b5e9884..18a780bcdf 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -77,6 +77,29 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32= _t pcba) case 0x18002: /* ECID2 */ return 0; =20 + /* PBA BAR0 */ + case 0x5012b00: /* P9 homer base address */ + return PNV9_HOMER_BASE(chip); + case 0x2013f00: /* P8 homer base address */ + return PNV_HOMER_BASE(chip); + + /* PBA BARMASK0 */ + case 0x5012b04: /* P9 homer region size */ + case 0x2013f04: /* P8 homer region size */ + return PNV_HOMER_SIZE; + + /* PBA BAR2 */ + case 0x5012b02: /* P9 occ common area */ + return PNV9_OCC_COMMON_AREA(chip); + case 0x2013f02: /* P8 occ common area */ + return PNV_OCC_COMMON_AREA(chip); + + /* PBA BARMASK2 */ + case 0x5012b06: /* P9 occ common area size */ + case 0x2013f06: /* P8 occ common area size */ + return PNV_OCC_COMMON_AREA_SIZE; + + case 0x1010c00: /* PIBAM FIR */ case 0x1010c03: /* PIBAM FIR MASK */ =20 @@ -96,13 +119,9 @@ static uint64_t xscom_read_default(PnvChip *chip, uint3= 2_t pcba) case 0x2020009: /* ADU stuff, error register */ case 0x202000f: /* ADU stuff, receive status register*/ return 0; - case 0x2013f00: /* PBA stuff */ case 0x2013f01: /* PBA stuff */ - case 0x2013f02: /* PBA stuff */ case 0x2013f03: /* PBA stuff */ - case 0x2013f04: /* PBA stuff */ case 0x2013f05: /* PBA stuff */ - case 0x2013f06: /* PBA stuff */ case 0x2013f07: /* PBA stuff */ return 0; case 0x2013028: /* CAPP stuff */ --=20 2.14.5 From nobody Sun Apr 28 03:16:17 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.ibm.com ARC-Seal: i=1; a=rsa-sha256; t=1565162427; cv=none; d=zoho.com; s=zohoarc; b=gcExhMtbyOG4mVJcE3JyzF7ln4eYmbM4OCTx4hcmQPxFjU72slOvNa6Buxr1lzeB4sKFX819ljk8N6kAiXbbA/ZES8VNno0CjvP5oApNO9zd1sd7VhzW2oz6e/bEXVfQen1Awye+7vbngsdXn1viIjg9XjASJ+MU79rSVUEBEYY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565162427; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=F8ejDNfhnacTR3fx/UHzm7M9l0NIjVbQz7xC6tGzKP8=; b=ivw6oliIXqFakjppqN+mE/IqDhDhI5KrPzYsYu0J6Apra092QNCFwWyAdS+5Ef+utSCSWCAP8XRNrNagp8HcGuVoemjmuv8j5E6KFN2sGIR7/Vj1sUyPkIy4f8bGZvjxnAV07ZV8qRCJrbguuBr9e34yAHOcCCxsQ6sEty9q/vE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565162427586216.04396409310039; Wed, 7 Aug 2019 00:20:27 -0700 (PDT) Received: from localhost ([::1]:37630 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvGFG-0003aF-Lk for importer@patchew.org; Wed, 07 Aug 2019 03:20:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59966) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hvGB5-0007WD-Hz for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:16:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hvGAz-0001l3-Nu for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:16:05 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:45680) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hvGAu-0001i7-1E for qemu-devel@nongnu.org; Wed, 07 Aug 2019 03:15:57 -0400 Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x777E9wZ076510 for ; Wed, 7 Aug 2019 03:15:54 -0400 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0a-001b2d01.pphosted.com with ESMTP id 2u7see1hen-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 07 Aug 2019 03:15:53 -0400 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Wed, 7 Aug 2019 08:15:48 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x777Fl0R45875208 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 7 Aug 2019 07:15:47 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8B7A3A4055; Wed, 7 Aug 2019 07:15:47 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7E307A4065; Wed, 7 Aug 2019 07:15:45 +0000 (GMT) Received: from dhcp-9-109-247-185.in.ibm.com (unknown [9.109.247.185]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Aug 2019 07:15:45 +0000 (GMT) From: Balamuruhan S To: qemu-devel@nongnu.org Date: Wed, 7 Aug 2019 12:44:45 +0530 X-Mailer: git-send-email 2.14.5 In-Reply-To: <20190807071445.4109-1-bala24@linux.ibm.com> References: <20190807071445.4109-1-bala24@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 19080707-0016-0000-0000-0000029B154D X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19080707-0017-0000-0000-000032FA25EF Message-Id: <20190807071445.4109-7-bala24@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-07_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=21 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1908070078 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [RFC PATCH 6/6] hw/ppc/pnv_homer: add python interface support for homer/occ common area X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maddy@linux.vnet.ibm.com, Balamuruhan S , anju@linux.vnet.ibm.com, clg@kaod.org, hari@linux.vnet.ibm.com, pbonzini@redhat.com, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" use python interface APIs in homer/occ common area emulation to interact with scripts if provided else fallback to normal flow, it shows how simple to use the interface to call python methods with any number of arguments in any script placed in common -module-path provided in qemu commandline. Signed-off-by: Balamuruhan S --- hw/ppc/pnv_homer.c | 20 ++++++++++++++++++++ hw/ppc/pnv_xscom.c | 9 +++++---- include/sysemu/sysemu.h | 4 ++++ vl.c | 24 ++++++++++++++++++++++++ 4 files changed, 53 insertions(+), 4 deletions(-) diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c index 73a94856d0..6ae5e74f19 100644 --- a/hw/ppc/pnv_homer.c +++ b/hw/ppc/pnv_homer.c @@ -16,7 +16,9 @@ * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, see . */ +#include "sysemu/python_api.h" #include "qemu/osdep.h" +#include "sysemu/sysemu.h" #include "sysemu/hw_accel.h" #include "sysemu/cpus.h" #include "hw/ppc/pnv.h" @@ -37,6 +39,15 @@ static bool core_max_array(hwaddr addr) =20 static uint64_t homer_read(void *opaque, hwaddr addr, unsigned width) { + if (homer_module && homer) { + uint64_t homer_ret; + char **address =3D g_malloc(sizeof(uint64_t)); + python_args_init_cast_long(address, addr, 0); + homer_ret =3D python_callback_int(module_path, homer_module, homer= , address, 1); + python_args_clean(address, 1); + g_free(address); + return homer_ret; + } switch (addr) { case 0xe2006: /* max pstate ultra turbo */ case 0xe2018: /* pstate id for 0 */ @@ -106,6 +117,15 @@ const MemoryRegionOps pnv_homer_ops =3D { =20 static uint64_t occ_common_area_read(void *opaque, hwaddr addr, unsigned w= idth) { + if (occ_module && occ) { + uint64_t occ_ret; + char **address =3D g_malloc(sizeof(uint64_t)); + python_args_init_cast_long(address, addr, 0); + occ_ret =3D python_callback_int(module_path, occ_module, occ, addr= ess, 1); + python_args_clean(address, 1); + g_free(address); + return occ_ret; + } switch (addr) { /* * occ-sensor sanity check that asserts the sensor diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index 18a780bcdf..5e41b7c953 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -179,13 +179,14 @@ static uint64_t xscom_read(void *opaque, hwaddr addr,= unsigned width) MemTxResult result; =20 if (xscom_module && xscom_readp) { - char **args =3D g_malloc(2 * sizeof(uint64_t)); + char **args =3D g_malloc(3 * sizeof(uint64_t)); PnvChipClass *pcc =3D PNV_CHIP_GET_CLASS(chip); python_args_init_cast_long(args, pcba, 0); - python_args_init_cast_int(args, pcc->chip_type, 1); + python_args_init_cast_int(args, chip->chip_num, 1); + python_args_init_cast_int(args, pcc->chip_type, 2); val =3D python_callback_int(module_path, xscom_module, xscom_readp, - args, 2); - python_args_clean(args, 2); + args, 3); + python_args_clean(args, 3); g_free(args); } else { diff --git a/include/sysemu/sysemu.h b/include/sysemu/sysemu.h index 9b8dc346d6..3c8119e040 100644 --- a/include/sysemu/sysemu.h +++ b/include/sysemu/sysemu.h @@ -121,6 +121,10 @@ extern const char *module_path; extern const char *xscom_module; extern const char *xscom_readp; extern const char *xscom_writep; +extern const char *homer_module; +extern const char *homer; +extern const char *occ_module; +extern const char *occ; extern int mem_prealloc; =20 #define MAX_NODES 128 diff --git a/vl.c b/vl.c index 28f0dc1c1b..c96d35d907 100644 --- a/vl.c +++ b/vl.c @@ -144,6 +144,10 @@ const char *module_path =3D NULL; const char *xscom_module =3D NULL; const char *xscom_readp =3D NULL; const char *xscom_writep =3D NULL; +const char *homer_module =3D NULL; +const char *homer =3D NULL; +const char *occ_module =3D NULL; +const char *occ =3D NULL; int mem_prealloc =3D 0; /* force preallocation of physical target memory */ bool enable_mlock =3D false; bool enable_cpu_pm =3D false; @@ -495,6 +499,22 @@ static QemuOptsList qemu_module_opts =3D { .name =3D "xscom_write", .type =3D QEMU_OPT_STRING, }, + { + .name =3D "homer_module", + .type =3D QEMU_OPT_STRING, + }, + { + .name =3D "homer", + .type =3D QEMU_OPT_STRING, + }, + { + .name =3D "occ_module", + .type =3D QEMU_OPT_STRING, + }, + { + .name =3D "occ", + .type =3D QEMU_OPT_STRING, + }, { /* end of list */ } }, }; @@ -3231,6 +3251,10 @@ int main(int argc, char **argv, char **envp) xscom_module =3D qemu_opt_get(opts, "xscom_module"); xscom_readp =3D qemu_opt_get(opts, "xscom_read"); xscom_writep =3D qemu_opt_get(opts, "xscom_write"); + homer_module =3D qemu_opt_get(opts, "homer_module"); + homer =3D qemu_opt_get(opts, "homer"); + occ_module =3D qemu_opt_get(opts, "occ_module"); + occ =3D qemu_opt_get(opts, "occ"); break; case QEMU_OPTION_mem_prealloc: mem_prealloc =3D 1; --=20 2.14.5