From nobody Fri Oct 3 20:22:41 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1565118299; cv=none; d=zoho.com; s=zohoarc; b=Tom3Tnis8209/W+SwC6IchkASav1lFc25KKFrugZTV40tnMF6SmkFDJIpjfcZLpvdAopVYZqF6gcFGeUK7piof0PssXec20N/TKIHqrs+wcjTRalxPhxdLF2E0Ukukx+98NXiIFkVbsJM1U33JLHkThjV/AubSTT+getgV+61Qc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565118299; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=3DBFmL8//QY4Y7D05NeVgackrzsyx+KcHpVT/LI/CLs=; b=gNFDoS2qr48hKQvZEEzHvpymXYxLIeK8Mo+69BjxvBCked+0zfd5HlBeMx17lmPBTzkYAI9d9fBFianswDA3g4hIIvw0Phi1BDeTOckUjw4J0Ak4QgJyplof8qTkxVX/1I0U9xhsKjwGBrQZ+T/bWFEIjOOFnOJ7CNHuN+bv4H0= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565118299681448.1275112883337; Tue, 6 Aug 2019 12:04:59 -0700 (PDT) Received: from localhost ([::1]:35796 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hv4lW-0004A4-Lc for importer@patchew.org; Tue, 06 Aug 2019 15:04:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41154) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hv4dy-0004Oj-Vw for qemu-devel@nongnu.org; Tue, 06 Aug 2019 14:57:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hv4dx-00075j-5E for qemu-devel@nongnu.org; Tue, 06 Aug 2019 14:57:10 -0400 Received: from mga14.intel.com ([192.55.52.115]:31802) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hv4dw-0006yc-Qq for qemu-devel@nongnu.org; Tue, 06 Aug 2019 14:57:09 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Aug 2019 11:57:00 -0700 Received: from sjchrist-coffee.jf.intel.com ([10.54.74.41]) by orsmga003.jf.intel.com with ESMTP; 06 Aug 2019 11:56:59 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,353,1559545200"; d="scan'208";a="176715080" From: Sean Christopherson To: Eduardo Habkost , Igor Mammedov , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Cornelia Huck , Eric Blake , Markus Armbruster , Marcelo Tosatti Date: Tue, 6 Aug 2019 11:56:35 -0700 Message-Id: <20190806185649.2476-7-sean.j.christopherson@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190806185649.2476-1-sean.j.christopherson@intel.com> References: <20190806185649.2476-1-sean.j.christopherson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.115 Subject: [Qemu-devel] [RFC PATCH 06/20] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" CPUID leaf 12_1_EAX is an Intel-defined feature bits leaf enumerating the platform's SGX capabilities that may be utilized by an enclave, e.g. whether or not an enclave can gain access to the provision key. Currently there are six capabilities: - INIT: set when the enclave has has been initialized by EINIT. Cannot be set by software, i.e. forced to zero in CPUID. - DEBUG: permits a debugger to read/write into the enclave. - MODE64BIT: the enclave runs in 64-bit mode - PROVISIONKEY: grants has access to the provision key - EINITTOKENKEY: grants access to the EINIT token key, i.e. the enclave can generate EINIT tokens - KSS: Key Separation and Sharing enabled for the enclave. Note that the entirety of CPUID.0x12.0x1, i.e. all registers, enumerates the allowed ATTRIBUTES (128 bits), but only bits 31:0 are directly exposed to the user (via FEAT_12_1_EAX). Bits 63:32 are currently all reserved and bits 127:64 correspond to the allowed XSAVE Feature Request Mask, which is calculated based on other CPU features, e.g. XSAVE, MPX, AVX, etc... and is not exposed to the user. Signed-off-by: Sean Christopherson --- target/i386/cpu.c | 20 ++++++++++++++++++++ target/i386/cpu.h | 1 + 2 files changed, 21 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index e954eca4dd..e3dd76d3ba 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -776,6 +776,7 @@ static void x86_cpu_vendor_words2str(char *dst, uint32_= t vendor1, /* missing: CPUID_XSAVE_XSAVEC, CPUID_XSAVE_XSAVES */ #define TCG_SGX_12_0_EAX_FEATURES 0 +#define TCG_SGX_12_1_EAX_FEATURES 0 =20 typedef enum FeatureWordType { CPUID_FEATURE_WORD, @@ -1244,6 +1245,25 @@ static FeatureWordInfo feature_word_info[FEATURE_WOR= DS] =3D { }, .tcg_features =3D TCG_SGX_12_0_EAX_FEATURES, }, + [FEAT_SGX_12_1_EAX] =3D { + .type =3D CPUID_FEATURE_WORD, + .feat_names =3D { + NULL /* sgx-init */, "sgx-debug", "sgx-mode64", NULL, + "sgx-provisionkey", "sgx-tokenkey", NULL, "sgx-kss", + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + }, + .cpuid =3D { + .eax =3D 0x12, + .needs_ecx =3D true, .ecx =3D 1, + .reg =3D R_EAX, + }, + .tcg_features =3D TCG_SGX_12_1_EAX_FEATURES, + }, }; =20 typedef struct X86RegisterInfo32 { diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 6803b1b41d..fe4660effa 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -507,6 +507,7 @@ typedef enum FeatureWord { FEAT_ARCH_CAPABILITIES, FEAT_CORE_CAPABILITY, FEAT_SGX_12_0_EAX, /* CPUID[EAX=3D0x12,ECX=3D0].EAX (SGX) */ + FEAT_SGX_12_1_EAX, /* CPUID[EAX=3D0x12,ECX=3D1].EAX (SGX ATTRIBUTES[3= 1:0]) */ FEATURE_WORDS, } FeatureWord; =20 --=20 2.22.0