From nobody Fri Oct 3 20:22:40 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1565118132; cv=none; d=zoho.com; s=zohoarc; b=kZAKaqliV3TcU0Ci97TjfVMqNyd/jVHmLNDLEtGq/u+TPdqzbqyZpzVh3kcekX+2WndDhsa9eq82n6uAxufshDmwYoImdgmY54eSGUsRZ7qpuOTFZx4OhQGu+N39Oyt+cSlov267nljSTH+x7G919qHjlkSWOyAx1ZWznwk3Hnc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1565118132; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=8o6mo+63Ehq05cWPvdo1Gem+/3ms0J+hHGW24UX6m9E=; b=SGeQhD3izNZA0WIgtQLNJihmI2YRyvCPJHP9c6HQW5JwCIo1EuZ6YYg/+1QAk/MLTi2Yff9l9hsVLmp74YXG3B78N/mNuXGCVbbnHtOdgAChiHEuTIxT7GxXLiIGadkikHyjWw8GXWODqOFZ5aErZHQBa3q+GLrjKwyilnJEC8Y= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1565118132062673.5086089077647; Tue, 6 Aug 2019 12:02:12 -0700 (PDT) Received: from localhost ([::1]:35754 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hv4in-0007SL-0M for importer@patchew.org; Tue, 06 Aug 2019 15:02:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41123) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hv4dy-0004OP-Hh for qemu-devel@nongnu.org; Tue, 06 Aug 2019 14:57:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hv4dw-00074r-Qt for qemu-devel@nongnu.org; Tue, 06 Aug 2019 14:57:10 -0400 Received: from mga11.intel.com ([192.55.52.93]:6393) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hv4dw-0006yu-I2 for qemu-devel@nongnu.org; Tue, 06 Aug 2019 14:57:08 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Aug 2019 11:57:00 -0700 Received: from sjchrist-coffee.jf.intel.com ([10.54.74.41]) by orsmga003.jf.intel.com with ESMTP; 06 Aug 2019 11:57:00 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,353,1559545200"; d="scan'208";a="176715109" From: Sean Christopherson To: Eduardo Habkost , Igor Mammedov , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Cornelia Huck , Eric Blake , Markus Armbruster , Marcelo Tosatti Date: Tue, 6 Aug 2019 11:56:44 -0700 Message-Id: <20190806185649.2476-16-sean.j.christopherson@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190806185649.2476-1-sean.j.christopherson@intel.com> References: <20190806185649.2476-1-sean.j.christopherson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Subject: [Qemu-devel] [RFC PATCH 15/20] hw/i386/pc: Set SGX bits in feature control fw_cfg accordingly X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, kvm@vger.kernel.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Request SGX an SGX Launch Control to be enabled in FEATURE_CONTROL when the features are exposed to the guest. Signed-off-by: Sean Christopherson --- hw/i386/pc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 549c437050..8c8b404799 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1670,7 +1670,7 @@ static void pc_build_feature_control_file(PCMachineSt= ate *pcms) MachineState *ms =3D MACHINE(pcms); X86CPU *cpu =3D X86_CPU(ms->possible_cpus->cpus[0].cpu); CPUX86State *env =3D &cpu->env; - uint32_t unused, ecx, edx; + uint32_t unused, ebx, ecx, edx; uint64_t feature_control_bits =3D 0; uint64_t *val; =20 @@ -1685,6 +1685,14 @@ static void pc_build_feature_control_file(PCMachineS= tate *pcms) feature_control_bits |=3D FEATURE_CONTROL_LMCE; } =20 + cpu_x86_cpuid(env, 0x7, 0, &unused, &ebx, &ecx, &unused); + if (ebx & CPUID_7_0_EBX_SGX) { + feature_control_bits |=3D FEATURE_CONTROL_SGX; + } + if (ecx & CPUID_7_0_ECX_SGX_LC) { + feature_control_bits |=3D FEATURE_CONTROL_SGX_LC; + } + if (!feature_control_bits) { return; } --=20 2.22.0