From nobody Mon Feb 9 09:16:34 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1564748892; cv=none; d=zoho.com; s=zohoarc; b=VfM/b7LW7NYkTnih/7WvnXeYo/dMYQOlQ0YeZtdamvsk1E7vsDdPFgkvjOag8oMLSzvQtzReId5FdhCpppEL0FOT6dEPnO186NHeAWPGKoEfGIaVEVjTZplQwDPsPhOq+m6iogBWi9EimSbZoYGqnJq+JmFiIUvuRKHI1y2/yXY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1564748892; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=wWNvJJYmVaakbAQK7ATw++WbRJHr+ABjtiVwOjbEJ8U=; b=cLSGeecr2QaCsuVxSsk/yeXlE2OJnsOmUK4uXO3+vrC9Cbgv2woc/YiA86+otPDxnJH//bZPs/ZDAgpxXyaLiuz1O5p7Ya0/60EX9IclYpFUlPdK9JZ+hdlSm5hUhk5MtDf3mcBlH/QQG3rFuSEysDqcoBLRm9+fMbFAm+lrcjg= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1564748892190944.5052911658913; Fri, 2 Aug 2019 05:28:12 -0700 (PDT) Received: from localhost ([::1]:34396 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1htWfL-0001G9-8z for importer@patchew.org; Fri, 02 Aug 2019 08:28:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37685) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1htWdU-0005Do-1Y for qemu-devel@nongnu.org; Fri, 02 Aug 2019 08:26:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1htWdT-0001pa-4K for qemu-devel@nongnu.org; Fri, 02 Aug 2019 08:26:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:30846) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1htWdR-0001oL-1U; Fri, 02 Aug 2019 08:26:13 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5945230821A1; Fri, 2 Aug 2019 12:26:12 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2FD745C205; Fri, 2 Aug 2019 12:26:07 +0000 (UTC) From: Andrew Jones To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Fri, 2 Aug 2019 14:25:30 +0200 Message-Id: <20190802122540.26385-6-drjones@redhat.com> In-Reply-To: <20190802122540.26385-1-drjones@redhat.com> References: <20190802122540.26385-1-drjones@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Fri, 02 Aug 2019 12:26:12 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 05/15] target/arm/helper: zcr: Add build bug next to value range assumption X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, richard.henderson@linaro.org, armbru@redhat.com, eric.auger@redhat.com, imammedo@redhat.com, alex.bennee@linaro.org, Dave.Martin@arm.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The current implementation of ZCR_ELx matches the architecture, only implementing the lower four bits, with the rest RAZ/WI. This puts a strict limit on ARM_MAX_VQ of 16. Make sure we don't let ARM_MAX_VQ grow without a corresponding update here. Suggested-by: Dave Martin Signed-off-by: Andrew Jones Reviewed-by: Richard Henderson Reviewed-by: Eric Auger --- target/arm/helper.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index b74c23a9bc08..3064067c69a6 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5300,6 +5300,7 @@ static void zcr_write(CPUARMState *env, const ARMCPRe= gInfo *ri, int new_len; =20 /* Bits other than [3:0] are RAZ/WI. */ + QEMU_BUILD_BUG_ON(ARM_MAX_VQ > 16); raw_write(env, ri, value & 0xf); =20 /* --=20 2.20.1