From nobody Mon Feb 9 19:30:09 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org ARC-Seal: i=1; a=rsa-sha256; t=1564582690; cv=none; d=zoho.com; s=zohoarc; b=G2zNWp98Y/JDctkdeR1SIWzsPQg2/FJ1G+wnlGtdrvQMTQO9TBfnP2z1Dpo0XcoS/KSSa/S5S0N+2ToVsiEK3W5DwUMZJW9DoLpDs2TY0B0A1uxl0QkKd6ufmBrWHfpuf9/Lt50iBf4W9WFqi1NXi196cOU3vRZKy9wnmGhX2lU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1564582690; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=qC3GkHMuxZbCHfebMV0peYxVqSI8TERUTb9iT7SGS9k=; b=B8+D/R5uOlHA/LyykDoOuzj+amCnnGvL9JScimLceuN1vqC3Pk7TVKbpzWITSI7ilGF1Ruv234S9QAS5lj5O2qtgTIUSEJRGQMPSB2HQJV23XzySfuT60jSAuL+9uYBfdyjSx4Tfjt/CRulQOMFgrzvt2AqWZSn0P+JvhwnIeiY= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1564582690408999.7918313234942; Wed, 31 Jul 2019 07:18:10 -0700 (PDT) Received: from localhost ([::1]:41266 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hspQf-0008Pg-Ex for importer@patchew.org; Wed, 31 Jul 2019 10:18:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34154) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hspLx-0007LN-K9 for qemu-devel@nongnu.org; Wed, 31 Jul 2019 10:13:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hspLw-0001ke-Be for qemu-devel@nongnu.org; Wed, 31 Jul 2019 10:13:17 -0400 Received: from 2.mo177.mail-out.ovh.net ([178.33.109.80]:57891) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hspLw-0001jc-4t for qemu-devel@nongnu.org; Wed, 31 Jul 2019 10:13:16 -0400 Received: from player715.ha.ovh.net (unknown [10.109.146.50]) by mo177.mail-out.ovh.net (Postfix) with ESMTP id 64A87106430 for ; Wed, 31 Jul 2019 16:13:14 +0200 (CEST) Received: from kaod.org (lfbn-1-2240-157.w90-76.abo.wanadoo.fr [90.76.60.157]) (Authenticated sender: clg@kaod.org) by player715.ha.ovh.net (Postfix) with ESMTPSA id EF99B850B8AC; Wed, 31 Jul 2019 14:13:08 +0000 (UTC) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Wed, 31 Jul 2019 16:12:19 +0200 Message-Id: <20190731141233.1340-5-clg@kaod.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190731141233.1340-1-clg@kaod.org> References: <20190731141233.1340-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 11671641387786210278 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduvddrleehgdejfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemucehtddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 178.33.109.80 Subject: [Qemu-devel] [PATCH v3 04/18] ppc/pnv: Implement the XiveFabric and XivePresenter interfaces X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, Greg Kurz , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The CAM line matching on the PowerNV machine now scans all chips of the system and all CPUs of a chip to find a dispatched NVT in the thread contexts. As there is now easy way to loop on the CPUs belonging to a chip, the PowerNV handler loops on all CPUs and filter out the external CPUs. Fixes: af53dbf6227a ("ppc/xive: introduce a simplified XIVE presenter") Signed-off-by: C=C3=A9dric Le Goater --- hw/intc/pnv_xive.c | 76 ++++++++++++++++++++++++++++++++++++++++++++++ hw/ppc/pnv.c | 32 +++++++++++++++++++ 2 files changed, 108 insertions(+) diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c index ff1226485983..183798b81496 100644 --- a/hw/intc/pnv_xive.c +++ b/hw/intc/pnv_xive.c @@ -390,6 +390,80 @@ static int pnv_xive_get_eas(XiveRouter *xrtr, uint8_t = blk, uint32_t idx, return pnv_xive_vst_read(xive, VST_TSEL_IVT, blk, idx, eas); } =20 +static int cpu_pir(PowerPCCPU *cpu) +{ + CPUPPCState *env =3D &cpu->env; + return env->spr_cb[SPR_PIR].default_value; +} + +static int cpu_chip_id(PowerPCCPU *cpu) +{ + int pir =3D cpu_pir(cpu); + return (pir >> 8) & 0x7f; +} + +static bool pnv_xive_is_cpu_enabled(PnvXive *xive, PowerPCCPU *cpu) +{ + int pir =3D cpu_pir(cpu); + int thrd_id =3D pir & 0x7f; + + return xive->regs[PC_THREAD_EN_REG0 >> 3] & PPC_BIT(thrd_id); +} + +static bool pnv_xive_is_ignored(PnvChip *chip, CPUState *cs) +{ + return chip->chip_id !=3D cpu_chip_id(POWERPC_CPU(cs)); +} + +#define PNV_CHIP_CPU_FOREACH(chip, cs) \ + CPU_FOREACH(cs) \ + if (pnv_xive_is_ignored(chip, cs)) {} else + +static int pnv_xive_match_nvt(XivePresenter *xptr, uint8_t format, + uint8_t nvt_blk, uint32_t nvt_idx, + bool cam_ignore, uint8_t priority, + uint32_t logic_serv, XiveTCTXMatch *match) +{ + PnvXive *xive =3D PNV_XIVE(xptr); + CPUState *cs; + int count =3D 0; + + /* + * Loop on all CPUs of the machine and filter out the CPUs + * belonging to another chip. + */ + PNV_CHIP_CPU_FOREACH(xive->chip, cs) { + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + XiveTCTX *tctx =3D XIVE_TCTX(pnv_cpu_state(cpu)->intc); + int ring; + + if (!pnv_xive_is_cpu_enabled(xive, cpu)) { + continue; + } + + ring =3D xive_presenter_tctx_match(xptr, tctx, format, nvt_blk, nv= t_idx, + cam_ignore, logic_serv); + /* + * Save the context and follow on to catch duplicates, that we + * don't support yet. + */ + if (ring !=3D -1) { + if (match->tctx) { + qemu_log_mask(LOG_GUEST_ERROR, "XIVE: already found a " + "thread context NVT %x/%x\n", + nvt_blk, nvt_idx); + return -1; + } + + match->ring =3D ring; + match->tctx =3D tctx; + count++; + } + } + + return count; +} + static XiveTCTX *pnv_xive_get_tctx(XiveRouter *xrtr, CPUState *cs) { PowerPCCPU *cpu =3D POWERPC_CPU(cs); @@ -1795,6 +1869,7 @@ static void pnv_xive_class_init(ObjectClass *klass, v= oid *data) PnvXScomInterfaceClass *xdc =3D PNV_XSCOM_INTERFACE_CLASS(klass); XiveRouterClass *xrc =3D XIVE_ROUTER_CLASS(klass); XiveNotifierClass *xnc =3D XIVE_NOTIFIER_CLASS(klass); + XivePresenterClass *xpc =3D XIVE_PRESENTER_CLASS(klass); =20 xdc->dt_xscom =3D pnv_xive_dt_xscom; =20 @@ -1810,6 +1885,7 @@ static void pnv_xive_class_init(ObjectClass *klass, v= oid *data) xrc->get_tctx =3D pnv_xive_get_tctx; =20 xnc->notify =3D pnv_xive_notify; + xpc->match_nvt =3D pnv_xive_match_nvt; }; =20 static const TypeInfo pnv_xive_info =3D { diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 18602b9e9bcd..3f6796831b68 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1322,6 +1322,35 @@ static void pnv_pic_print_info(InterruptStatsProvide= r *obj, } } =20 +static int pnv_xive_match_nvt(XiveFabric *xfb, uint8_t format, + uint8_t nvt_blk, uint32_t nvt_idx, + bool cam_ignore, uint8_t priority, + uint32_t logic_serv, + XiveTCTXMatch *match) +{ + PnvMachineState *pnv =3D PNV_MACHINE(xfb); + int total_count =3D 0; + int i; + + for (i =3D 0; i < pnv->num_chips; i++) { + Pnv9Chip *chip9 =3D PNV9_CHIP(pnv->chips[i]); + XivePresenter *xptr =3D XIVE_PRESENTER(&chip9->xive); + XivePresenterClass *xpc =3D XIVE_PRESENTER_GET_CLASS(xptr); + int count; + + count =3D xpc->match_nvt(xptr, format, nvt_blk, nvt_idx, cam_ignor= e, + priority, logic_serv, match); + + if (count < 0) { + return count; + } + + total_count +=3D count; + } + + return total_count; +} + static void pnv_get_num_chips(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -1385,9 +1414,11 @@ static void pnv_machine_power8_class_init(ObjectClas= s *oc, void *data) static void pnv_machine_power9_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); + XiveFabricClass *xfc =3D XIVE_FABRIC_CLASS(oc); =20 mc->desc =3D "IBM PowerNV (Non-Virtualized) POWER9"; mc->default_cpu_type =3D POWERPC_CPU_TYPE_NAME("power9_v2.0"); + xfc->match_nvt =3D pnv_xive_match_nvt; =20 mc->alias =3D "powernv"; } @@ -1435,6 +1466,7 @@ static void pnv_machine_class_init(ObjectClass *oc, v= oid *data) .interfaces =3D (InterfaceInfo[]) { \ { TYPE_XICS_FABRIC }, \ { TYPE_INTERRUPT_STATS_PROVIDER }, \ + { TYPE_XIVE_FABRIC }, \ { }, \ }, \ } --=20 2.21.0