From nobody Fri May 3 15:36:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1562341808; cv=none; d=zoho.com; s=zohoarc; b=ehBlseWnFuVl4o+aszHlnYYv/c2/5m85dRBEWtoHOtfs9coGBybAoJj+vmf14L/br4CE8oIt1qCX5mvWjeJMsnX1CklXM4e6T0vy4taNnL5ba7+M0/P7HXojY3mPI5femRxt37tKxRUR3MA3oFGGXc0DCgqgU17asYajc8nWKzU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1562341808; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=b45BR1ogRtPXX5sxH6K/BWbwnggm9/mJB1zEV6Xuk70=; b=BsNcDUeyDgwZ/I0ERN2oeOf12BvHjofvoWAkX1i0LwRmxvJu+WYM3gjPtm29xNY91ECaCjLsn0Y+/MUPTIiMElJ+17NVzVWQZGsYPGk8LOwMFFCLCGweLqIAQg3idyGuiya6YZFLW4WIYcT5JGfRoc+G5Q4wLUOmt53Pm4Y318U= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1562341808543848.7073331836453; Fri, 5 Jul 2019 08:50:08 -0700 (PDT) Received: from localhost ([::1]:54288 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hjQTL-0004im-66 for importer@patchew.org; Fri, 05 Jul 2019 11:50:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36472) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hjQQV-0002im-6D for qemu-devel@nongnu.org; Fri, 05 Jul 2019 11:47:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hjQQQ-0005o7-Uk for qemu-devel@nongnu.org; Fri, 05 Jul 2019 11:47:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47230) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hjQQL-0005Cy-Tp; Fri, 05 Jul 2019 11:46:58 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C329E307D84D; Fri, 5 Jul 2019 15:46:54 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-45.brq.redhat.com [10.40.204.45]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7ED4E1001B27; Fri, 5 Jul 2019 15:46:51 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 17:46:31 +0200 Message-Id: <20190705154639.16591-2-philmd@redhat.com> In-Reply-To: <20190705154639.16591-1-philmd@redhat.com> References: <20190705154639.16591-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Fri, 05 Jul 2019 15:46:54 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 1/9] hw/block/pflash_cfi01: Removed an unused timer X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, John Snow , Laszlo Ersek , Alistair Francis , Wei Yang , Max Reitz , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The 'CFI02' NOR flash was introduced in commit 29133e9a0fff, with timing modelled. One year later, the CFI01 model was introduced (commit 05ee37ebf630) based on the CFI02 model. As noted in the header, "It does not support timings". 12 years later, we never had to model the device timings. Time to remove the unused timer, we can still add it back if required. Suggested-by: Laszlo Ersek Reviewed-by: Wei Yang Reviewed-by: Laszlo Ersek Reviewed-by: Alistair Francis Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- v2: Fixed commit description (Laszlo) --- hw/block/pflash_cfi01.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index db4a246b22..9e34fd4e82 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -42,7 +42,6 @@ #include "hw/block/flash.h" #include "sysemu/block-backend.h" #include "qapi/error.h" -#include "qemu/timer.h" #include "qemu/bitops.h" #include "qemu/error-report.h" #include "qemu/host-utils.h" @@ -90,7 +89,6 @@ struct PFlashCFI01 { uint8_t cfi_table[0x52]; uint64_t counter; unsigned int writeblock_size; - QEMUTimer *timer; MemoryRegion mem; char *name; void *storage; @@ -114,18 +112,6 @@ static const VMStateDescription vmstate_pflash =3D { } }; =20 -static void pflash_timer (void *opaque) -{ - PFlashCFI01 *pfl =3D opaque; - - trace_pflash_timer_expired(pfl->cmd); - /* Reset flash */ - pfl->status ^=3D 0x80; - memory_region_rom_device_set_romd(&pfl->mem, true); - pfl->wcycle =3D 0; - pfl->cmd =3D 0; -} - /* Perform a CFI query based on the bank width of the flash. * If this code is called we know we have a device_width set for * this flash. @@ -774,7 +760,6 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) pfl->max_device_width =3D pfl->device_width; } =20 - pfl->timer =3D timer_new_ns(QEMU_CLOCK_VIRTUAL, pflash_timer, pfl); pfl->wcycle =3D 0; pfl->cmd =3D 0; pfl->status =3D 0; --=20 2.20.1 From nobody Fri May 3 15:36:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 5 Jul 2019 15:46:57 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-45.brq.redhat.com [10.40.204.45]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3A5B01001B27; Fri, 5 Jul 2019 15:46:55 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 17:46:32 +0200 Message-Id: <20190705154639.16591-3-philmd@redhat.com> In-Reply-To: <20190705154639.16591-1-philmd@redhat.com> References: <20190705154639.16591-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.48]); Fri, 05 Jul 2019 15:46:57 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 2/9] hw/block/pflash_cfi01: Use the correct READ_ARRAY value X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, John Snow , Laszlo Ersek , Alistair Francis , Max Reitz , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" In the "Read Array Flowchart" the command has a value of 0xFF. In the document [*] the "Read Array Flowchart", the READ_ARRAY command has a value of 0xff. Use the correct value in the pflash model. There is no change of behavior in the guest, because: - when the guest were sending 0xFF, the reset_flash label was setting the command value as 0x00 - 0x00 was used internally for READ_ARRAY To keep migration behaving correctly, we have to increase the VMState version. When migrating from an older version, we use the correct command value. [*] "Common Flash Interface (CFI) and Command Sets" (Intel Application Note 646) Appendix B "Basic Command Set" Reviewed-by: John Snow Reviewed-by: Alistair Francis Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- v3: Handle migrating the 'cmd' field. Since Laszlo stated he did not test migration [*], I'm keeping his test tag, because the change with v2 has no impact in the tests he ran. Likewise I'm keeping John and Alistair tags, but I'd like an extra review for the migration change, thanks! [*] https://lists.gnu.org/archive/html/qemu-devel/2019-07/msg00679.html --- hw/block/pflash_cfi01.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 9e34fd4e82..58cbef0588 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -100,7 +100,7 @@ static int pflash_post_load(void *opaque, int version_i= d); =20 static const VMStateDescription vmstate_pflash =3D { .name =3D "pflash_cfi01", - .version_id =3D 1, + .version_id =3D 2, .minimum_version_id =3D 1, .post_load =3D pflash_post_load, .fields =3D (VMStateField[]) { @@ -277,10 +277,9 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr o= ffset, /* This should never happen : reset state & treat it as a read */ DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd); pfl->wcycle =3D 0; - pfl->cmd =3D 0; + pfl->cmd =3D 0xff; /* fall through to read code */ - case 0x00: - /* Flash area read */ + case 0xff: /* Read Array */ ret =3D pflash_data_read(pfl, offset, width, be); break; case 0x10: /* Single byte program */ @@ -448,8 +447,6 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, case 0: /* read mode */ switch (cmd) { - case 0x00: /* ??? */ - goto reset_flash; case 0x10: /* Single Byte Program */ case 0x40: /* Single Byte Program */ DPRINTF("%s: Single Byte Program\n", __func__); @@ -526,7 +523,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, if (cmd =3D=3D 0xd0) { /* confirm */ pfl->wcycle =3D 0; pfl->status |=3D 0x80; - } else if (cmd =3D=3D 0xff) { /* read array mode */ + } else if (cmd =3D=3D 0xff) { /* Read Array */ goto reset_flash; } else goto error_flash; @@ -553,7 +550,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, } else if (cmd =3D=3D 0x01) { pfl->wcycle =3D 0; pfl->status |=3D 0x80; - } else if (cmd =3D=3D 0xff) { + } else if (cmd =3D=3D 0xff) { /* read array mode */ goto reset_flash; } else { DPRINTF("%s: Unknown (un)locking command\n", __func__); @@ -645,7 +642,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, trace_pflash_reset(); memory_region_rom_device_set_romd(&pfl->mem, true); pfl->wcycle =3D 0; - pfl->cmd =3D 0; + pfl->cmd =3D 0xff; } =20 =20 @@ -761,7 +758,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) } =20 pfl->wcycle =3D 0; - pfl->cmd =3D 0; + pfl->cmd =3D 0xff; pfl->status =3D 0; /* Hardcoded CFI table */ /* Standard "QRY" string */ @@ -1001,5 +998,11 @@ static int pflash_post_load(void *opaque, int version= _id) pfl->vmstate =3D qemu_add_vm_change_state_handler(postload_update_= cb, pfl); } + if (version_id < 2) { + /* v1 used incorrect value of 0x00 for the READ_ARRAY command. */ + if (pfl->cmd =3D=3D 0x00) { + pfl->cmd =3D 0xff; + } + } return 0; } --=20 2.20.1 From nobody Fri May 3 15:36:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 5 Jul 2019 15:46:59 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-45.brq.redhat.com [10.40.204.45]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BBA221001B2F; Fri, 5 Jul 2019 15:46:57 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 17:46:33 +0200 Message-Id: <20190705154639.16591-4-philmd@redhat.com> In-Reply-To: <20190705154639.16591-1-philmd@redhat.com> References: <20190705154639.16591-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Fri, 05 Jul 2019 15:46:59 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 3/9] hw/block/pflash_cfi01: Extract pflash_mode_read_array() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, John Snow , Laszlo Ersek , Alistair Francis , Max Reitz , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The same pattern is used when setting the flash in READ_ARRAY mode: - Set the state machine command to READ_ARRAY - Reset the write_cycle counter - Reset the memory region in ROMD Refactor the current code by extracting this pattern. It is used twice: - On a write access (on command failure, error, or explicitly asked) - When the device is initialized. Here the ROMD mode is hidden by the memory_region_init_rom_device() call. Rename the 'reset_flash' as 'mode_read_array' to make explicit we do not reset the device, we simply set its internal state machine in the READ_ARRAY mode. We do not reset the status register error bits, as a device reset would do. Reviewed-by: John Snow Reviewed-by: Alistair Francis Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 36 ++++++++++++++++++++---------------- hw/block/trace-events | 1 + 2 files changed, 21 insertions(+), 16 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 58cbef0588..81fbdbde7f 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -112,6 +112,14 @@ static const VMStateDescription vmstate_pflash =3D { } }; =20 +static void pflash_mode_read_array(PFlashCFI01 *pfl) +{ + trace_pflash_mode_read_array(); + pfl->cmd =3D 0xff; /* Read Array */ + pfl->wcycle =3D 0; + memory_region_rom_device_set_romd(&pfl->mem, true); +} + /* Perform a CFI query based on the bank width of the flash. * If this code is called we know we have a device_width set for * this flash. @@ -469,7 +477,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, case 0x50: /* Clear status bits */ DPRINTF("%s: Clear status bits\n", __func__); pfl->status =3D 0x0; - goto reset_flash; + goto mode_read_array; case 0x60: /* Block (un)lock */ DPRINTF("%s: Block unlock\n", __func__); break; @@ -494,10 +502,10 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr off= set, break; case 0xf0: /* Probe for AMD flash */ DPRINTF("%s: Probe for AMD flash\n", __func__); - goto reset_flash; + goto mode_read_array; case 0xff: /* Read array mode */ DPRINTF("%s: Read array mode\n", __func__); - goto reset_flash; + goto mode_read_array; default: goto error_flash; } @@ -524,7 +532,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, pfl->wcycle =3D 0; pfl->status |=3D 0x80; } else if (cmd =3D=3D 0xff) { /* Read Array */ - goto reset_flash; + goto mode_read_array; } else goto error_flash; =20 @@ -551,15 +559,15 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr off= set, pfl->wcycle =3D 0; pfl->status |=3D 0x80; } else if (cmd =3D=3D 0xff) { /* read array mode */ - goto reset_flash; + goto mode_read_array; } else { DPRINTF("%s: Unknown (un)locking command\n", __func__); - goto reset_flash; + goto mode_read_array; } break; case 0x98: if (cmd =3D=3D 0xff) { - goto reset_flash; + goto mode_read_array; } else { DPRINTF("%s: leaving query mode\n", __func__); } @@ -619,7 +627,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, " the data is already written to storage!\n" "Flash device reset into READ mode.\n", __func__); - goto reset_flash; + goto mode_read_array; } break; default: @@ -629,7 +637,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, default: /* Should never happen */ DPRINTF("%s: invalid write state\n", __func__); - goto reset_flash; + goto mode_read_array; } return; =20 @@ -638,11 +646,8 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, "(offset " TARGET_FMT_plx ", wcycle 0x%x cmd 0x%x value = 0x%x)" "\n", __func__, offset, pfl->wcycle, pfl->cmd, value); =20 - reset_flash: - trace_pflash_reset(); - memory_region_rom_device_set_romd(&pfl->mem, true); - pfl->wcycle =3D 0; - pfl->cmd =3D 0xff; + mode_read_array: + pflash_mode_read_array(pfl); } =20 =20 @@ -757,8 +762,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) pfl->max_device_width =3D pfl->device_width; } =20 - pfl->wcycle =3D 0; - pfl->cmd =3D 0xff; + pflash_mode_read_array(pfl); pfl->status =3D 0; /* Hardcoded CFI table */ /* Standard "QRY" string */ diff --git a/hw/block/trace-events b/hw/block/trace-events index 13d1b21dd4..91a8a106c0 100644 --- a/hw/block/trace-events +++ b/hw/block/trace-events @@ -7,6 +7,7 @@ fdc_ioport_write(uint8_t reg, uint8_t value) "write reg 0x%= 02x val 0x%02x" # pflash_cfi02.c # pflash_cfi01.c pflash_reset(void) "reset" +pflash_mode_read_array(void) "mode: read array" pflash_timer_expired(uint8_t cmd) "command 0x%02x done" pflash_io_read(uint64_t offset, int width, int fmt_width, uint32_t value, = uint8_t cmd, uint8_t wcycle) "offset:0x%04"PRIx64" width:%d value:0x%0*x cm= d:0x%02x wcycle:%u" pflash_io_write(uint64_t offset, int width, int fmt_width, uint32_t value,= uint8_t wcycle) "offset:0x%04"PRIx64" width:%d value:0x%0*x wcycle:%u" --=20 2.20.1 From nobody Fri May 3 15:36:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 05 Jul 2019 11:47:06 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5A68381F12; Fri, 5 Jul 2019 15:47:02 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-45.brq.redhat.com [10.40.204.45]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 440451001B27; Fri, 5 Jul 2019 15:47:00 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 17:46:34 +0200 Message-Id: <20190705154639.16591-5-philmd@redhat.com> In-Reply-To: <20190705154639.16591-1-philmd@redhat.com> References: <20190705154639.16591-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Fri, 05 Jul 2019 15:47:02 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 4/9] hw/block/pflash_cfi01: Start state machine as READY to accept commands X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, John Snow , Laszlo Ersek , Alistair Francis , Max Reitz , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" When the state machine is ready to accept command, the bit 7 of the status register (SR) is set to 1. The guest polls the status register and check this bit before writting command to the internal 'Write State Machine' (WSM). Set SR.7 bit to 1 when the device is created. There is no migration impact by this change. Reference: Read Array Flowchart "Common Flash Interface (CFI) and Command Sets" (Intel Application Note 646) Appendix B "Basic Command Set" Reviewed-by: John Snow Reviewed-by: Alistair Francis Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- v3: Added migration comment. --- hw/block/pflash_cfi01.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 81fbdbde7f..200bfd0ab8 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -763,7 +763,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) } =20 pflash_mode_read_array(pfl); - pfl->status =3D 0; + pfl->status =3D 0x80; /* WSM ready */ /* Hardcoded CFI table */ /* Standard "QRY" string */ pfl->cfi_table[0x10] =3D 'Q'; --=20 2.20.1 From nobody Fri May 3 15:36:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 05 Jul 2019 11:47:14 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 36954308213A; Fri, 5 Jul 2019 15:47:12 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-45.brq.redhat.com [10.40.204.45]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C53531001B2F; Fri, 5 Jul 2019 15:47:02 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 17:46:35 +0200 Message-Id: <20190705154639.16591-6-philmd@redhat.com> In-Reply-To: <20190705154639.16591-1-philmd@redhat.com> References: <20190705154639.16591-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Fri, 05 Jul 2019 15:47:12 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 5/9] hw/block/pflash_cfi01: Add the DeviceReset() handler X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, John Snow , Laszlo Ersek , Alistair Francis , Max Reitz , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" A "system reset" sets the device state machine in READ_ARRAY mode and, after some delay, set the SR.7 READY bit. We do not model timings, so we set the SR.7 bit directly. The TYPE_DEVICE interface provides a DeviceReset handler. This pflash device is a subclass of TYPE_SYS_BUS_DEVICE (which is a subclass of TYPE_DEVICE). SYS_BUS devices are automatically plugged into the 'main system bus', which is the root of the qbus tree. Devices in the qbus tree are guaranteed to have their reset() handler called after realize() and before we try to run the guest. To avoid incoherent states when the machine resets (see but report below), factor out the reset code into pflash_cfi01_system_reset, and register the method as a device reset callback. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1678713 Reported-by: Laszlo Ersek Reviewed-by: John Snow Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- v3: reword description --- hw/block/pflash_cfi01.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index 200bfd0ab8..c32c67d01d 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -762,8 +762,6 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) pfl->max_device_width =3D pfl->device_width; } =20 - pflash_mode_read_array(pfl); - pfl->status =3D 0x80; /* WSM ready */ /* Hardcoded CFI table */ /* Standard "QRY" string */ pfl->cfi_table[0x10] =3D 'Q'; @@ -851,6 +849,18 @@ static void pflash_cfi01_realize(DeviceState *dev, Err= or **errp) pfl->cfi_table[0x3f] =3D 0x01; /* Number of protection fields */ } =20 +static void pflash_cfi01_system_reset(DeviceState *dev) +{ + PFlashCFI01 *pfl =3D PFLASH_CFI01(dev); + + pflash_mode_read_array(pfl); + /* + * The WSM ready timer occurs at most 150ns after system reset. + * This model deliberately ignores this delay. + */ + pfl->status =3D 0x80; +} + static Property pflash_cfi01_properties[] =3D { DEFINE_PROP_DRIVE("drive", PFlashCFI01, blk), /* num-blocks is the number of blocks actually visible to the guest, @@ -895,6 +905,7 @@ static void pflash_cfi01_class_init(ObjectClass *klass,= void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 + dc->reset =3D pflash_cfi01_system_reset; dc->realize =3D pflash_cfi01_realize; dc->props =3D pflash_cfi01_properties; dc->vmsd =3D &vmstate_pflash; --=20 2.20.1 From nobody Fri May 3 15:36:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 5 Jul 2019 15:47:14 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-45.brq.redhat.com [10.40.204.45]) by smtp.corp.redhat.com (Postfix) with ESMTPS id A26051001B30; Fri, 5 Jul 2019 15:47:12 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 17:46:36 +0200 Message-Id: <20190705154639.16591-7-philmd@redhat.com> In-Reply-To: <20190705154639.16591-1-philmd@redhat.com> References: <20190705154639.16591-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Fri, 05 Jul 2019 15:47:14 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 6/9] hw/block/pflash_cfi01: Simplify CFI_QUERY processing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, John Snow , Laszlo Ersek , Alistair Francis , Max Reitz , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The current code does: if (write_cycle =3D=3D 0) if (command =3D=3D CFI_QUERY) break write_cycle +=3D 1 last_command =3D command if (write_cycle =3D=3D 1) if (last_command =3D=3D CFI_QUERY) if (command =3D=3D READ_ARRAY write_cycle =3D 0 last_command =3D READ_ARRAY Simplify by not increasing the write_cycle on CFI_QUERY, the next command are processed as normal wcycle=3D0. This matches the hardware datasheet (we do not enter the WRITE state machine, thus no write cycle involved). Reviewed-by: Alistair Francis Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index c32c67d01d..e097d9260d 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -491,7 +491,8 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, return; case 0x98: /* CFI query */ DPRINTF("%s: CFI query\n", __func__); - break; + pfl->cmd =3D cmd; + return; case 0xe8: /* Write to buffer */ DPRINTF("%s: Write to buffer\n", __func__); /* FIXME should save @offset, @width for case 1+ */ @@ -565,13 +566,6 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offs= et, goto mode_read_array; } break; - case 0x98: - if (cmd =3D=3D 0xff) { - goto mode_read_array; - } else { - DPRINTF("%s: leaving query mode\n", __func__); - } - break; default: goto error_flash; } --=20 2.20.1 From nobody Fri May 3 15:36:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Reviewed-by: Alistair Francis Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index e097d9260d..ba00e52923 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -208,11 +208,11 @@ static uint32_t pflash_devid_query(PFlashCFI01 *pfl, = hwaddr offset) * Offsets 2/3 are block lock status, is not emulated. */ switch (boff & 0xFF) { - case 0: + case 0: /* Manufacturer ID */ resp =3D pfl->ident0; trace_pflash_manufacturer_id(resp); break; - case 1: + case 1: /* Device ID */ resp =3D pfl->ident1; trace_pflash_device_id(resp); break; @@ -455,11 +455,11 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr off= set, case 0: /* read mode */ switch (cmd) { - case 0x10: /* Single Byte Program */ - case 0x40: /* Single Byte Program */ + case 0x10: /* Single Byte Program (setup) */ + case 0x40: /* Single Byte Program (setup) [Intel] */ DPRINTF("%s: Single Byte Program\n", __func__); break; - case 0x20: /* Block erase */ + case 0x20: /* Block erase (setup) */ p =3D pfl->storage; offset &=3D ~(pfl->sector_len - 1); =20 @@ -515,8 +515,8 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, break; case 1: switch (pfl->cmd) { - case 0x10: /* Single Byte Program */ - case 0x40: /* Single Byte Program */ + case 0x10: /* Single Byte Program (confirm) */ + case 0x40: /* Single Byte Program (confirm) [Intel] */ DPRINTF("%s: Single Byte Program\n", __func__); if (!pfl->ro) { pflash_data_write(pfl, offset, value, width, be); @@ -527,7 +527,7 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, pfl->status |=3D 0x80; /* Ready! */ pfl->wcycle =3D 0; break; - case 0x20: /* Block erase */ + case 0x20: /* Block erase (confirm) */ case 0x28: if (cmd =3D=3D 0xd0) { /* confirm */ pfl->wcycle =3D 0; --=20 2.20.1 From nobody Fri May 3 15:36:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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charset="utf-8" Reviewed-by: Alistair Francis Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index ba00e52923..ab72af22a7 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -283,7 +283,9 @@ static uint32_t pflash_read(PFlashCFI01 *pfl, hwaddr of= fset, switch (pfl->cmd) { default: /* This should never happen : reset state & treat it as a read */ - DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid state, " + "wcycle %d cmd 0x02%x\n", + __func__, pfl->wcycle, pfl->cmd); pfl->wcycle =3D 0; pfl->cmd =3D 0xff; /* fall through to read code */ @@ -630,7 +632,9 @@ static void pflash_write(PFlashCFI01 *pfl, hwaddr offse= t, break; default: /* Should never happen */ - DPRINTF("%s: invalid write state\n", __func__); + qemu_log_mask(LOG_GUEST_ERROR, "%s: Invalid state, " + "wcycle %d cmd (0x02%x -> value 0x02%x)\n", + __func__, pfl->wcycle, pfl->cmd, value); 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Fri, 05 Jul 2019 15:47:22 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 9/9] hw/block/pflash_cfi01: Hold the PRI table offset in a variable X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-block@nongnu.org, John Snow , Laszlo Ersek , Alistair Francis , Max Reitz , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Manufacturers are allowed to move the PRI table, this is why the offset is queryable via fixed offsets 0x15/0x16. Add a variable to hold the offset, so it will be easier to later move the PRI table. Reviewed-by: Alistair Francis Regression-tested-by: Laszlo Ersek Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/block/pflash_cfi01.c | 41 ++++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index ab72af22a7..67e714b32d 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -761,6 +761,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) } =20 /* Hardcoded CFI table */ + const uint16_t pri_ofs =3D 0x31; /* Standard "QRY" string */ pfl->cfi_table[0x10] =3D 'Q'; pfl->cfi_table[0x11] =3D 'R'; @@ -769,14 +770,17 @@ static void pflash_cfi01_realize(DeviceState *dev, Er= ror **errp) pfl->cfi_table[0x13] =3D 0x01; pfl->cfi_table[0x14] =3D 0x00; /* Primary extended table address (none) */ - pfl->cfi_table[0x15] =3D 0x31; - pfl->cfi_table[0x16] =3D 0x00; + pfl->cfi_table[0x15] =3D pri_ofs; + pfl->cfi_table[0x16] =3D pri_ofs >> 8; /* Alternate command set (none) */ pfl->cfi_table[0x17] =3D 0x00; pfl->cfi_table[0x18] =3D 0x00; /* Alternate extended table (none) */ pfl->cfi_table[0x19] =3D 0x00; pfl->cfi_table[0x1A] =3D 0x00; + + /* CFI: System Interface Information */ + /* Vcc min */ pfl->cfi_table[0x1B] =3D 0x45; /* Vcc max */ @@ -801,6 +805,9 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) pfl->cfi_table[0x25] =3D 0x04; /* Max timeout for chip erase */ pfl->cfi_table[0x26] =3D 0x00; + + /* CFI: Device Geometry Definition */ + /* Device size */ pfl->cfi_table[0x27] =3D ctz32(device_len); /* + 1; */ /* Flash device interface (8 & 16 bits) */ @@ -825,26 +832,30 @@ static void pflash_cfi01_realize(DeviceState *dev, Er= ror **errp) pfl->cfi_table[0x2E] =3D (blocks_per_device - 1) >> 8; pfl->cfi_table[0x2F] =3D sector_len_per_device >> 8; pfl->cfi_table[0x30] =3D sector_len_per_device >> 16; + assert(0x30 < pri_ofs); + + /* CFI: Primary-Vendor Specific */ =20 /* Extended */ - pfl->cfi_table[0x31] =3D 'P'; - pfl->cfi_table[0x32] =3D 'R'; - pfl->cfi_table[0x33] =3D 'I'; + pfl->cfi_table[0x00 + pri_ofs] =3D 'P'; + pfl->cfi_table[0x01 + pri_ofs] =3D 'R'; + pfl->cfi_table[0x02 + pri_ofs] =3D 'I'; =20 - pfl->cfi_table[0x34] =3D '1'; - pfl->cfi_table[0x35] =3D '0'; + pfl->cfi_table[0x03 + pri_ofs] =3D '1'; + pfl->cfi_table[0x04 + pri_ofs] =3D '0'; =20 - pfl->cfi_table[0x36] =3D 0x00; - pfl->cfi_table[0x37] =3D 0x00; - pfl->cfi_table[0x38] =3D 0x00; - pfl->cfi_table[0x39] =3D 0x00; + pfl->cfi_table[0x05 + pri_ofs] =3D 0x00; /* Optional features */ + pfl->cfi_table[0x06 + pri_ofs] =3D 0x00; + pfl->cfi_table[0x07 + pri_ofs] =3D 0x00; + pfl->cfi_table[0x08 + pri_ofs] =3D 0x00; =20 - pfl->cfi_table[0x3a] =3D 0x00; + pfl->cfi_table[0x09 + pri_ofs] =3D 0x00; /* Func. supported after susp= end */ =20 - pfl->cfi_table[0x3b] =3D 0x00; - pfl->cfi_table[0x3c] =3D 0x00; + pfl->cfi_table[0x0a + pri_ofs] =3D 0x00; /* Block status register mask= */ + pfl->cfi_table[0x0b + pri_ofs] =3D 0x00; =20 - pfl->cfi_table[0x3f] =3D 0x01; /* Number of protection fields */ + pfl->cfi_table[0x0e + pri_ofs] =3D 0x01; /* Number of protection field= s */ + assert(0x0e + pri_ofs < ARRAY_SIZE(pfl->cfi_table)); } =20 static void pflash_cfi01_system_reset(DeviceState *dev) --=20 2.20.1