From nobody Sat May 18 05:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1562334792; cv=none; d=zoho.com; s=zohoarc; b=FNccAhBFbiKpY/AqieLWcZAbNmb7VlTWW/YMxxHSq+zbTIy28sq9KnDkrGRu3P+nqraJeCixKNR8u5mhJ/3om9TBS7h90UCwGTp2mEQfAxjrk9RSBuLLJL46aVEGftxf8KRxOdpDg19cgzOFeZNgrSOSrbQuBi2IoQHgtivCwHI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1562334792; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=ZXTTitjrlnMhFor9Cqx0qItXOKR5F61GChUZrdr+4j8=; b=SAzVfcsP8kVizPzuwFFvDjkUZGaKmukzjCvdfftX6L6+vfJVVKXI02JnyTmiLRXEjdrgRQrjHrw0QcN0r8oVwV1VeqCHl36mFhi4l1Ib/fhxvzpDiRfrNA6ZifJLWksEUJQ8GWSWLk/eUGGXkdl8KNR5h+a0xaOZosE3oOKjGYw= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1562334792361713.1216629213036; Fri, 5 Jul 2019 06:53:12 -0700 (PDT) Received: from localhost ([::1]:53356 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hjOe8-0004nr-Ru for importer@patchew.org; Fri, 05 Jul 2019 09:53:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40927) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hjOUG-0007hz-NP for qemu-devel@nongnu.org; Fri, 05 Jul 2019 09:42:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hjOUE-0007oy-Ez for qemu-devel@nongnu.org; Fri, 05 Jul 2019 09:42:52 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46760) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hjOUE-0007h8-75 for qemu-devel@nongnu.org; Fri, 05 Jul 2019 09:42:50 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 853B7C050003; Fri, 5 Jul 2019 13:42:43 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-90.ams2.redhat.com [10.36.116.90]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8687F8069A; Fri, 5 Jul 2019 13:42:40 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 9C85917444; Fri, 5 Jul 2019 15:42:39 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 15:42:36 +0200 Message-Id: <20190705134239.11718-2-kraxel@redhat.com> In-Reply-To: <20190705134239.11718-1-kraxel@redhat.com> References: <20190705134239.11718-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Fri, 05 Jul 2019 13:42:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 1/4] ati-vga: Improve readability of ati_2d_blt function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: BALATON Zoltan Move common parts before the switch to remove code duplication and improve readibility. Signed-off-by: BALATON Zoltan Message-id: 04b67ff483223d4722b0b044192558e7d17b36b5.1562151410.git.balaton= @eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati_2d.c | 80 +++++++++++++++++++-------------------------- 1 file changed, 33 insertions(+), 47 deletions(-) diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c index 2dbf53f03936..c31142af6e19 100644 --- a/hw/display/ati_2d.c +++ b/hw/display/ati_2d.c @@ -42,6 +42,8 @@ static int ati_bpp_from_datatype(ATIVGAState *s) } } =20 +#define DEFAULT_CNTL (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CN= TL) + void ati_2d_blt(ATIVGAState *s) { /* FIXME it is probably more complex than this and may need to be */ @@ -51,6 +53,22 @@ void ati_2d_blt(ATIVGAState *s) s->vga.vbe_start_addr, surface_data(ds), surface_stride(ds), surface_bits_per_pixel(ds), (s->regs.dp_mix & GMC_ROP3_MASK) >> 16); + int bpp =3D ati_bpp_from_datatype(s); + int dst_stride =3D DEFAULT_CNTL ? s->regs.dst_pitch : s->regs.default_= pitch; + uint8_t *dst_bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? + s->regs.dst_offset : s->regs.default_offset); + + if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { + dst_bits +=3D s->regs.crtc_offset & 0x07ffffff; + dst_stride *=3D bpp; + } + uint8_t *end =3D s->vga.vram_ptr + s->vga.vram_size; + if (dst_bits >=3D end || + dst_bits + s->regs.dst_x + (s->regs.dst_y + s->regs.dst_height) * + dst_stride >=3D end) { + qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); + return; + } DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d\n", s->regs.src_offset, s->regs.dst_offset, s->regs.default_offset, s->regs.src_pitch, s->regs.dst_pitch, s->regs.default_pitch, @@ -59,41 +77,28 @@ void ati_2d_blt(ATIVGAState *s) switch (s->regs.dp_mix & GMC_ROP3_MASK) { case ROP3_SRCCOPY: { - uint8_t *src_bits, *dst_bits, *end; - int src_stride, dst_stride, bpp =3D ati_bpp_from_datatype(s); - src_bits =3D s->vga.vram_ptr + - (s->regs.dp_gui_master_cntl & GMC_SRC_PITCH_OFFSET_CNTL= ? - s->regs.src_offset : s->regs.default_offset); - dst_bits =3D s->vga.vram_ptr + - (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL= ? - s->regs.dst_offset : s->regs.default_offset); - src_stride =3D (s->regs.dp_gui_master_cntl & GMC_SRC_PITCH_OFFSET_= CNTL ? - s->regs.src_pitch : s->regs.default_pitch); - dst_stride =3D (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_= CNTL ? - s->regs.dst_pitch : s->regs.default_pitch); + int src_stride =3D DEFAULT_CNTL ? + s->regs.src_pitch : s->regs.default_pitch; + uint8_t *src_bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? + s->regs.src_offset : s->regs.default_offset); =20 if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { src_bits +=3D s->regs.crtc_offset & 0x07ffffff; - dst_bits +=3D s->regs.crtc_offset & 0x07ffffff; src_stride *=3D bpp; - dst_stride *=3D bpp; } + if (src_bits >=3D end || + src_bits + s->regs.src_x + (s->regs.src_y + s->regs.dst_height= ) * + src_stride >=3D end) { + qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); + return; + } + src_stride /=3D sizeof(uint32_t); dst_stride /=3D sizeof(uint32_t); - DPRINTF("pixman_blt(%p, %p, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d= )\n", src_bits, dst_bits, src_stride, dst_stride, bpp, bpp, s->regs.src_x, s->regs.src_y, s->regs.dst_x, s->regs.dst_y, s->regs.dst_width, s->regs.dst_height); - end =3D s->vga.vram_ptr + s->vga.vram_size; - if (src_bits >=3D end || dst_bits >=3D end || - src_bits + s->regs.src_x + (s->regs.src_y + s->regs.dst_height= ) * - src_stride * sizeof(uint32_t) >=3D end || - dst_bits + s->regs.dst_x + (s->regs.dst_y + s->regs.dst_height= ) * - dst_stride * sizeof(uint32_t) >=3D end) { - qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); - return; - } pixman_blt((uint32_t *)src_bits, (uint32_t *)dst_bits, src_stride, dst_stride, bpp, bpp, s->regs.src_x, s->regs.src_y, @@ -115,20 +120,7 @@ void ati_2d_blt(ATIVGAState *s) case ROP3_BLACKNESS: case ROP3_WHITENESS: { - uint8_t *dst_bits, *end; - int dst_stride, bpp =3D ati_bpp_from_datatype(s); uint32_t filler =3D 0; - dst_bits =3D s->vga.vram_ptr + - (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_CNTL= ? - s->regs.dst_offset : s->regs.default_offset); - dst_stride =3D (s->regs.dp_gui_master_cntl & GMC_DST_PITCH_OFFSET_= CNTL ? - s->regs.dst_pitch : s->regs.default_pitch); - - if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { - dst_bits +=3D s->regs.crtc_offset & 0x07ffffff; - dst_stride *=3D bpp; - } - dst_stride /=3D sizeof(uint32_t); =20 switch (s->regs.dp_mix & GMC_ROP3_MASK) { case ROP3_PATCOPY: @@ -144,22 +136,16 @@ void ati_2d_blt(ATIVGAState *s) break; } =20 + dst_stride /=3D sizeof(uint32_t); DPRINTF("pixman_fill(%p, %d, %d, %d, %d, %d, %d, %x)\n", dst_bits, dst_stride, bpp, s->regs.dst_x, s->regs.dst_y, s->regs.dst_width, s->regs.dst_height, filler); - end =3D s->vga.vram_ptr + s->vga.vram_size; - if (dst_bits >=3D end || - dst_bits + s->regs.dst_x + (s->regs.dst_y + s->regs.dst_height= ) * - dst_stride * sizeof(uint32_t) >=3D end) { - qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); - return; - } pixman_fill((uint32_t *)dst_bits, dst_stride, bpp, - s->regs.dst_x, s->regs.dst_y, - s->regs.dst_width, s->regs.dst_height, - filler); + s->regs.dst_x, s->regs.dst_y, + s->regs.dst_width, s->regs.dst_height, + filler); if (dst_bits >=3D s->vga.vram_ptr + s->vga.vbe_start_addr && dst_bits < s->vga.vram_ptr + s->vga.vbe_start_addr + s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset= ) { --=20 2.18.1 From nobody Sat May 18 05:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; 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Fri, 05 Jul 2019 09:42:49 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 90254300DA2B; Fri, 5 Jul 2019 13:42:43 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-90.ams2.redhat.com [10.36.116.90]) by smtp.corp.redhat.com (Postfix) with ESMTP id AE47317F22; Fri, 5 Jul 2019 13:42:40 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id A5AF017473; Fri, 5 Jul 2019 15:42:39 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 15:42:37 +0200 Message-Id: <20190705134239.11718-3-kraxel@redhat.com> In-Reply-To: <20190705134239.11718-1-kraxel@redhat.com> References: <20190705134239.11718-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.47]); Fri, 05 Jul 2019 13:42:43 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 2/4] ati-vga: Fix frame buffer endianness for big endian target X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: BALATON Zoltan The extended mode frame buffer should be little endian even when emulating big endian machine (such as PPC). This fixes color problems with MorphOS. Signed-off-by: BALATON Zoltan Message-id: 439aa85061f103446df7b42632d730971a372432.1562151410.git.balaton= @eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 1 + hw/display/ati_2d.c | 10 +++++----- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/hw/display/ati.c b/hw/display/ati.c index c1d9d1518f4a..590362ea568c 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -89,6 +89,7 @@ static void ati_vga_switch_mode(ATIVGAState *s) DPRINTF("Switching to %dx%d %d %d @ %x\n", h, v, stride, bpp, = offs); vbe_ioport_write_index(&s->vga, 0, VBE_DISPI_INDEX_ENABLE); vbe_ioport_write_data(&s->vga, 0, VBE_DISPI_DISABLED); + s->vga.big_endian_fb =3D false; /* reset VBE regs then set up mode */ s->vga.vbe_regs[VBE_DISPI_INDEX_XRES] =3D h; s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] =3D v; diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c index c31142af6e19..b09753320a9e 100644 --- a/hw/display/ati_2d.c +++ b/hw/display/ati_2d.c @@ -124,15 +124,15 @@ void ati_2d_blt(ATIVGAState *s) =20 switch (s->regs.dp_mix & GMC_ROP3_MASK) { case ROP3_PATCOPY: - filler =3D bswap32(s->regs.dp_brush_frgd_clr); + filler =3D s->regs.dp_brush_frgd_clr; break; case ROP3_BLACKNESS: - filler =3D rgb_to_pixel32(s->vga.palette[0], s->vga.palette[1], - s->vga.palette[2]) << 8 | 0xff; + filler =3D 0xffUL << 24 | rgb_to_pixel32(s->vga.palette[0], + s->vga.palette[1], s->vga.palette[2]); break; case ROP3_WHITENESS: - filler =3D rgb_to_pixel32(s->vga.palette[3], s->vga.palette[4], - s->vga.palette[5]) << 8 | 0xff; + filler =3D 0xffUL << 24 | rgb_to_pixel32(s->vga.palette[3], + s->vga.palette[4], s->vga.palette[5]); break; } =20 --=20 2.18.1 From nobody Sat May 18 05:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; 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Fri, 5 Jul 2019 13:42:43 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-90.ams2.redhat.com [10.36.116.90]) by smtp.corp.redhat.com (Postfix) with ESMTP id 86C0817AD4; Fri, 5 Jul 2019 13:42:40 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id AD8B517515; Fri, 5 Jul 2019 15:42:39 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 15:42:38 +0200 Message-Id: <20190705134239.11718-4-kraxel@redhat.com> In-Reply-To: <20190705134239.11718-1-kraxel@redhat.com> References: <20190705134239.11718-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Fri, 05 Jul 2019 13:42:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 3/4] ati-vga: Fix reverse bit blts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: BALATON Zoltan The pixman library only supports blts with left to right, top to bottom order but the ATI VGA engine can also do different directions. Fix support for these via a temporary buffer for now. This fixes rendering issues related to such blts (such as moving windows) but some other glitches still remain. Signed-off-by: BALATON Zoltan Message-id: e21855faaeb30d7b1771f084f283f6a30bedb1a3.1562227303.git.balaton= @eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati_2d.c | 55 ++++++++++++++++++++++++++++++++------------- 1 file changed, 40 insertions(+), 15 deletions(-) diff --git a/hw/display/ati_2d.c b/hw/display/ati_2d.c index b09753320a9e..42e82311eb44 100644 --- a/hw/display/ati_2d.c +++ b/hw/display/ati_2d.c @@ -53,6 +53,10 @@ void ati_2d_blt(ATIVGAState *s) s->vga.vbe_start_addr, surface_data(ds), surface_stride(ds), surface_bits_per_pixel(ds), (s->regs.dp_mix & GMC_ROP3_MASK) >> 16); + int dst_x =3D (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? + s->regs.dst_x : s->regs.dst_x + 1 - s->regs.dst_width); + int dst_y =3D (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? + s->regs.dst_y : s->regs.dst_y + 1 - s->regs.dst_height); int bpp =3D ati_bpp_from_datatype(s); int dst_stride =3D DEFAULT_CNTL ? s->regs.dst_pitch : s->regs.default_= pitch; uint8_t *dst_bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? @@ -63,20 +67,25 @@ void ati_2d_blt(ATIVGAState *s) dst_stride *=3D bpp; } uint8_t *end =3D s->vga.vram_ptr + s->vga.vram_size; - if (dst_bits >=3D end || - dst_bits + s->regs.dst_x + (s->regs.dst_y + s->regs.dst_height) * + if (dst_bits >=3D end || dst_bits + dst_x + (dst_y + s->regs.dst_heigh= t) * dst_stride >=3D end) { qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); return; } - DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d\n", + DPRINTF("%d %d %d, %d %d %d, (%d,%d) -> (%d,%d) %dx%d %c %c\n", s->regs.src_offset, s->regs.dst_offset, s->regs.default_offset, s->regs.src_pitch, s->regs.dst_pitch, s->regs.default_pitch, s->regs.src_x, s->regs.src_y, s->regs.dst_x, s->regs.dst_y, - s->regs.dst_width, s->regs.dst_height); + s->regs.dst_width, s->regs.dst_height, + (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? '>' : '<'), + (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? 'v' : '^')); switch (s->regs.dp_mix & GMC_ROP3_MASK) { case ROP3_SRCCOPY: { + int src_x =3D (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT ? + s->regs.src_x : s->regs.src_x + 1 - s->regs.dst_width= ); + int src_y =3D (s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM ? + s->regs.src_y : s->regs.src_y + 1 - s->regs.dst_heigh= t); int src_stride =3D DEFAULT_CNTL ? s->regs.src_pitch : s->regs.default_pitch; uint8_t *src_bits =3D s->vga.vram_ptr + (DEFAULT_CNTL ? @@ -86,9 +95,8 @@ void ati_2d_blt(ATIVGAState *s) src_bits +=3D s->regs.crtc_offset & 0x07ffffff; src_stride *=3D bpp; } - if (src_bits >=3D end || - src_bits + s->regs.src_x + (s->regs.src_y + s->regs.dst_height= ) * - src_stride >=3D end) { + if (src_bits >=3D end || src_bits + src_x + + (src_y + s->regs.dst_height) * src_stride >=3D end) { qemu_log_mask(LOG_UNIMP, "blt outside vram not implemented\n"); return; } @@ -97,19 +105,36 @@ void ati_2d_blt(ATIVGAState *s) dst_stride /=3D sizeof(uint32_t); DPRINTF("pixman_blt(%p, %p, %d, %d, %d, %d, %d, %d, %d, %d, %d, %d= )\n", src_bits, dst_bits, src_stride, dst_stride, bpp, bpp, - s->regs.src_x, s->regs.src_y, s->regs.dst_x, s->regs.dst_y, + src_x, src_y, dst_x, dst_y, s->regs.dst_width, s->regs.dst_height); - pixman_blt((uint32_t *)src_bits, (uint32_t *)dst_bits, - src_stride, dst_stride, bpp, bpp, - s->regs.src_x, s->regs.src_y, - s->regs.dst_x, s->regs.dst_y, - s->regs.dst_width, s->regs.dst_height); + if (s->regs.dp_cntl & DST_X_LEFT_TO_RIGHT && + s->regs.dp_cntl & DST_Y_TOP_TO_BOTTOM) { + pixman_blt((uint32_t *)src_bits, (uint32_t *)dst_bits, + src_stride, dst_stride, bpp, bpp, + src_x, src_y, dst_x, dst_y, + s->regs.dst_width, s->regs.dst_height); + } else { + /* FIXME: We only really need a temporary if src and dst overl= ap */ + int llb =3D s->regs.dst_width * (bpp / 8); + int tmp_stride =3D DIV_ROUND_UP(llb, sizeof(uint32_t)); + uint32_t *tmp =3D g_malloc(tmp_stride * sizeof(uint32_t) * + s->regs.dst_height); + pixman_blt((uint32_t *)src_bits, tmp, + src_stride, tmp_stride, bpp, bpp, + src_x, src_y, 0, 0, + s->regs.dst_width, s->regs.dst_height); + pixman_blt(tmp, (uint32_t *)dst_bits, + tmp_stride, dst_stride, bpp, bpp, + 0, 0, dst_x, dst_y, + s->regs.dst_width, s->regs.dst_height); + g_free(tmp); + } if (dst_bits >=3D s->vga.vram_ptr + s->vga.vbe_start_addr && dst_bits < s->vga.vram_ptr + s->vga.vbe_start_addr + s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset= ) { memory_region_set_dirty(&s->vga.vram, s->vga.vbe_start_addr + s->regs.dst_offset + - s->regs.dst_y * surface_stride(ds), + dst_y * surface_stride(ds), s->regs.dst_height * surface_stride(ds= )); } s->regs.dst_x +=3D s->regs.dst_width; @@ -151,7 +176,7 @@ void ati_2d_blt(ATIVGAState *s) s->vga.vbe_regs[VBE_DISPI_INDEX_YRES] * s->vga.vbe_line_offset= ) { memory_region_set_dirty(&s->vga.vram, s->vga.vbe_start_addr + s->regs.dst_offset + - s->regs.dst_y * surface_stride(ds), + dst_y * surface_stride(ds), s->regs.dst_height * surface_stride(ds= )); } s->regs.dst_y +=3D s->regs.dst_height; --=20 2.18.1 From nobody Sat May 18 05:04:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Fri, 05 Jul 2019 09:42:46 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 279318830B; Fri, 5 Jul 2019 13:42:44 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-90.ams2.redhat.com [10.36.116.90]) by smtp.corp.redhat.com (Postfix) with ESMTP id AE497860E3; Fri, 5 Jul 2019 13:42:40 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id B561117534; Fri, 5 Jul 2019 15:42:39 +0200 (CEST) From: Gerd Hoffmann To: qemu-devel@nongnu.org Date: Fri, 5 Jul 2019 15:42:39 +0200 Message-Id: <20190705134239.11718-5-kraxel@redhat.com> In-Reply-To: <20190705134239.11718-1-kraxel@redhat.com> References: <20190705134239.11718-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 05 Jul 2019 13:42:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 4/4] ati-vga: Fix setting offset together with pitch for r128pro X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: BALATON Zoltan Turns out my last fix to this broke one case for Rage 128 Pro so revert that part of previous patch. This now fixes the remaining rendering problems for MorphOS which now can produce picture with -device ati-vga (although it may not be optimised yet and video overlay emulation is still known to be missing). Fixes: 866ad5f5ff620078f88183aa254f7b02727e6aa3 Signed-off-by: BALATON Zoltan Message-id: da33261a841755691f698db8190c868df0c0d3ae.1562276605.git.balaton= @eik.bme.hu Signed-off-by: Gerd Hoffmann --- hw/display/ati.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/display/ati.c b/hw/display/ati.c index 590362ea568c..a747c4cc98c7 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -689,7 +689,7 @@ static void ati_mm_write(void *opaque, hwaddr addr, break; case SRC_PITCH_OFFSET: if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { - s->regs.src_offset =3D (data & 0x1fffff) << 4; + s->regs.src_offset =3D (data & 0x1fffff) << 5; s->regs.src_pitch =3D (data & 0x7fe00000) >> 21; s->regs.src_tile =3D data >> 31; } else { @@ -700,7 +700,7 @@ static void ati_mm_write(void *opaque, hwaddr addr, break; case DST_PITCH_OFFSET: if (s->dev_id =3D=3D PCI_DEVICE_ID_ATI_RAGE128_PF) { - s->regs.dst_offset =3D (data & 0x1fffff) << 4; + s->regs.dst_offset =3D (data & 0x1fffff) << 5; s->regs.dst_pitch =3D (data & 0x7fe00000) >> 21; s->regs.dst_tile =3D data >> 31; } else { --=20 2.18.1