From nobody Mon Feb 9 09:33:32 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1562037269; cv=none; d=zoho.com; s=zohoarc; b=arKVYAjMYyAgLokY9voaZ0Pq7PCYykkcbL5lr/vbCiduJ5TzU4ELQ1dgl8s1o4MjKmPW3liInRyaNjwY2dYFBu1I8BYoYSoWH45mpQx/98EBQDtJPnB//lR1KX0d6vXsm6tA3l2xi+FGah2H0PFaJYdlsWQph4vOHpQKell7+SY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1562037269; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=86b3a1xJfma5A9tMa8Ytn9XAT92HPBNuARql80Zg+b8=; b=aOz6I69f88ieyGxS509GY8LYfVCIoigZvzFypTHjsqSiPtsLCPU/dvwvoXvEG4sC2Ylzw2R7VS36UT19IwUzCmcelenjArge551TYXGrNKHfWbf3flLWQ6YIu75D88CedwgMLTb5CtWKZcKf1zS9mEi034Gec4aZugZKfif/zt8= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 1562037269537320.0639435997108; Mon, 1 Jul 2019 20:14:29 -0700 (PDT) Received: from localhost ([::1]:47852 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hi9FN-0004E8-UJ for importer@patchew.org; Mon, 01 Jul 2019 23:14:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58550) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hi6v4-0007Ya-KI for qemu-devel@nongnu.org; Mon, 01 Jul 2019 20:45:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hi6VJ-0008JI-Fy for qemu-devel@nongnu.org; Mon, 01 Jul 2019 20:18:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:53582) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hi6TL-0007ZO-7s; Mon, 01 Jul 2019 20:16:41 -0400 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 39F236EB96; Tue, 2 Jul 2019 00:16:32 +0000 (UTC) Received: from x1w.redhat.com (ovpn-204-21.brq.redhat.com [10.40.204.21]) by smtp.corp.redhat.com (Postfix) with ESMTPS id DC2361001B32; Tue, 2 Jul 2019 00:16:10 +0000 (UTC) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Date: Tue, 2 Jul 2019 02:13:01 +0200 Message-Id: <20190702001301.4768-10-philmd@redhat.com> In-Reply-To: <20190702001301.4768-1-philmd@redhat.com> References: <20190702001301.4768-1-philmd@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Tue, 02 Jul 2019 00:16:32 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v2 9/9] hw/block/pflash_cfi01: Hold the PRI table offset in a variable X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Michael S. Tsirkin" , Max Filippov , Gerd Hoffmann , "Edgar E. Iglesias" , qemu-block@nongnu.org, Aleksandar Rikalo , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Markus Armbruster , Laszlo Ersek , David Gibson , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Eduardo Habkost , qemu-arm@nongnu.org, Alistair Francis , John Snow , Richard Henderson , Kevin Wolf , Max Reitz , Michael Walle , qemu-ppc@nongnu.org, Wei Yang , Aleksandar Markovic , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" Manufacturers are allowed to move the PRI table, this is why the offset is queryable via fixed offsets 0x15/0x16. Add a variable to hold the offset, so it will be easier to later move the PRI table. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis --- hw/block/pflash_cfi01.c | 41 ++++++++++++++++++++++++++--------------- 1 file changed, 26 insertions(+), 15 deletions(-) diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c index e891112b67..f65840eb2b 100644 --- a/hw/block/pflash_cfi01.c +++ b/hw/block/pflash_cfi01.c @@ -762,6 +762,7 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) } =20 /* Hardcoded CFI table */ + const uint16_t pri_ofs =3D 0x31; /* Standard "QRY" string */ pfl->cfi_table[0x10] =3D 'Q'; pfl->cfi_table[0x11] =3D 'R'; @@ -770,14 +771,17 @@ static void pflash_cfi01_realize(DeviceState *dev, Er= ror **errp) pfl->cfi_table[0x13] =3D 0x01; pfl->cfi_table[0x14] =3D 0x00; /* Primary extended table address (none) */ - pfl->cfi_table[0x15] =3D 0x31; - pfl->cfi_table[0x16] =3D 0x00; + pfl->cfi_table[0x15] =3D pri_ofs; + pfl->cfi_table[0x16] =3D pri_ofs >> 8; /* Alternate command set (none) */ pfl->cfi_table[0x17] =3D 0x00; pfl->cfi_table[0x18] =3D 0x00; /* Alternate extended table (none) */ pfl->cfi_table[0x19] =3D 0x00; pfl->cfi_table[0x1A] =3D 0x00; + + /* CFI: System Interface Information */ + /* Vcc min */ pfl->cfi_table[0x1B] =3D 0x45; /* Vcc max */ @@ -802,6 +806,9 @@ static void pflash_cfi01_realize(DeviceState *dev, Erro= r **errp) pfl->cfi_table[0x25] =3D 0x04; /* Max timeout for chip erase */ pfl->cfi_table[0x26] =3D 0x00; + + /* CFI: Device Geometry Definition */ + /* Device size */ pfl->cfi_table[0x27] =3D ctz32(device_len); /* + 1; */ /* Flash device interface (8 & 16 bits) */ @@ -826,26 +833,30 @@ static void pflash_cfi01_realize(DeviceState *dev, Er= ror **errp) pfl->cfi_table[0x2E] =3D (blocks_per_device - 1) >> 8; pfl->cfi_table[0x2F] =3D sector_len_per_device >> 8; pfl->cfi_table[0x30] =3D sector_len_per_device >> 16; + assert(0x30 < pri_ofs); + + /* CFI: Primary-Vendor Specific */ =20 /* Extended */ - pfl->cfi_table[0x31] =3D 'P'; - pfl->cfi_table[0x32] =3D 'R'; - pfl->cfi_table[0x33] =3D 'I'; + pfl->cfi_table[0x00 + pri_ofs] =3D 'P'; + pfl->cfi_table[0x01 + pri_ofs] =3D 'R'; + pfl->cfi_table[0x02 + pri_ofs] =3D 'I'; =20 - pfl->cfi_table[0x34] =3D '1'; - pfl->cfi_table[0x35] =3D '0'; + pfl->cfi_table[0x03 + pri_ofs] =3D '1'; + pfl->cfi_table[0x04 + pri_ofs] =3D '0'; =20 - pfl->cfi_table[0x36] =3D 0x00; - pfl->cfi_table[0x37] =3D 0x00; - pfl->cfi_table[0x38] =3D 0x00; - pfl->cfi_table[0x39] =3D 0x00; + pfl->cfi_table[0x05 + pri_ofs] =3D 0x00; /* Optional features */ + pfl->cfi_table[0x06 + pri_ofs] =3D 0x00; + pfl->cfi_table[0x07 + pri_ofs] =3D 0x00; + pfl->cfi_table[0x08 + pri_ofs] =3D 0x00; =20 - pfl->cfi_table[0x3a] =3D 0x00; + pfl->cfi_table[0x09 + pri_ofs] =3D 0x00; /* Func. supported after susp= end */ =20 - pfl->cfi_table[0x3b] =3D 0x00; - pfl->cfi_table[0x3c] =3D 0x00; + pfl->cfi_table[0x0a + pri_ofs] =3D 0x00; /* Block status register mask= */ + pfl->cfi_table[0x0b + pri_ofs] =3D 0x00; =20 - pfl->cfi_table[0x3f] =3D 0x01; /* Number of protection fields */ + pfl->cfi_table[0x0e + pri_ofs] =3D 0x01; /* Number of protection field= s */ + assert(0x0e + pri_ofs < ARRAY_SIZE(pfl->cfi_table)); } =20 static void pflash_cfi01_system_reset(DeviceState *dev) --=20 2.20.1