From nobody Thu Dec 18 19:32:26 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1562029958; cv=none; d=zoho.com; s=zohoarc; b=Vv0IPMBn+VwsAl4bES0acIGebuTKBWSaVf/jCRZur6UgBH0KmcB59HkJWuktgjhGDmjoWQp+FnCdHSPcBWPxSVKn8hnxVhMPGimsyCdJn0J0q5vpldMNeb8o8ODlyw1JYXBBVUa2M074kgnBXTLdTCeZ4Nge6zDpMrvSmOqwD/w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1562029958; h=Content-Transfer-Encoding:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=rnHrhKlg4rPjTPEn7YeLUI7OUdliTbLuOiEfOpcbWYc=; b=IFlmdvxQEVLTU69CO/RZjWEX6nEU6U+/CMzh6svFba2tB+JymX4ICi3v2CAHwKhuemDhS9zoJUBgAmovCJoXjkAgCT7uDqqOgK8gk+B0Z3Sf/nk2/SXLhvjUMerw5PlXV0m9ckTGFLqf210M11b7VvGuNsb5Zz5I4mOljPjJYZI= ARC-Authentication-Results: i=1; mx.zoho.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 156202995886780.51796775885498; Mon, 1 Jul 2019 18:12:38 -0700 (PDT) Received: from localhost ([::1]:46700 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hi768-0000Qu-SG for importer@patchew.org; Mon, 01 Jul 2019 20:56:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48855) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hi42m-0006kp-Rd for qemu-devel@nongnu.org; Mon, 01 Jul 2019 17:41:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hi42l-0004on-Pf for qemu-devel@nongnu.org; Mon, 01 Jul 2019 17:41:00 -0400 Received: from mail-wr1-f66.google.com ([209.85.221.66]:43714) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1hi42l-0004nU-Id for qemu-devel@nongnu.org; Mon, 01 Jul 2019 17:40:59 -0400 Received: by mail-wr1-f66.google.com with SMTP id p13so15363850wru.10 for ; Mon, 01 Jul 2019 14:40:56 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id o6sm26573508wra.27.2019.07.01.09.39.50 for (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Mon, 01 Jul 2019 09:39:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=rnHrhKlg4rPjTPEn7YeLUI7OUdliTbLuOiEfOpcbWYc=; b=t5zliwsZ5Hwp0hVTa/zzs3QODp6L6rpRk23Kf6qKZb61KucKyX/GI43dj18RRcwGBx L3B69Gp87ycvZq9Uhi/5B6t6KXlfEhrCYPeN/B8xlUO6GWSdYjo7IRSCyITpPmVMBXcx s/2FMSY4zo8tAWNsLD9P5a6woiggfO2So2y/EOwzTp1N7FYL8W0quimlhiXJYFppqLbt B0yjGhmwCoRUJMVknYNctLYGMm0b1LxCeulJxcuMeQLxQ/Cq/AhEombVyN6w+dUy41/c bowumHeP7mDPT1gEyRg7N2pwn1qD/Eyjo0gUhrJjiSlTq7NORcnMO5gjfD3TeFh3tS9W I7fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rnHrhKlg4rPjTPEn7YeLUI7OUdliTbLuOiEfOpcbWYc=; b=WkbYA1aCj2rwGOap46NWJmmTB3rbUarARw5AS7q2ZQ0BNedgQCoEmi9s6eUSQzSK5g ejQmiF2rJBmnW4g7c/+1nhD1m3Gd43OiixJJ/w7QPBjzkuB5wh19gbMS+q4HJxbl4zVq QXXDwiAD7ulrBh3DRiHkv/0+WXX7cjsJyPsgAtWgBhCn1GwyYNBJs/ZFN5p74pmwfDA4 +SqRzpQ7yPFVMtP3EX8mS/1LmnFMQLsyYx6EMBzwp6ADmLq3TSGyFCEDbciLpvbWHUcM bEgjzski6eMfdoRZZBxSyAiLyVCrfrF0AxMhaaCFg0/sFTAvBwaiNJg7A6IzaOdHqeAJ C95A== X-Gm-Message-State: APjAAAVDRG2+9XUIhzBq6SciFc59Zdo0U1HHYoxFu2pH6+977EkTVS77 K0OptQCCh859tl/U1ao3kKD7v3X+NXj8xA== X-Google-Smtp-Source: APXvYqzSnavuc+sA/3DP4G5/6vuE2nV96qOE/ItV/ZSfDLX8NXq0J5edWyx2UEhIis/aDfYkizou+w== X-Received: by 2002:adf:f042:: with SMTP id t2mr6306647wro.299.1561999190855; Mon, 01 Jul 2019 09:39:50 -0700 (PDT) From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 1 Jul 2019 17:39:03 +0100 Message-Id: <20190701163943.22313-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190701163943.22313-1-peter.maydell@linaro.org> References: <20190701163943.22313-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.221.66 Subject: [Qemu-devel] [PULL 06/46] pci: designware: Update MSI mapping unconditionally X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" From: Andrey Smirnov Expression to calculate update_msi_mapping in code handling writes to DESIGNWARE_PCIE_MSI_INTR0_ENABLE is missing an ! operator and should be: !!root->msi.intr[0].enable ^ !!val; so that MSI mapping is updated when enabled transitions from either "none" -> "any" or "any" -> "none". Since that register shouldn't be written to very often, change the code to update MSI mapping unconditionally instead of trying to fix the update_msi_mapping logic. Signed-off-by: Andrey Smirnov Cc: Peter Maydell Cc: Michael S. Tsirkin Cc: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Acked-by: Michael S. Tsirkin Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/pci-host/designware.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 0fdfff57848..ec697c8f9df 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -297,16 +297,10 @@ static void designware_pcie_root_config_write(PCIDevi= ce *d, uint32_t address, root->msi.base |=3D (uint64_t)val << 32; break; =20 - case DESIGNWARE_PCIE_MSI_INTR0_ENABLE: { - const bool update_msi_mapping =3D !root->msi.intr[0].enable ^ !!va= l; - + case DESIGNWARE_PCIE_MSI_INTR0_ENABLE: root->msi.intr[0].enable =3D val; - - if (update_msi_mapping) { - designware_pcie_root_update_msi_mapping(root); - } + designware_pcie_root_update_msi_mapping(root); break; - } =20 case DESIGNWARE_PCIE_MSI_INTR0_MASK: root->msi.intr[0].mask =3D val; --=20 2.20.1