From nobody Tue Oct 7 20:21:06 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com ARC-Seal: i=1; a=rsa-sha256; t=1561687632; cv=none; d=zoho.com; s=zohoarc; b=cmb5Xf+Dw4huR4h2pp2LNqx4nWvw6vLtf+vXKG5Fr8pyKhlCtt6B7/w6UwuvLRM52/ZRO9NB2QGDg4GcfizDvwJVpmu7+mrenpKxmHczuyK7QgVCQCo5F44MVnKhfEXt3gAjltAz3Kc9tZmOnux7hpTr7SROH7KT0ggFIPczT2s= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561687632; h=Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=bRf1hLHu/vcOuyYxX/fpgt81msTvXpCc+W6ZzOxKSfM=; b=ZJHwRAkw90XbTwUvcjMUDDz2gd0NBzgcU2eyWq/D0YlhvciR/5vRZpu7fUG1eoL70c4O5lq30MAfIytOwEMlMk0MjFRQW8IpLH1bhdVg+cFm+olOFm5CDqpV8e04YAqvhS8Y4EdeaAwfERXYDPdEkM9bDl1dZLpf7LiBAHmRxK4= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1561687632944145.55408630727356; Thu, 27 Jun 2019 19:07:12 -0700 (PDT) Received: from localhost ([::1]:55650 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hggI8-0002EW-3Y for importer@patchew.org; Thu, 27 Jun 2019 22:07:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49890) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hgg83-0000aA-1B for qemu-devel@nongnu.org; Thu, 27 Jun 2019 21:56:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hgg81-0008Hm-RG for qemu-devel@nongnu.org; Thu, 27 Jun 2019 21:56:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49552) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hgg81-0008FL-JK for qemu-devel@nongnu.org; Thu, 27 Jun 2019 21:56:41 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 983273082126; Fri, 28 Jun 2019 01:56:40 +0000 (UTC) Received: from localhost (ovpn-116-7.gru2.redhat.com [10.97.116.7]) by smtp.corp.redhat.com (Postfix) with ESMTP id 18FBA608A7; Fri, 28 Jun 2019 01:56:39 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , qemu-devel@nongnu.org, Marcel Apfelbaum Date: Thu, 27 Jun 2019 22:55:48 -0300 Message-Id: <20190628015606.32107-12-ehabkost@redhat.com> In-Reply-To: <20190628015606.32107-1-ehabkost@redhat.com> References: <20190628015606.32107-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.42]); Fri, 28 Jun 2019 01:56:40 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 11/29] i386: Add die-level cpu topology to x86CPU on PCMachine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Like Xu , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Like Xu The die-level as the first PC-specific cpu topology is added to the leagcy cpu topology model, which has one die per package implicitly and only the numbers of sockets/cores/threads are configurable. In the new model with die-level support, the total number of logical processors (including offline) on board will be calculated as: #cpus =3D #sockets * #dies * #cores * #threads and considering compatibility, the default value for #dies would be initialized to one in x86_cpu_initfn() and pc_machine_initfn(). Signed-off-by: Like Xu Message-Id: <20190612084104.34984-2-like.xu@linux.intel.com> Reviewed-by: Eduardo Habkost Signed-off-by: Eduardo Habkost --- include/hw/i386/pc.h | 2 ++ target/i386/cpu.h | 2 ++ hw/i386/pc.c | 9 +++++++-- target/i386/cpu.c | 1 + 4 files changed, 12 insertions(+), 2 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 884e35b9b2..764996e6b4 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -24,6 +24,7 @@ * PCMachineState: * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling * @boot_cpus: number of present VCPUs + * @smp_dies: number of dies per one package */ struct PCMachineState { /*< private >*/ @@ -59,6 +60,7 @@ struct PCMachineState { bool apic_xrupt_override; unsigned apic_id_limit; uint16_t boot_cpus; + unsigned smp_dies; =20 /* NUMA information: */ uint64_t numa_nodes; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 93345792f4..14c19e61b1 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1385,6 +1385,8 @@ typedef struct CPUX86State { uint64_t xss; =20 TPRAccess tpr_access_type; + + unsigned nr_dies; } CPUX86State; =20 struct kvm_msrs; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 73de30cc20..e18b1bade2 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2306,9 +2306,13 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_= dev, return; } =20 - /* if APIC ID is not set, set it based on socket/core/thread propertie= s */ + /* + * If APIC ID is not set, + * set it based on socket/die/core/thread properties. + */ if (cpu->apic_id =3D=3D UNASSIGNED_APIC_ID) { - int max_socket =3D (ms->smp.max_cpus - 1) / smp_threads / smp_core= s; + int max_socket =3D (ms->smp.max_cpus - 1) / + smp_threads / smp_cores / pcms->smp_dies; =20 if (cpu->socket_id < 0) { error_setg(errp, "CPU socket-id is not set"); @@ -2619,6 +2623,7 @@ static void pc_machine_initfn(Object *obj) pcms->smbus_enabled =3D true; pcms->sata_enabled =3D true; pcms->pit_enabled =3D true; + pcms->smp_dies =3D 1; =20 pc_system_flash_create(pcms); } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 78830d403a..fac3cc028e 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5639,6 +5639,7 @@ static void x86_cpu_initfn(Object *obj) CPUX86State *env =3D &cpu->env; FeatureWord w; =20 + env->nr_dies =3D 1; cpu_set_cpustate_pointers(cpu); =20 object_property_add(obj, "family", "int", --=20 2.18.0.rc1.1.g3f1ff2140