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X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH 09/10] hw/mips/gt64xxx_pci: Move it to hw/pci-host/ X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Aleksandar Rikalo , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Artyom Tarasenko , Aleksandar Markovic , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The GT-64120 is a north-bridge, and it is not MIPS specific. Move it with the other north-bridge devices. We move this device in the common-obj, and compile it once for the 4 different MIPS targets. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/{mips/gt64xxx_pci.c =3D> pci-host/gt64120.c} | 0 MAINTAINERS | 2 +- hw/mips/Makefile.objs | 2 +- hw/mips/trace-events | 4 ---- hw/pci-host/Makefile.objs | 2 +- hw/pci-host/trace-events | 5 +++++ 6 files changed, 8 insertions(+), 7 deletions(-) rename hw/{mips/gt64xxx_pci.c =3D> pci-host/gt64120.c} (100%) diff --git a/hw/mips/gt64xxx_pci.c b/hw/pci-host/gt64120.c similarity index 100% rename from hw/mips/gt64xxx_pci.c rename to hw/pci-host/gt64120.c diff --git a/MAINTAINERS b/MAINTAINERS index abef4a1cfc..da348e1af1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -928,7 +928,7 @@ M: Aurelien Jarno R: Aleksandar Rikalo S: Maintained F: hw/mips/mips_malta.c -F: hw/mips/gt64xxx_pci.c +F: hw/pci-host/gt64120.c F: tests/acceptance/linux_ssh_mips_malta.py =20 Mipssim diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs index 525809af07..da65e19c20 100644 --- a/hw/mips/Makefile.objs +++ b/hw/mips/Makefile.objs @@ -1,6 +1,6 @@ obj-y +=3D addr.o mips_int.o obj-$(CONFIG_R4K) +=3D mips_r4k.o -obj-$(CONFIG_MALTA) +=3D gt64xxx_pci.o mips_malta.o +obj-$(CONFIG_MALTA) +=3D mips_malta.o obj-$(CONFIG_MIPSSIM) +=3D mips_mipssim.o obj-$(CONFIG_JAZZ) +=3D mips_jazz.o obj-$(CONFIG_FULONG) +=3D mips_fulong2e.o diff --git a/hw/mips/trace-events b/hw/mips/trace-events index 75d4c73f2e..e69de29bb2 100644 --- a/hw/mips/trace-events +++ b/hw/mips/trace-events @@ -1,4 +0,0 @@ -# gt64xxx.c -gt64120_read(const char *regname, int width, uint64_t value) "gt64120 read= %s value:0x%0*" PRIx64 -gt64120_write(const char *regname, int width, uint64_t value) "gt64120 wri= te %s value:0x%0*" PRIx64 -gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_le= ngth, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRI= x64 "@0x%08" PRIx64 diff --git a/hw/pci-host/Makefile.objs b/hw/pci-host/Makefile.objs index a9cd3e022d..3e1657774d 100644 --- a/hw/pci-host/Makefile.objs +++ b/hw/pci-host/Makefile.objs @@ -17,5 +17,5 @@ common-obj-$(CONFIG_PCI_PIIX) +=3D piix.o common-obj-$(CONFIG_PCI_EXPRESS_Q35) +=3D q35.o common-obj-$(CONFIG_PCI_EXPRESS_GENERIC_BRIDGE) +=3D gpex.o common-obj-$(CONFIG_PCI_EXPRESS_XILINX) +=3D xilinx-pcie.o - +common-obj-$(CONFIG_MALTA) +=3D gt64120.o common-obj-$(CONFIG_PCI_EXPRESS_DESIGNWARE) +=3D designware.o diff --git a/hw/pci-host/trace-events b/hw/pci-host/trace-events index d19ca9aef6..eecc233670 100644 --- a/hw/pci-host/trace-events +++ b/hw/pci-host/trace-events @@ -20,3 +20,8 @@ unin_data_write(uint64_t addr, unsigned len, uint64_t val= ) "write addr 0x%"PRIx6 unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"P= RIx64 " len %d val 0x%"PRIx64 unin_write(uint64_t addr, uint64_t value) "addr=3D0x%" PRIx64 " val=3D0x%"= PRIx64 unin_read(uint64_t addr, uint64_t value) "addr=3D0x%" PRIx64 " val=3D0x%"P= RIx64 + +# gt64120.c +gt64120_read(const char *regname, int width, uint64_t value) "gt64120 read= %s value:0x%0*" PRIx64 +gt64120_write(const char *regname, int width, uint64_t value) "gt64120 wri= te %s value:0x%0*" PRIx64 +gt64120_isd_remap(uint64_t from_length, uint64_t from_addr, uint64_t to_le= ngth, uint64_t to_addr) "ISD: 0x%08" PRIx64 "@0x%08" PRIx64 " -> 0x%08" PRI= x64 "@0x%08" PRIx64 --=20 2.19.1