From nobody Mon May 20 08:27:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1561010146; cv=none; d=zoho.com; s=zohoarc; b=jMMe/O07nUfGsslDFeoB0cbP1cA2yhHI3cVppOl4Roi1wpcDSSJPCLlhijChOMPMveN/l2u1QaPB+Hx8c0OAXOLQvpKq484OrKl3yUDsipxEAXEfY4vrUFkSvP7RonF8d7CnzTyd+xHGfV43kytzlJTIy69HXvXQxNYsiS2ZDdo= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561010146; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=OW314IyiKhUPdlXFJKBFQ2fJnngTWZWQpkXx6kPGJIE=; b=YdytTILyywUyWTMspXHGCGQVsN5NZEFN9RfsN709NL+ERn0KNGyEwoa92mcpAfiMKAqWLzFH471cwTeRWiypDsVBy0I/AU2dfmg2OqchX7J/8RPct5ebUMLiabats7WcL/Lyp6x9Agqu6jZ/IkXiUfudCwAm/ybMCW+f3W5XiF8= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1561010146336506.5287992244404; Wed, 19 Jun 2019 22:55:46 -0700 (PDT) Received: from localhost ([::1]:43872 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdq2x-0003qd-Cy for importer@patchew.org; Thu, 20 Jun 2019 01:55:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56214) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdpvg-0005yz-IJ for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hdpvc-0001pv-T5 for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:12 -0400 Received: from mga05.intel.com ([192.55.52.43]:20328) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hdpvc-0001iJ-KG for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:08 -0400 Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Jun 2019 22:47:59 -0700 Received: from unknown (HELO likexu-E5-2699-v4.sh.intel.com) ([10.239.48.178]) by fmsmga007.fm.intel.com with ESMTP; 19 Jun 2019 22:47:58 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,395,1557212400"; d="scan'208";a="162243084" From: Like Xu To: qemu-devel@nongnu.org, Eduardo Habkost Date: Thu, 20 Jun 2019 13:45:23 +0800 Message-Id: <20190620054525.37188-2-like.xu@linux.intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190620054525.37188-1-like.xu@linux.intel.com> References: <20190620054525.37188-1-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.43 Subject: [Qemu-devel] [PATCH v4 1/3] target/i386: Add CPUID.1F generation support for multi-dies PCMachine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: like.xu@intel.com, Marcelo Tosatti Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" The CPUID.1F as Intel V2 Extended Topology Enumeration Leaf would be exposed if guests want to emulate multiple software-visible die within each package. Per Intel's SDM, the 0x1f is a superset of 0xb, thus they can be generated by almost same code as 0xb except die_offset setting. If the number of dies per package is greater than 1, the cpuid_min_level would be adjusted to 0x1f regardless of whether the host supports CPUID.1F. Likewise, the CPUID.1F wouldn't be exposed if env->nr_dies < 2. Suggested-by: Eduardo Habkost Signed-off-by: Like Xu --- target/i386/cpu.c | 41 +++++++++++++++++++++++++++++++++++++++++ target/i386/cpu.h | 1 + target/i386/kvm.c | 12 ++++++++++++ 3 files changed, 54 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 88908a6373..efcbe6a2b2 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -4439,6 +4439,42 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,= uint32_t count, *ecx |=3D CPUID_TOPOLOGY_LEVEL_INVALID; } =20 + assert(!(*eax & ~0x1f)); + *ebx &=3D 0xffff; /* The count doesn't need to be reliable. */ + break; + case 0x1F: + /* V2 Extended Topology Enumeration Leaf */ + if (env->nr_dies < 2) { + *eax =3D *ebx =3D *ecx =3D *edx =3D 0; + break; + } + + *ecx =3D count & 0xff; + *edx =3D cpu->apic_id; + switch (count) { + case 0: + *eax =3D apicid_core_offset(env->nr_dies, cs->nr_cores, + cs->nr_threads); + *ebx =3D cs->nr_threads; + *ecx |=3D CPUID_TOPOLOGY_LEVEL_SMT; + break; + case 1: + *eax =3D apicid_die_offset(env->nr_dies, cs->nr_cores, + cs->nr_threads); + *ebx =3D cs->nr_cores * cs->nr_threads; + *ecx |=3D CPUID_TOPOLOGY_LEVEL_CORE; + break; + case 2: + *eax =3D apicid_pkg_offset(env->nr_dies, cs->nr_cores, + cs->nr_threads); + *ebx =3D env->nr_dies * cs->nr_cores * cs->nr_threads; + *ecx |=3D CPUID_TOPOLOGY_LEVEL_DIE; + break; + default: + *eax =3D 0; + *ebx =3D 0; + *ecx |=3D CPUID_TOPOLOGY_LEVEL_INVALID; + } assert(!(*eax & ~0x1f)); *ebx &=3D 0xffff; /* The count doesn't need to be reliable. */ break; @@ -5116,6 +5152,11 @@ static void x86_cpu_expand_features(X86CPU *cpu, Err= or **errp) x86_cpu_adjust_level(cpu, &cpu->env.cpuid_min_level, 0x14); } =20 + /* CPU topology with multi-dies support requires CPUID[0x1F] */ + if (env->nr_dies > 1) { + x86_cpu_adjust_level(cpu, &env->cpuid_min_level, 0x1F); + } + /* SVM requires CPUID[0x8000000A] */ if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_SVM) { x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A); diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 46dd81f6b7..eec6e4b7b7 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -726,6 +726,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_TOPOLOGY_LEVEL_INVALID (0U << 8) #define CPUID_TOPOLOGY_LEVEL_SMT (1U << 8) #define CPUID_TOPOLOGY_LEVEL_CORE (2U << 8) +#define CPUID_TOPOLOGY_LEVEL_DIE (5U << 8) =20 /* MSR Feature Bits */ #define MSR_ARCH_CAP_RDCL_NO (1U << 0) diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 6899061b4e..5deb4248ac 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -1080,6 +1080,10 @@ int kvm_arch_init_vcpu(CPUState *cs) } break; } + case 0x1f: + if (env->nr_dies < 2) { + break; + } case 4: case 0xb: case 0xd: @@ -1087,6 +1091,11 @@ int kvm_arch_init_vcpu(CPUState *cs) if (i =3D=3D 0xd && j =3D=3D 64) { break; } + + if (i =3D=3D 0x1f && j =3D=3D 64) { + break; + } + c->function =3D i; c->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; c->index =3D j; @@ -1098,6 +1107,9 @@ int kvm_arch_init_vcpu(CPUState *cs) if (i =3D=3D 0xb && !(c->ecx & 0xff00)) { break; } + if (i =3D=3D 0x1f && !(c->ecx & 0xff00)) { + break; + } if (i =3D=3D 0xd && c->eax =3D=3D 0) { continue; } --=20 2.21.0 From nobody Mon May 20 08:27:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1561009940; cv=none; d=zoho.com; s=zohoarc; b=mSHxqBAvNzCx7JUpkmPLDcKxWGa3qT7w7VfWXtxrjcWOPhwnnl5X9ovzF23TPBDQpxmSxwLJj0GVt0V+4CQ/AjbfGOs77PuH6LUi9WFdE8azL9TYb0wMBO2iS20zyIsyKUP/3wTHUz3+2XpTftw2bro4+JB7TMLVMZQtmDOkmPQ= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561009940; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=Ms60iFzJMpR2QcVyOukBfxboWENljDb01VkqW8QUpnc=; b=g090NqOUo7Fd3lxVQaUgu797IavP4JtrXtYk/YOM/kj+kyNlW0RTaZ3RK/R7L9DzS/mfcKUewppBR5AwDgb6A8hBhTN7iswsHIa8Xi1x/+KaR6PP9m/DvPHoY4u4nsP6WUyBYDodPv0zHL+F+4soYxmeIC2AntvqNazSzMHa6uk= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (209.51.188.17 [209.51.188.17]) by mx.zohomail.com with SMTPS id 156100993999691.74573394188167; Wed, 19 Jun 2019 22:52:19 -0700 (PDT) Received: from localhost ([::1]:43838 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdpzY-0007rC-To for importer@patchew.org; Thu, 20 Jun 2019 01:52:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56191) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdpvf-0005yP-1I for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hdpvc-0001q4-VF for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:10 -0400 Received: from mga05.intel.com ([192.55.52.43]:20329) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hdpvc-0001jz-K7 for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:08 -0400 Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Jun 2019 22:48:00 -0700 Received: from unknown (HELO likexu-E5-2699-v4.sh.intel.com) ([10.239.48.178]) by fmsmga007.fm.intel.com with ESMTP; 19 Jun 2019 22:47:59 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,395,1557212400"; d="scan'208";a="162243107" From: Like Xu To: qemu-devel@nongnu.org, Eduardo Habkost Date: Thu, 20 Jun 2019 13:45:24 +0800 Message-Id: <20190620054525.37188-3-like.xu@linux.intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190620054525.37188-1-like.xu@linux.intel.com> References: <20190620054525.37188-1-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.43 Subject: [Qemu-devel] [PATCH v4 2/3] machine: Refactor smp_parse() in vl.c as MachineClass::smp_parse() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: like.xu@intel.com, Marcelo Tosatti Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" To make smp_parse() more flexible and expansive, a smp_parse function pointer is added to MachineClass that machine types could override. The generic smp_parse() code in vl.c is moved to hw/core/machine.c, and become the default implementation of MachineClass::smp_parse. A PC-specific function called pc_smp_parse() has been added to hw/i386/pc.c, which in this patch changes nothing against the default one . Suggested-by: Eduardo Habkost Signed-off-by: Like Xu Reviewed-by: Eduardo Habkost --- hw/core/machine.c | 76 ++++++++++++++++++++++++++++++++++++++++++ hw/i386/pc.c | 79 ++++++++++++++++++++++++++++++++++++++++++++ include/hw/boards.h | 5 +++ include/hw/i386/pc.h | 1 + vl.c | 75 ++--------------------------------------- 5 files changed, 163 insertions(+), 73 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 8b8d263afe..36a838f1cb 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -11,6 +11,9 @@ */ =20 #include "qemu/osdep.h" +#include "qemu/option.h" +#include "qapi/qmp/qerror.h" +#include "sysemu/replay.h" #include "qemu/units.h" #include "hw/boards.h" #include "qapi/error.h" @@ -728,6 +731,78 @@ void machine_set_cpu_numa_node(MachineState *machine, } } =20 +static void smp_parse(MachineState *ms, QemuOpts *opts) +{ + if (opts) { + unsigned cpus =3D qemu_opt_get_number(opts, "cpus", 0); + unsigned sockets =3D qemu_opt_get_number(opts, "sockets", 0); + unsigned cores =3D qemu_opt_get_number(opts, "cores", 0); + unsigned threads =3D qemu_opt_get_number(opts, "threads", 0); + + /* compute missing values, prefer sockets over cores over threads = */ + if (cpus =3D=3D 0 || sockets =3D=3D 0) { + cores =3D cores > 0 ? cores : 1; + threads =3D threads > 0 ? threads : 1; + if (cpus =3D=3D 0) { + sockets =3D sockets > 0 ? sockets : 1; + cpus =3D cores * threads * sockets; + } else { + ms->smp.max_cpus =3D + qemu_opt_get_number(opts, "maxcpus", cpus); + sockets =3D ms->smp.max_cpus / (cores * threads); + } + } else if (cores =3D=3D 0) { + threads =3D threads > 0 ? threads : 1; + cores =3D cpus / (sockets * threads); + cores =3D cores > 0 ? cores : 1; + } else if (threads =3D=3D 0) { + threads =3D cpus / (cores * sockets); + threads =3D threads > 0 ? threads : 1; + } else if (sockets * cores * threads < cpus) { + error_report("cpu topology: " + "sockets (%u) * cores (%u) * threads (%u) < " + "smp_cpus (%u)", + sockets, cores, threads, cpus); + exit(1); + } + + ms->smp.max_cpus =3D + qemu_opt_get_number(opts, "maxcpus", cpus); + + if (ms->smp.max_cpus < cpus) { + error_report("maxcpus must be equal to or greater than smp"); + exit(1); + } + + if (sockets * cores * threads > ms->smp.max_cpus) { + error_report("cpu topology: " + "sockets (%u) * cores (%u) * threads (%u) > " + "maxcpus (%u)", + sockets, cores, threads, + ms->smp.max_cpus); + exit(1); + } + + if (sockets * cores * threads !=3D ms->smp.max_cpus) { + warn_report("Invalid CPU topology deprecated: " + "sockets (%u) * cores (%u) * threads (%u) " + "!=3D maxcpus (%u)", + sockets, cores, threads, + ms->smp.max_cpus); + } + + ms->smp.cpus =3D cpus; + ms->smp.cores =3D cores; + ms->smp.threads =3D threads; + } + + if (ms->smp.cpus > 1) { + Error *blocker =3D NULL; + error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); + replay_add_blocker(blocker); + } +} + static void machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); @@ -735,6 +810,7 @@ static void machine_class_init(ObjectClass *oc, void *d= ata) /* Default 128 MB as guest ram size */ mc->default_ram_size =3D 128 * MiB; mc->rom_file_has_mr =3D true; + mc->smp_parse =3D smp_parse; =20 /* numa node memory size aligned on 8MB by default. * On Linux, each node's border has to be 8MB aligned diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 7b8c9caed6..092bd10d4d 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -79,6 +79,8 @@ #include "hw/i386/intel_iommu.h" #include "hw/net/ne2000-isa.h" #include "standard-headers/asm-x86/bootparam.h" +#include "sysemu/replay.h" +#include "qapi/qmp/qerror.h" =20 /* debug PC/ISA interrupts */ //#define DEBUG_IRQ @@ -1540,6 +1542,82 @@ static void pc_new_cpu(PCMachineState *pcms, int64_t= apic_id, Error **errp) error_propagate(errp, local_err); } =20 +/* + * This function is very similar to smp_parse() + * in hw/core/machine.c but includes CPU die support. + */ +void pc_smp_parse(MachineState *ms, QemuOpts *opts) +{ + if (opts) { + unsigned cpus =3D qemu_opt_get_number(opts, "cpus", 0); + unsigned sockets =3D qemu_opt_get_number(opts, "sockets", 0); + unsigned cores =3D qemu_opt_get_number(opts, "cores", 0); + unsigned threads =3D qemu_opt_get_number(opts, "threads", 0); + + /* compute missing values, prefer sockets over cores over threads = */ + if (cpus =3D=3D 0 || sockets =3D=3D 0) { + cores =3D cores > 0 ? cores : 1; + threads =3D threads > 0 ? threads : 1; + if (cpus =3D=3D 0) { + sockets =3D sockets > 0 ? sockets : 1; + cpus =3D cores * threads * sockets; + } else { + ms->smp.max_cpus =3D + qemu_opt_get_number(opts, "maxcpus", cpus); + sockets =3D ms->smp.max_cpus / (cores * threads); + } + } else if (cores =3D=3D 0) { + threads =3D threads > 0 ? threads : 1; + cores =3D cpus / (sockets * threads); + cores =3D cores > 0 ? cores : 1; + } else if (threads =3D=3D 0) { + threads =3D cpus / (cores * sockets); + threads =3D threads > 0 ? threads : 1; + } else if (sockets * cores * threads < cpus) { + error_report("cpu topology: " + "sockets (%u) * cores (%u) * threads (%u) < " + "smp_cpus (%u)", + sockets, cores, threads, cpus); + exit(1); + } + + ms->smp.max_cpus =3D + qemu_opt_get_number(opts, "maxcpus", cpus); + + if (ms->smp.max_cpus < cpus) { + error_report("maxcpus must be equal to or greater than smp"); + exit(1); + } + + if (sockets * cores * threads > ms->smp.max_cpus) { + error_report("cpu topology: " + "sockets (%u) * cores (%u) * threads (%u) > " + "maxcpus (%u)", + sockets, cores, threads, + ms->smp.max_cpus); + exit(1); + } + + if (sockets * cores * threads !=3D ms->smp.max_cpus) { + warn_report("Invalid CPU topology deprecated: " + "sockets (%u) * cores (%u) * threads (%u) " + "!=3D maxcpus (%u)", + sockets, cores, threads, + ms->smp.max_cpus); + } + + ms->smp.cpus =3D cpus; + ms->smp.cores =3D cores; + ms->smp.threads =3D threads; + } + + if (ms->smp.cpus > 1) { + Error *blocker =3D NULL; + error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); + replay_add_blocker(blocker); + } +} + void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp) { int64_t apic_id =3D x86_cpu_apic_id_from_index(ms, id); @@ -2780,6 +2858,7 @@ static void pc_machine_class_init(ObjectClass *oc, vo= id *data) mc->has_hotpluggable_cpus =3D true; mc->default_boot_order =3D "cad"; mc->hot_add_cpu =3D pc_hot_add_cpu; + mc->smp_parse =3D pc_smp_parse; mc->block_default_type =3D IF_IDE; mc->max_cpus =3D 255; mc->reset =3D pc_machine_reset; diff --git a/include/hw/boards.h b/include/hw/boards.h index 04f52c1335..6dd0761562 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -159,6 +159,10 @@ typedef struct { * @kvm_type: * Return the type of KVM corresponding to the kvm-type string option or * computed based on other criteria such as the host kernel capabilitie= s. + * @smp_parse: + * The function pointer to hook different machine specific functions for + * parsing "smp-opts" from QemuOpts to MachineState::CpuTopology and mo= re + * machine specific topology fields, such as smp_dies for PCMachine. */ struct MachineClass { /*< private >*/ @@ -175,6 +179,7 @@ struct MachineClass { void (*reset)(MachineState *state); void (*hot_add_cpu)(MachineState *state, const int64_t id, Error **err= p); int (*kvm_type)(MachineState *machine, const char *arg); + void (*smp_parse)(MachineState *ms, QemuOpts *opts); =20 BlockInterfaceType block_default_type; int units_per_default_bus; diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 2ae86e202d..e96e449cef 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -189,6 +189,7 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int l= evel); =20 void pc_cpus_init(PCMachineState *pcms); void pc_hot_add_cpu(MachineState *ms, const int64_t id, Error **errp); +void pc_smp_parse(MachineState *ms, QemuOpts *opts); =20 void pc_guest_info_init(PCMachineState *pcms); =20 diff --git a/vl.c b/vl.c index 96f4dd828b..9218a718f3 100644 --- a/vl.c +++ b/vl.c @@ -1247,78 +1247,6 @@ static QemuOptsList qemu_smp_opts =3D { }, }; =20 -static void smp_parse(QemuOpts *opts) -{ - if (opts) { - unsigned cpus =3D qemu_opt_get_number(opts, "cpus", 0); - unsigned sockets =3D qemu_opt_get_number(opts, "sockets", 0); - unsigned cores =3D qemu_opt_get_number(opts, "cores", 0); - unsigned threads =3D qemu_opt_get_number(opts, "threads", 0); - - /* compute missing values, prefer sockets over cores over threads = */ - if (cpus =3D=3D 0 || sockets =3D=3D 0) { - cores =3D cores > 0 ? cores : 1; - threads =3D threads > 0 ? threads : 1; - if (cpus =3D=3D 0) { - sockets =3D sockets > 0 ? sockets : 1; - cpus =3D cores * threads * sockets; - } else { - current_machine->smp.max_cpus =3D - qemu_opt_get_number(opts, "maxcpus", cpus); - sockets =3D current_machine->smp.max_cpus / (cores * threa= ds); - } - } else if (cores =3D=3D 0) { - threads =3D threads > 0 ? threads : 1; - cores =3D cpus / (sockets * threads); - cores =3D cores > 0 ? cores : 1; - } else if (threads =3D=3D 0) { - threads =3D cpus / (cores * sockets); - threads =3D threads > 0 ? threads : 1; - } else if (sockets * cores * threads < cpus) { - error_report("cpu topology: " - "sockets (%u) * cores (%u) * threads (%u) < " - "smp_cpus (%u)", - sockets, cores, threads, cpus); - exit(1); - } - - current_machine->smp.max_cpus =3D - qemu_opt_get_number(opts, "maxcpus", cpus); - - if (current_machine->smp.max_cpus < cpus) { - error_report("maxcpus must be equal to or greater than smp"); - exit(1); - } - - if (sockets * cores * threads > current_machine->smp.max_cpus) { - error_report("cpu topology: " - "sockets (%u) * cores (%u) * threads (%u) > " - "maxcpus (%u)", - sockets, cores, threads, - current_machine->smp.max_cpus); - exit(1); - } - - if (sockets * cores * threads !=3D current_machine->smp.max_cpus) { - warn_report("Invalid CPU topology deprecated: " - "sockets (%u) * cores (%u) * threads (%u) " - "!=3D maxcpus (%u)", - sockets, cores, threads, - current_machine->smp.max_cpus); - } - - current_machine->smp.cpus =3D cpus; - current_machine->smp.cores =3D cores; - current_machine->smp.threads =3D threads; - } - - if (current_machine->smp.cpus > 1) { - Error *blocker =3D NULL; - error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); - replay_add_blocker(blocker); - } -} - static void realtime_init(void) { if (enable_mlock) { @@ -4059,7 +3987,8 @@ int main(int argc, char **argv, char **envp) current_machine->smp.cores =3D 1; current_machine->smp.threads =3D 1; =20 - smp_parse(qemu_opts_find(qemu_find_opts("smp-opts"), NULL)); + machine_class->smp_parse(current_machine, + qemu_opts_find(qemu_find_opts("smp-opts"), NULL)); =20 /* sanity-check smp_cpus and max_cpus against machine_class */ if (current_machine->smp.cpus < machine_class->min_cpus) { --=20 2.21.0 From nobody Mon May 20 08:27:48 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com ARC-Seal: i=1; a=rsa-sha256; t=1561010108; cv=none; d=zoho.com; s=zohoarc; b=lGHi5HTLvXHFfzG3j0dlTFUaYEFc/ow8AMqnxCGWa22UrOivgaak66XzMpvwJbFsAOgrCAbx9Ffva3vcF8pJNdwEaRbrmUkKZIRZ8ePmaIpLreQxGSAJ5y80MwloC2vtwvQC2PGum6OvKR8ZZekM9m+GjgQVTTfyEwZNvz1V60w= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zoho.com; s=zohoarc; t=1561010108; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Post:List-Id:List-Archive:List-Help:List-Unsubscribe:MIME-Version:Message-ID:References:Sender:Subject:To:ARC-Authentication-Results; bh=GefhUxxSjoMcPBqIYoYU1KWfwHr0NlofSsADfkXZmzg=; b=f9vGLllEFH92X89dT79toI+V7PQ8EGXK5UtDc39zishEYqyzikjz5mNdBLQNY2GBQN40upA8GQQnpp5WPDvWoawfQbJ7Q4/hZvSDTrLMt/hqMXW+/9Q1z4pLvSkxL1iBd0GMXVm3mSf9sh0GFsqAlHYaOVKy/LDoeYokStvfuUE= ARC-Authentication-Results: i=1; mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail header.from= (p=none dis=none) header.from= Return-Path: Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) by mx.zohomail.com with SMTPS id 1561010108911926.9596550571652; Wed, 19 Jun 2019 22:55:08 -0700 (PDT) Received: from localhost ([::1]:43866 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdq2L-0002yi-UJ for importer@patchew.org; Thu, 20 Jun 2019 01:55:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56213) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1hdpvg-0005yy-I2 for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1hdpvf-0001rp-17 for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:12 -0400 Received: from mga05.intel.com ([192.55.52.43]:20328) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1hdpvd-0001iJ-3f for qemu-devel@nongnu.org; Thu, 20 Jun 2019 01:48:10 -0400 Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Jun 2019 22:48:02 -0700 Received: from unknown (HELO likexu-E5-2699-v4.sh.intel.com) ([10.239.48.178]) by fmsmga007.fm.intel.com with ESMTP; 19 Jun 2019 22:48:01 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,395,1557212400"; d="scan'208";a="162243116" From: Like Xu To: qemu-devel@nongnu.org, Eduardo Habkost Date: Thu, 20 Jun 2019 13:45:25 +0800 Message-Id: <20190620054525.37188-4-like.xu@linux.intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190620054525.37188-1-like.xu@linux.intel.com> References: <20190620054525.37188-1-like.xu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.43 Subject: [Qemu-devel] [PATCH v4 3/3] vl.c: Add -smp, dies=* command line support and update doc X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: like.xu@intel.com, Marcelo Tosatti Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" Content-Type: text/plain; charset="utf-8" For PC target, users could configure the number of dies per one package via command line with this patch, such as "-smp dies=3D2,cores=3D4". The parsing rules of new cpu-topology model obey the same restrictions/logic as the legacy socket/core/thread model especially on missing values computi= ng. Signed-off-by: Like Xu --- hw/i386/pc.c | 30 +++++++++++++++++------------- qemu-options.hx | 17 +++++++++-------- vl.c | 3 +++ 3 files changed, 29 insertions(+), 21 deletions(-) diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 092bd10d4d..2ed1b3f8de 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -1548,9 +1548,12 @@ static void pc_new_cpu(PCMachineState *pcms, int64_t= apic_id, Error **errp) */ void pc_smp_parse(MachineState *ms, QemuOpts *opts) { + PCMachineState *pcms =3D PC_MACHINE(ms); + if (opts) { unsigned cpus =3D qemu_opt_get_number(opts, "cpus", 0); unsigned sockets =3D qemu_opt_get_number(opts, "sockets", 0); + unsigned dies =3D qemu_opt_get_number(opts, "dies", 1); unsigned cores =3D qemu_opt_get_number(opts, "cores", 0); unsigned threads =3D qemu_opt_get_number(opts, "threads", 0); =20 @@ -1560,24 +1563,24 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts) threads =3D threads > 0 ? threads : 1; if (cpus =3D=3D 0) { sockets =3D sockets > 0 ? sockets : 1; - cpus =3D cores * threads * sockets; + cpus =3D cores * threads * dies * sockets; } else { ms->smp.max_cpus =3D qemu_opt_get_number(opts, "maxcpus", cpus); - sockets =3D ms->smp.max_cpus / (cores * threads); + sockets =3D ms->smp.max_cpus / (cores * threads * dies); } } else if (cores =3D=3D 0) { threads =3D threads > 0 ? threads : 1; - cores =3D cpus / (sockets * threads); + cores =3D cpus / (sockets * dies * threads); cores =3D cores > 0 ? cores : 1; } else if (threads =3D=3D 0) { - threads =3D cpus / (cores * sockets); + threads =3D cpus / (cores * dies * sockets); threads =3D threads > 0 ? threads : 1; - } else if (sockets * cores * threads < cpus) { + } else if (sockets * dies * cores * threads < cpus) { error_report("cpu topology: " - "sockets (%u) * cores (%u) * threads (%u) < " + "sockets (%u) * dies (%u) * cores (%u) * threads = (%u) < " "smp_cpus (%u)", - sockets, cores, threads, cpus); + sockets, dies, cores, threads, cpus); exit(1); } =20 @@ -1589,26 +1592,27 @@ void pc_smp_parse(MachineState *ms, QemuOpts *opts) exit(1); } =20 - if (sockets * cores * threads > ms->smp.max_cpus) { + if (sockets * dies * cores * threads > ms->smp.max_cpus) { error_report("cpu topology: " - "sockets (%u) * cores (%u) * threads (%u) > " + "sockets (%u) * dies (%u) * cores (%u) * threads = (%u) > " "maxcpus (%u)", - sockets, cores, threads, + sockets, dies, cores, threads, ms->smp.max_cpus); exit(1); } =20 - if (sockets * cores * threads !=3D ms->smp.max_cpus) { + if (sockets * dies * cores * threads !=3D ms->smp.max_cpus) { warn_report("Invalid CPU topology deprecated: " - "sockets (%u) * cores (%u) * threads (%u) " + "sockets (%u) * dies (%u) * cores (%u) * threads (= %u) " "!=3D maxcpus (%u)", - sockets, cores, threads, + sockets, dies, cores, threads, ms->smp.max_cpus); } =20 ms->smp.cpus =3D cpus; ms->smp.cores =3D cores; ms->smp.threads =3D threads; + pcms->smp_dies =3D dies; } =20 if (ms->smp.cpus > 1) { diff --git a/qemu-options.hx b/qemu-options.hx index 0d8beb4afd..a5b314a448 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -138,25 +138,26 @@ no incompatible TCG features have been enabled (e.g. = icount/replay). ETEXI =20 DEF("smp", HAS_ARG, QEMU_OPTION_smp, - "-smp [cpus=3D]n[,maxcpus=3Dcpus][,cores=3Dcores][,threads=3Dthreads][= ,sockets=3Dsockets]\n" + "-smp [cpus=3D]n[,maxcpus=3Dcpus][,cores=3Dcores][,threads=3Dthreads][= ,dies=3Ddies][,sockets=3Dsockets]\n" " set the number of CPUs to 'n' [default=3D1]\n" " maxcpus=3D maximum number of total cpus, including\n" " offline CPUs for hotplug, etc\n" - " cores=3D number of CPU cores on one socket\n" + " cores=3D number of CPU cores on one socket (for PC, i= t's on one die)\n" " threads=3D number of threads on one CPU core\n" + " dies=3D number of CPU dies on one socket (for PC only= )\n" " sockets=3D number of discrete sockets in the system\n= ", QEMU_ARCH_ALL) STEXI -@item -smp [cpus=3D]@var{n}[,cores=3D@var{cores}][,threads=3D@var{threads}= ][,sockets=3D@var{sockets}][,maxcpus=3D@var{maxcpus}] +@item -smp [cpus=3D]@var{n}[,cores=3D@var{cores}][,threads=3D@var{threads}= ][,dies=3Ddies][,sockets=3D@var{sockets}][,maxcpus=3D@var{maxcpus}] @findex -smp Simulate an SMP system with @var{n} CPUs. On the PC target, up to 255 CPUs are supported. On Sparc32 target, Linux limits the number of usable C= PUs to 4. -For the PC target, the number of @var{cores} per socket, the number -of @var{threads} per cores and the total number of @var{sockets} can be -specified. Missing values will be computed. If any on the three values is -given, the total number of CPUs @var{n} can be omitted. @var{maxcpus} -specifies the maximum number of hotpluggable CPUs. +For the PC target, the number of @var{cores} per die, the number of @var{t= hreads} +per cores, the number of @var{dies} per packages and the total number of +@var{sockets} can be specified. Missing values will be computed. +If any on the three values is given, the total number of CPUs @var{n} can = be omitted. +@var{maxcpus} specifies the maximum number of hotpluggable CPUs. ETEXI =20 DEF("numa", HAS_ARG, QEMU_OPTION_numa, diff --git a/vl.c b/vl.c index 9218a718f3..e3908caa47 100644 --- a/vl.c +++ b/vl.c @@ -1233,6 +1233,9 @@ static QemuOptsList qemu_smp_opts =3D { }, { .name =3D "sockets", .type =3D QEMU_OPT_NUMBER, + }, { + .name =3D "dies", + .type =3D QEMU_OPT_NUMBER, }, { .name =3D "cores", .type =3D QEMU_OPT_NUMBER, --=20 2.21.0