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X-Received-From: 2607:f8b0:4864:20::641 Subject: [Qemu-devel] [PATCH 2/2] aspeed: add a GPIO controller to the SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@aj.id.au, clg@kaod.org, qemu-devel@nongnu.org, Rashmica Gupta , joel@jms.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Rashmica Gupta --- hw/arm/aspeed_soc.c | 17 +++++++++++++++++ include/hw/arm/aspeed_soc.h | 3 +++ 2 files changed, 20 insertions(+) diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 1cc98b9f40..8583869acf 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -23,6 +23,7 @@ #include "net/net.h" =20 #define ASPEED_SOC_IOMEM_SIZE 0x00200000 +#define ASPEED_SOC_GPIO_BASE 0x1E780000 =20 static const hwaddr aspeed_soc_ast2400_memmap[] =3D { [ASPEED_IOMEM] =3D 0x1E600000, @@ -120,6 +121,7 @@ static const AspeedSoCInfo aspeed_socs[] =3D { .spis_num =3D 1, .fmc_typename =3D "aspeed.smc.fmc", .spi_typename =3D aspeed_soc_ast2400_typenames, + .gpio_typename =3D "aspeed.gpio-ast2400", .wdts_num =3D 2, .irqmap =3D aspeed_soc_ast2400_irqmap, .memmap =3D aspeed_soc_ast2400_memmap, @@ -131,6 +133,7 @@ static const AspeedSoCInfo aspeed_socs[] =3D { .spis_num =3D 1, .fmc_typename =3D "aspeed.smc.fmc", .spi_typename =3D aspeed_soc_ast2400_typenames, + .gpio_typename =3D "aspeed.gpio-ast2400", .wdts_num =3D 2, .irqmap =3D aspeed_soc_ast2400_irqmap, .memmap =3D aspeed_soc_ast2400_memmap, @@ -142,6 +145,7 @@ static const AspeedSoCInfo aspeed_socs[] =3D { .spis_num =3D 1, .fmc_typename =3D "aspeed.smc.fmc", .spi_typename =3D aspeed_soc_ast2400_typenames, + .gpio_typename =3D "aspeed.gpio-ast2400", .wdts_num =3D 2, .irqmap =3D aspeed_soc_ast2400_irqmap, .memmap =3D aspeed_soc_ast2400_memmap, @@ -153,6 +157,7 @@ static const AspeedSoCInfo aspeed_socs[] =3D { .spis_num =3D 2, .fmc_typename =3D "aspeed.smc.ast2500-fmc", .spi_typename =3D aspeed_soc_ast2500_typenames, + .gpio_typename =3D "aspeed.gpio-ast2500", .wdts_num =3D 3, .irqmap =3D aspeed_soc_ast2500_irqmap, .memmap =3D aspeed_soc_ast2500_memmap, @@ -225,6 +230,8 @@ static void aspeed_soc_init(Object *obj) =20 sysbus_init_child_obj(obj, "ftgmac100", OBJECT(&s->ftgmac100), sizeof(s->ftgmac100), TYPE_FTGMAC100); + sysbus_init_child_obj(obj, "gpio", OBJECT(&s->gpio), sizeof(s->gpio), + sc->info->gpio_typename); } =20 static void aspeed_soc_realize(DeviceState *dev, Error **errp) @@ -366,6 +373,16 @@ static void aspeed_soc_realize(DeviceState *dev, Error= **errp) sc->info->memmap[ASPEED_ETH1]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ftgmac100), 0, aspeed_soc_get_irq(s, ASPEED_ETH1)); + + /* GPIO */ + object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, ASPEED_SOC_GPIO_BASE); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio), 0, + qdev_get_gpio_in(DEVICE(&s->vic), 20)); } =20 static void aspeed_soc_class_init(ObjectClass *oc, void *data) diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index 88b901d5df..28ff2bedb4 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -20,6 +20,7 @@ #include "hw/ssi/aspeed_smc.h" #include "hw/watchdog/wdt_aspeed.h" #include "hw/net/ftgmac100.h" +#include "hw/gpio/aspeed_gpio.h" =20 #define ASPEED_SPIS_NUM 2 #define ASPEED_WDTS_NUM 3 @@ -40,6 +41,7 @@ typedef struct AspeedSoCState { AspeedSDMCState sdmc; AspeedWDTState wdt[ASPEED_WDTS_NUM]; FTGMAC100State ftgmac100; + AspeedGPIOState gpio; } AspeedSoCState; =20 #define TYPE_ASPEED_SOC "aspeed-soc" @@ -53,6 +55,7 @@ typedef struct AspeedSoCInfo { int spis_num; const char *fmc_typename; const char **spi_typename; + const char *gpio_typename; int wdts_num; const int *irqmap; const hwaddr *memmap; --=20 2.17.2