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X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PULL 20/24] target/arm: stop using deprecated functions in NEON_2RM_VCVT_F16_F32 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Remove some old constructs from NEON_2RM_VCVT_F16_F32 code: * don't use cpu_F0s * don't use tcg_gen_ld_f32 Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20190613163917.28589-11-peter.maydell@linaro.org --- target/arm/translate.c | 27 ++++++++++++--------------- 1 file changed, 12 insertions(+), 15 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index d8b46130d42..2ba620ac1e1 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -1542,7 +1542,6 @@ static TCGv_ptr vfp_reg_ptr(bool dp, int reg) return ret; } =20 -#define tcg_gen_ld_f32 tcg_gen_ld_i32 #define tcg_gen_st_f32 tcg_gen_st_i32 =20 #define ARM_CP_RW_BIT (1 << 20) @@ -6425,25 +6424,23 @@ static int disas_neon_data_insn(DisasContext *s, ui= nt32_t insn) q || (rm & 1)) { return 1; } - tmp =3D tcg_temp_new_i32(); - tmp2 =3D tcg_temp_new_i32(); fpst =3D get_fpstatus_ptr(true); ahp =3D get_ahp_flag(); - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, 0= )); - gen_helper_vfp_fcvt_f32_to_f16(tmp, cpu_F0s, fpst, ahp= ); - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, 1= )); - gen_helper_vfp_fcvt_f32_to_f16(tmp2, cpu_F0s, fpst, ah= p); + tmp =3D neon_load_reg(rm, 0); + gen_helper_vfp_fcvt_f32_to_f16(tmp, tmp, fpst, ahp); + tmp2 =3D neon_load_reg(rm, 1); + gen_helper_vfp_fcvt_f32_to_f16(tmp2, tmp2, fpst, ahp); tcg_gen_shli_i32(tmp2, tmp2, 16); tcg_gen_or_i32(tmp2, tmp2, tmp); - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, 2= )); - gen_helper_vfp_fcvt_f32_to_f16(tmp, cpu_F0s, fpst, ahp= ); - tcg_gen_ld_f32(cpu_F0s, cpu_env, neon_reg_offset(rm, 3= )); + tcg_temp_free_i32(tmp); + tmp =3D neon_load_reg(rm, 2); + gen_helper_vfp_fcvt_f32_to_f16(tmp, tmp, fpst, ahp); + tmp3 =3D neon_load_reg(rm, 3); neon_store_reg(rd, 0, tmp2); - tmp2 =3D tcg_temp_new_i32(); - gen_helper_vfp_fcvt_f32_to_f16(tmp2, cpu_F0s, fpst, ah= p); - tcg_gen_shli_i32(tmp2, tmp2, 16); - tcg_gen_or_i32(tmp2, tmp2, tmp); - neon_store_reg(rd, 1, tmp2); + gen_helper_vfp_fcvt_f32_to_f16(tmp3, tmp3, fpst, ahp); + tcg_gen_shli_i32(tmp3, tmp3, 16); + tcg_gen_or_i32(tmp3, tmp3, tmp); + neon_store_reg(rd, 1, tmp3); tcg_temp_free_i32(tmp); tcg_temp_free_i32(ahp); tcg_temp_free_ptr(fpst); --=20 2.20.1