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X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PULL 12/24] target/arm: Use vfp_expand_imm() for AArch32 VFP VMOV_imm X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) The AArch32 VMOV (immediate) instruction uses the same VFP encoded immediate format we already handle in vfp_expand_imm(). Use that function rather than hand-decoding it. Suggested-by: Richard Henderson Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20190613163917.28589-3-peter.maydell@linaro.org --- target/arm/translate-vfp.inc.c | 28 ++++------------------------ target/arm/vfp.decode | 10 ++++++---- 2 files changed, 10 insertions(+), 28 deletions(-) diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index a66084f6e36..8b732761f26 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -1842,7 +1842,7 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VM= OV_imm_sp *a) uint32_t delta_d =3D 0; int veclen =3D s->vec_len; TCGv_i32 fd; - uint32_t n, i, vd; + uint32_t vd; =20 vd =3D a->vd; =20 @@ -1869,17 +1869,7 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_V= MOV_imm_sp *a) } } =20 - n =3D (a->imm4h << 28) & 0x80000000; - i =3D ((a->imm4h << 4) & 0x70) | a->imm4l; - if (i & 0x40) { - i |=3D 0x780; - } else { - i |=3D 0x800; - } - n |=3D i << 19; - - fd =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(fd, n); + fd =3D tcg_const_i32(vfp_expand_imm(MO_32, a->imm)); =20 for (;;) { neon_store_reg32(fd, vd); @@ -1902,7 +1892,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VM= OV_imm_dp *a) uint32_t delta_d =3D 0; int veclen =3D s->vec_len; TCGv_i64 fd; - uint32_t n, i, vd; + uint32_t vd; =20 vd =3D a->vd; =20 @@ -1934,17 +1924,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_V= MOV_imm_dp *a) } } =20 - n =3D (a->imm4h << 28) & 0x80000000; - i =3D ((a->imm4h << 4) & 0x70) | a->imm4l; - if (i & 0x40) { - i |=3D 0x3f80; - } else { - i |=3D 0x4000; - } - n |=3D i << 16; - - fd =3D tcg_temp_new_i64(); - tcg_gen_movi_i64(fd, ((uint64_t)n) << 32); + fd =3D tcg_const_i64(vfp_expand_imm(MO_64, a->imm)); =20 for (;;) { neon_store_reg64(fd, vd); diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index ea24365bb4c..a67b3f29ee5 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -44,6 +44,8 @@ %vmov_idx_b 21:1 5:2 %vmov_idx_h 21:1 6:1 =20 +%vmov_imm 16:4 0:4 + # VMOV scalar to general-purpose register; note that this does # include some Neon cases. VMOV_to_gp ---- 1110 u:1 1. 1 .... rt:4 1011 ... 1 0000 \ @@ -152,10 +154,10 @@ VFM_sp ---- 1110 1.10 .... .... 1010 . o2:1 . 0= .... \ VFM_dp ---- 1110 1.10 .... .... 1011 . o2:1 . 0 .... \ vm=3D%vm_dp vn=3D%vn_dp vd=3D%vd_dp o1=3D2 =20 -VMOV_imm_sp ---- 1110 1.11 imm4h:4 .... 1010 0000 imm4l:4 \ - vd=3D%vd_sp -VMOV_imm_dp ---- 1110 1.11 imm4h:4 .... 1011 0000 imm4l:4 \ - vd=3D%vd_dp +VMOV_imm_sp ---- 1110 1.11 .... .... 1010 0000 .... \ + vd=3D%vd_sp imm=3D%vmov_imm +VMOV_imm_dp ---- 1110 1.11 .... .... 1011 0000 .... \ + vd=3D%vd_dp imm=3D%vmov_imm =20 VMOV_reg_sp ---- 1110 1.11 0000 .... 1010 01.0 .... \ vd=3D%vd_sp vm=3D%vm_sp --=20 2.20.1