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X-Received-From: 2a00:1450:4864:20::443 Subject: [Qemu-devel] [PULL 21/48] target/arm: Convert VFP VLDR and VSTR to decodetree X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) Content-Type: text/plain; charset="utf-8" Convert the VFP single load/store insns VLDR and VSTR to decodetree. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/translate-vfp.inc.c | 73 ++++++++++++++++++++++++++++++++++ target/arm/translate.c | 22 +--------- target/arm/vfp.decode | 7 ++++ 3 files changed, 82 insertions(+), 20 deletions(-) diff --git a/target/arm/translate-vfp.inc.c b/target/arm/translate-vfp.inc.c index 5f081221b83..40f2cac3e2e 100644 --- a/target/arm/translate-vfp.inc.c +++ b/target/arm/translate-vfp.inc.c @@ -853,3 +853,76 @@ static bool trans_VMOV_64_dp(DisasContext *s, arg_VMOV= _64_sp *a) =20 return true; } + +static bool trans_VLDR_VSTR_sp(DisasContext *s, arg_VLDR_VSTR_sp *a) +{ + uint32_t offset; + TCGv_i32 addr; + + if (!vfp_access_check(s)) { + return true; + } + + offset =3D a->imm << 2; + if (!a->u) { + offset =3D -offset; + } + + if (s->thumb && a->rn =3D=3D 15) { + /* This is actually UNPREDICTABLE */ + addr =3D tcg_temp_new_i32(); + tcg_gen_movi_i32(addr, s->pc & ~2); + } else { + addr =3D load_reg(s, a->rn); + } + tcg_gen_addi_i32(addr, addr, offset); + if (a->l) { + gen_vfp_ld(s, false, addr); + gen_mov_vreg_F0(false, a->vd); + } else { + gen_mov_F0_vreg(false, a->vd); + gen_vfp_st(s, false, addr); + } + tcg_temp_free_i32(addr); + + return true; +} + +static bool trans_VLDR_VSTR_dp(DisasContext *s, arg_VLDR_VSTR_sp *a) +{ + uint32_t offset; + TCGv_i32 addr; + + /* UNDEF accesses to D16-D31 if they don't exist */ + if (!dc_isar_feature(aa32_fp_d32, s) && (a->vd & 0x10)) { + return false; + } + + if (!vfp_access_check(s)) { + return true; + } + + offset =3D a->imm << 2; + if (!a->u) { + offset =3D -offset; + } + + if (s->thumb && a->rn =3D=3D 15) { + /* This is actually UNPREDICTABLE */ + addr =3D tcg_temp_new_i32(); + tcg_gen_movi_i32(addr, s->pc & ~2); + } else { + addr =3D load_reg(s, a->rn); + } + tcg_gen_addi_i32(addr, addr, offset); + if (a->l) { + gen_vfp_ld(s, true, addr); + gen_mov_vreg_F0(true, a->vd); + } else { + gen_mov_F0_vreg(true, a->vd); + gen_vfp_st(s, true, addr); + } + tcg_temp_free_i32(addr); + + return true; +} diff --git a/target/arm/translate.c b/target/arm/translate.c index eb217af579a..0c92f3ed4ec 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -3713,26 +3713,8 @@ static int disas_vfp_insn(DisasContext *s, uint32_t = insn) else rd =3D VFP_SREG_D(insn); if ((insn & 0x01200000) =3D=3D 0x01000000) { - /* Single load/store */ - offset =3D (insn & 0xff) << 2; - if ((insn & (1 << 23)) =3D=3D 0) - offset =3D -offset; - if (s->thumb && rn =3D=3D 15) { - /* This is actually UNPREDICTABLE */ - addr =3D tcg_temp_new_i32(); - tcg_gen_movi_i32(addr, s->pc & ~2); - } else { - addr =3D load_reg(s, rn); - } - tcg_gen_addi_i32(addr, addr, offset); - if (insn & (1 << 20)) { - gen_vfp_ld(s, dp, addr); - gen_mov_vreg_F0(dp, rd); - } else { - gen_mov_F0_vreg(dp, rd); - gen_vfp_st(s, dp, addr); - } - tcg_temp_free_i32(addr); + /* Already handled by decodetree */ + return 1; } else { /* load/store multiple */ int w =3D insn & (1 << 21); diff --git a/target/arm/vfp.decode b/target/arm/vfp.decode index 134f1c9ef58..8fa7fa0bead 100644 --- a/target/arm/vfp.decode +++ b/target/arm/vfp.decode @@ -71,3 +71,10 @@ VMOV_64_sp ---- 1100 010 op:1 rt2:4 rt:4 1010 00.1 ...= . \ vm=3D%vm_sp VMOV_64_dp ---- 1100 010 op:1 rt2:4 rt:4 1011 00.1 .... \ vm=3D%vm_dp + +# Note that the half-precision variants of VLDR and VSTR are +# not part of this decodetree at all because they have bits [9:8] =3D=3D 0= b01 +VLDR_VSTR_sp ---- 1101 u:1 .0 l:1 rn:4 .... 1010 imm:8 \ + vd=3D%vd_sp +VLDR_VSTR_dp ---- 1101 u:1 .0 l:1 rn:4 .... 1011 imm:8 \ + vd=3D%vd_dp --=20 2.20.1